Fault-tolerant Quantum Error Correction Using a Linear Array of Emitters

Fault-tolerant quantum error correction provides a strategy to protect information processed by a quantum computer against noise which would otherwise corrupt the data. A fault-tolerant universal quantum computer must implement a universal gate set on the logical level in order to perform arbitrary calculations to in principle unlimited precision. In this paper we characterize the recent demonstration of a fault-tolerant universal gate set in a trapped-ion quantum computer [Postler et al., Nature (London) 605, 7911 (2022)] and identify aspects to improve the design of experimental setups to reach an advantage of logical over physical qubit operation. We show that various criteria to assess the break-even point for fault-tolerant quantum operations are within reach for the ion trap quantum computing architecture under consideration. Furthermore, we analyze the influence of crosstalk in entangling gates for logical state preparation circuits. These circuits can be designed to respect fault tolerance for specific microscopic noise models. We find that an experimentally informed depolarizing noise model captures the essential noise dynamics of the fault-tolerant experiment that we consider, and crosstalk is negligible in the currently accessible regime of physical error rates. For deterministic Pauli state preparation, we provide a fault-tolerant unitary logical qubit initialization circuit, which can be realized without in-sequence measurement and feed-forward of classical information. Additionally, we show that nondeterministic state preparation schemes, i.e., repeat until success, for logical Pauli and magic states perform with higher logical fidelity over their deterministic counterparts for the current and anticipated future regime of physical error rates. Our results offer guidance on improvements of physical qubit operations and validate the experimentally informed noise model as a tool to predict logical failure rates in quantum computing architectures based on trapped ions.

The development of practical, high-performance decoding algorithms reduces the resource cost of fault-tolerant quantum computing. Here we propose a decoder for the surface code that finds low-weight correction operators for errors produced by the depolarising noise model. The decoder is obtained by mapping the syndrome of the surface code onto that of the color code, thereby allowing us to adopt more sophisticated color-code decoding algorithms. Analytical arguments and exhaustive testing show that the resulting decoder can find a least-weight correction for all weight d/2 depolarising errors for even code distance d. This improves the logical error rate by an exponential factor O(2d/2) compared with decoders that treat bit-flip and dephasing errors separately. We demonstrate this improvement with analytical arguments and supporting numerical simulations at low error rates. Of independent interest, we also demonstrate an exponential improvement in logical error rate for our decoder used to correct independent and identically distributed bit-flip errors affecting the color code compared with more conventional color-code decoding algorithms.

While Clifford operations are relatively easy to implement in fault-tolerant quantum computers, continuous rotation gates remain a significant bottleneck in typical quantum algorithms. In this work, we ask the question: “What is the most efficient approach for implementing continuous rotations in a surface code architecture?” Several techniques have been developed to reduce the T-count or T-depth of rotations, such as Hamming weight phasing and catalyst towers. However, these methods often require additional a number of ancilla qubits, and thus the ultimate cost function one needs to optimise against should rather be the total runtime or the total space required for performing a rotation. We explicitly construct surface code layouts for catalyst towers in two practical application examples in the context of option pricing: (a) implementing a phase oracle circuit, which is a ubiquitous subroutine in many quantum algorithms, and (b) state preparation using a variational quantum circuit. Our analysis shows that, at small and medium code distances, catalyst towers not only reduce the runtime but can also decrease the total spacetime volume of rotations. However, at large code distances, conventional Clifford+T synthesis may prove more efficient. Additionally, we note that our conclusions are sensitive to specific application scenarios and the choices of various parameters. Nevertheless, catalyst towers may be particularly advantageous for early fault-tolerant quantum applications, where low and medium code distances are assumed and a spacetime tradeoff is needed to reduce the runtime of individual circuit runs, such as in scenarios involving high circuit repetition counts.

This thesis presents the development of resource-efficient photon-distillation schemes designed to produce highly indistinguishable photons, a key requirement for large-scale photonic quantum computing. Although photons do not naturally interact, their indistinguishability enables effective interactions through quantum interference, allowing entanglement generation using only linear optical elements and measurements. In practice, however, photons are never perfectly identical. Small differences introduce decoherence, limiting the scalability and reliability of photonic quantum technologies. Addressing indistinguishability errors is therefore essential for fault-tolerant quantum computing.<br/><br/>The thesis first reviews the importance of photon indistinguishability and the need to mitigate related errors. It then examines experimental methods for characterizing imperfections and introduces a general model of imperfect photon states. This model captures indistinguishability errors alongside additional experimental noise from photon loss and multiphoton events. A key insight is that loss and multiphoton noise together can act as an effective source of indistinguishability error. To quantify this effect, the work defines an effective indistinguishability metric, enabling practical evaluation of photon-distillation schemes under realistic conditions.<br/><br/>The core theoretical contribution is the development of photon-distillation protocols based on multiphoton Fourier interference. Unlike earlier approaches, these schemes can asymptotically suppress indistinguishability errors to arbitrary levels while requiring only linear scaling in photon resources relative to the desired error reduction. The analysis further suggests that photon distillation, when combined with quantum error correction, can significantly reduce the overall resource overhead for fault-tolerant photonic quantum computing.<br/><br/>Experimentally, a three-photon Fourier-based distillation protocol was demonstrated on a high-fidelity photonic processor using a resonantly driven quantum-dot single-photon source. After subtracting excess noise contributions, a 2.2-fold reduction in indistinguishability error was achieved; when excess noise was retained, a 1.2-fold net reduction was observed. These results confirm a clear below-threshold improvement in photon quality. Additional analysis suggests that optimized distillation schemes could reduce the photon cost of a logical qubit by up to a factor of four. The thesis concludes by addressing insertion loss and outlining design strategies and future directions for integrating photon-distillation components into scalable quantum architectures.

In the present literature, the delay line (DL) in transmitted-reference (TR) system is supposed to be ideal. However, it is in fact impossible to design a DL with perfect phase-frequency characteristic. In this paper, based on the statistical model of group delay ripple (GDR) of the non-ideal DL, we investigate the degradation of average bit error rate (BER) for TR UWB communication system. Through Monte Carlo simulations, the impact of GDR amplitude on the degradation of BER performance under different TR UWB channel environments and different SNR conditions is verified.

This paper shows that quantum computation can be made fault-tolerant against errors and inaccuracies when $\eta$, the probability for an error in a qubit or a gate, is smaller than a constant threshold $\eta_c$. This result improves on Shor's result [Proceedings of the 37th Symposium on the Foundations of Computer Science, IEEE, Los Alamitos, CA, 1996, pp. 56–65], which shows how to perform fault-tolerant quantum computation when the error rate $\eta$ decays polylogarithmically with the size of the computation, an assumption which is physically unreasonable. The cost of making the quantum circuit fault-tolerant in our construction is polylogarithmic in time and space. Our result holds for a very general local noise model, which includes probabilistic errors, decoherence, amplitude damping, depolarization, and systematic inaccuracies in the gates. Moreover, we allow exponentially decaying correlations between the errors both in space and in time. Fault-tolerant computation can be performed with any universal set of gates. The result also holds for quantum particles with $p>2$ states, namely, p-qudits, and is also generalized to one-dimensional quantum computers with only nearest-neighbor interactions. No measurements, or classical operations, are required during the quantum computation. We estimate the threshold of our construction to be $\eta_c\simeq 10^{-6}$, in the best case. By this we show that local noise is in principle not an obstacle for scalable quantum computation. The main ingredient of our proof is the computation on states encoded by a quantum error correcting code (QECC). To this end we introduce a special class of Calderbank–Shor–Steane (CSS) codes, called polynomial codes (the quantum analogue of Reed–Solomon codes). Their nice algebraic structure allows all of the encoded gates to be transversal. We also provide another version of the proof which uses more general CSS codes, but its encoded gates are slightly less elegant. To achieve fault tolerance, we encode the quantum circuit by another circuit by using one of these QECCs. This step is repeated polyloglog many times, each step slightly improving the effective error rate, to achieve the desired reliability. The resulting circuit exhibits a hierarchical structure, and for the analysis of its robustness we borrow terminology from Khalfin and Tsirelson [Found. Phys., 22 (1992), pp. 879–948] and Gács [Advances in Computing Research: A Research Annual: Randomness and Computation, JAI Press, Greenwich, CT, 1989]. The paper is to a large extent self-contained. In particular, we provide simpler proofs for many of the known results we use, such as the fact that it suffices to correct for bit-flips and phase-flips, the correctness of CSS codes, and the fact that two-qubit gates are universal, together with their extensions to higher-dimensional particles. We also provide full proofs of the universality of the sets of gates we use (the proof of universality was missing in Shor's paper). This paper thus provides a self-contained and complete proof of universal fault-tolerant quantum computation in the presence of local noise.

In this paper, a two-bit phase-shifter element for reconfigurable reflectarray antennas is presented. The element is formed by a cut-ring patch coupled to the delay line through an annular slot. The method using a shorting via is applied to this element to separate the line into two delay lines in order that the phase shift can be proportional linearly with respect to the length of two delay lines. The length of each delay line is optimized to provide four-phase states with a step of 90° according to ON/OFF states of two switches. A reflectarray prototype consisting of 8 × 12 elements has been fabricated and measured to validate the design. Experimental results indicate good characteristics of the reflectarray element and excellent beam-steering capabilities according to the ON/OFF states of the switches.

Imperfect measurements are a prevalent source of error across quantum computing platforms, significantly degrading the logical error rates achievable on current hardware. To mitigate this issue, rich measurement data referred to as soft information has been proposed to efficiently identify and correct measurement errors as they occur. In this work, we model soft information decoding across a variety of physical qubit platforms and decoders and showcase how soft information can make error correction viable at lower code distances and higher physical error rates than is otherwise possible. We simulate the effects of soft information decoding on quantum memories for surface codes and bivariate bicycle codes, and evaluate the error suppression performance of soft decoders against traditional decoders. Our simulations show that soft information decoding on near-term devices can provide up to 11% higher error suppression on superconducting qubits and up to 20% stronger error suppression on neutral atom qubits. These accuracy gains correspond to 13% and 33% reductions in the physical qubit footprint of superconducting and neutral atom devices respectively when operating at a logical error rate of 10 −6 , showcasing that soft information is a powerful tool for reducing the cost and complexity of large-scale fault-tolerant quantum computers.

Quantum computing offers unprecedented speed and power for solving complex problems, but its susceptibility to errors makes error-correction codes crucial. An important metric for evaluating the performance of error-correction codes is the code distance, which measures the number of errors a code can correct. Current qubit-plane architectures are implemented using the same code distance. However, a larger code distance reduces the logical error rate but increases resources. In fact, distance-5 code uses more resources but offers higher resilience to logical errors compared to distance-3 code. We propose a qubit-plane architecture for rotated and unrotated surface codes called Qentaurus that combines various code distances of logical qubits for robust error correction while maintaining qubit efficiency. Qentaurus is designed to be highly scalable regarding computation, layout, and code distance. We performed a case study using Qentaurus with distance-3 and -7 codes to evaluate the performance. Moreover, we additionally developed a qubit placement scheme that considers the critical path of the quantum circuit to reduce the logical error rate and gate count. Our main experimental results demonstrated that Qentaurus considerably reduces the overall logical error rate (by 15.76% on average and up to 25.25%) than that of the Distance-3 Checkerboard architecture. After additionally implementing the qubit placement scheme, the average reduction increases to 13.44% (up to 39.07%). Notably, the Qentaurus-37 maintains logical error rates comparable to those of the Distance-5 Checkerboard, achieving considerable qubit efficiency. The Distance-5 Checkerboard demands 227.7% more physical qubits than that required by the Distance-3 Checkerboard, while Qentaurus-37 utilizes just 131.2% of the physical qubits required by Distance-3 the Checkerboard, marking a substantial reduction of 96.5% in the resource gap. The overall gate count is reduced by an average of 1.74% with Qentaurus alone and by 3.33% on average with the qubit placement scheme. We believe that the proposed Qentaurus and qubit placement scheme have the potential to significantly improve the error-correction performance of large-scale quantum computers in practical applications.

By precisely timed optical excitation of their spin, optical emitters such as semiconductor quantum dots or atoms can be harnessed as sources of linear photonic cluster states. This significantly reduces the required resource overhead to reach fault-tolerant optical quantum computing. Here, we develop an algorithm that analytically tracks the global density matrix through the process of the protocol for generating linear-cluster states by Lindner and Rudolph. From this we derive a model to calculate the entangling gate fidelity and the state fidelity of the generated linear optical cluster states. Our model factors in various sources of error, such as spin decoherence and the finite excited state lifetime. Additionally, we highlight the presence of partial reinitialization of spin coherence with each photon emission, eliminating the hard limitation of coherence time. Our framework provides valuable insight into the cost-to-improvement trade-offs for device design parameters as well as the identification of optimal working points. For a combined state-of-the-art quantum dot with a spin coherence time of {T}_{2}^{*}=535 ns and an excited state lifetime of tau =23 ps, we show that a near-unity entangling gate fidelity as well as near-unity state fidelity for 3-photon and 7-photon linear cluster states can be reached.Graphical

A simple algorithm for adaptively steering the broadband null in a two-element power inversion array which uses a tapped delay line filter as the processing element is presented and investigated. By performing a simple signal transformation, the algorithm constrains some of the filter weights so that a variable length delay line is approximated in the maximally flat sense. By using the least mean square (LMS) algorithm to adjust the weights controlling the length and gain of the delay line, a broadband null is then adaptively formed to track and reject the broadband jammer. As studied analytically and by using simulation results, the convergence behavior of the algorithm is fast and depends only on the tolerable level of misadjustment noise. Its implementation complexity is comparable to that of using the LMS algorithm directly. >

The authors present the basic advantages and limitations of using integrated CMOS delay lines for the digitization of short time intervals. A 6-7-bit accuracy and a single-shot resolution of 0.5-10 ns are demonstrated using fully integrated, tapped and voltage controlled CMOS delay lines as a time base for the measurement. The delay lines considered are found to be most suitable for applications where better than 8-bit accuracy and 0.5-10-ns single-shot resolution is required. The accuracy is limited by the poor matching of minimum-sized structures, which causes more than +or-0.5 lsb nonlinearity when the length of the delay line exceeds about 100 elements (7 bits). >

Resource contention in packet switched all-optical networks is being addressed in this paper through the combined use of fiber delay lines and 2/spl times/2 space photonic switches. With this basic approach, also known as Quadro or switched fiber delay lines (SDL), the solution efficiency is linked to its storage capacity, determined by the combined length of the fiber delay lines. In the past, this capacity was given by the number of 2/spl times/2 photonic switches used, i.e., the number of stages in the receiver, which limited the solution by cost, mainly determined by the switch component, and by the signal power loss and crosstalk introduced by each switch. This work presents and analyzes the use of multibuffer fiber delay lines, in Quadro, so termed since in it multiple packets are allowed to be concurrently stored (propagated) on each delay line. In this way the total storage capacity is increased, while the proposed design utilizing novel switch control is shown to significantly improve receiver and network performance, without increasing the number of the 6/spl times/2 space photonic switches in the system, i.e., its cost.

The photoelectric pulse generated by an avalanche photodiode (APD) as a result of a single injected photoelectron is regarded as a nonstationary random function of time (the impulse response function). A discrete stochastic model for the electron-hole motion and multiplication is defined on a spatio-temporal lattice and used to derive recursive equations for the mean, the variance, and the autocorrelation of the impulse response as functions of time. The power spectral density of the photocurrent in response to a Poisson-distributed stream of photons of uniform rate is evaluated. Correlation properties of the impulse response is studied for a conventional and multilayer (superlattice) APD with the same gain and carrier-ionization rate ratio. The conventional APD has a much more correlated response and a higher excess noise factor. Its response is slower; however, the signal-to-noise ratio (SNR) of its current response is greater. The photocurrent generated in the conventional APD from a stream of photons has a narrower power spectral density but a higher SNR. For both devices, the rms current is low at the onset of multiplication, sharply peaks at about the same time but does not die off as rapidly as the mean current. For a high-data-rate optical communication system, this type of noise will enhance inter­symbol interference and limit the bit error rate.

The length of a rail line that will minimize total transportation (user and operator) costs, and the threshold demand necessary to ensure that the resulting length of the rail line is nonzero are investigated for an urban transportation corridor. A density of demand for travel to the central business district (CBD) represented by a general function P(x) passengers per unit length of the corridor where x is the distance from the CBD is considered. The line-cost as a function of x, the costs of the rail fleet, rail and bus operating costs and passenger time costs are also considered in the formulation. The fleet size is formulated considering the peaking of demand relative to time. When the line cost is nonuniform there could be several line lengths at which the total transportation cost is minimized or even maximized locally. When the line cost per unit length is uniform, a minimum transport cost rail line of nonzero length exists only if the net gain in travel time and operating cost of transporting the total ridership a unit distance by rail, when compared to bus, exceeds the marginal line and fleet costs per unit length. In either case, the minimum transport cost rail line length can be determined easily. The effects on the line length of shifts in demand are investigated. Closed-form solutions for the line length are obtained for the cases of sectorial and rectangular corridor-sheds with uniformly distributed demand per unit area.