Flexible security systems and a new structure for electronic commerce on software radio

The Software-Defined Radio (SDR) concept was originally developed by the combined efforts of various research groups in the private and government organizations of the United States (US) in 1970s–1980s. The important ones to mention are the US Department of Defense Laboratory and a team at the Garland, Texas Division of E-Systems Inc. In 1991, Joe Mitola independently reinvented the term ‘Software Radio’ (SR) in cooperation with E-Systems as a plan to build a true software-based GSM transceiver (Mitola, Telesystems Conference, 1992). The SR platform essentially processes almost all the transceiver algorithms as software for a processor. This includes nearly all layers of transmission. However, an optimal implementation of physical layer is always challenging due to an enormous amount of mathematical computation. Over the period of time, many developmental changes occurred and an interesting feature of cognition was added to existing SDR platforms, thereby inventing the term ‘Cognitive Radio’. The main idea was to reduce over-sampling by the analog to digital converter, reduce on-chip processing and to target only the spectrum of interest. This book also touches the CR feature in the large SDR field in some of its selected chapters. Since, the very first few articles of J. Mitola, there has a been a tremendous amount of research work conducted in industry and academia. The evolution in SDRs is continuous with time and provides a number of excellent opportunities to researcher for exploration and to come up with their findings. The present day SDR implementations are such that the designers are focused mostly on the design of hardware and software, their interfacing and optimizations for varying architectural choices. It includes multiple cases of application-specific general-purpose acceleration platforms that are scalable, homogeneous and heterogeneous in nature while providing multiple programmable cores on a single chip computing system.

The ultimate objective of Software Defined Radio (SDR) is to replace the entire analog signal processing in the wireless transceivers with digital signal processing. This will provide the flexibility, through reconfiguration or reprogramming, to enable the transceivers to work with different air-interfaces standards using a single generic hardware platform. Most of the research in SDR to date has been focused on base stations, which do not have as tight constraints in size and power consumption as handsets. However, in order to realize the promise of integrated services and global roaming capabilities, the design and development of a multi-standard SDR handset with dynamic reconfigurability is crucial. The size and power constraints imposed by handsets with limited resources pose a major design challenge. This special issue brings together 11 papers that address various aspects of this challenge from the perspectives of wireless systems, computing architectures, embedded systems and signal processing. The most important part of an SDR transceiver is the wideband analog-to-digital converter (ADC) that converts the radio frequency signal received by the antenna into digital form for further processing. The first paper, “A multi-mode sigma-delta ADC for GSM/WCDMA/WLAN applications” by Jose et. al. proposed a cascaded reconfigurable sigma-delta modulator that is able to work with three different communication standards. This design, implemented in 0.18 μm CMOS technology, exhibits excellent signal-to-noise plus distortion ratios and has reduced power consumption compared to conventional designs. After ADC, the digitized received signal will need to be separated into signals within the various bands specified by the communication standard. This is performed by the channelizer which has the highest computational requirements of the whole SDR system. The second paper, by Panicker et al., reviews the state-of-the-art filter bank channelizer techniques with low power and dynamic reconfigurability properties. The design of reconfigurable devices can be optimized using the methodology of parametrization which bring together the common aspects of a myriad number of wireless standards into a single processing procedure. In this way, the implementation of the multi-standard SDR will be greatly simplified. “Promising technique of parametrisation for reconfigurable radio, the Common Operators Technique: fundamentals and examples” by Alaus et al. presents the common operator technique for parametrization which is less standards dependent than the more conventional Common Function technique. The direct digitization of the radio frequency (RF) signal requires very high speed ADCs which is not readily available using current technology. Therefore, current SDR implementations typically down-converts the RF A. P. Vinod (*) School of Computer Engineering, Nanyang Technological University, Nanyang, Singapore e-mail: asvinod@ntu.edu.sg

Software Defined Radio (SDR) or Software Radio is one of the most important technologies for the modern wireless communication system. SDR is a radio which can tune to any frequency band, implement different modulation and demodulation schemes and different standards in the same device by using reconfigurable hardware and powerful software. SDR provides flexible, upgradeable, multi-standard and longer lifetime radio equipment for both the military and for civilian wireless communications infrastructure. This paper provides a detailed analysis of SDR hardware and its operation focusing on analog front end and digital front end. The paper also highlights the benefits of SDR. However, it was expected to implement SDR since the third generation of wireless communication but many practical challenges that SDR faces, causing SDR evolution slower. This paper also discusses some of the current issues impacting the SDR technology and investigates how they are being resolved.

It is expected that multiple radio access standards and systems will coexist in the same environment beyond 3G. The superior re-configurability and re-programmability of software-defined radio (SDR) had made itself become the most promising technology to realize such a flexible radio system. Several research projects have involved in the development of SDR systems, but their efforts mainly focus on hardware design. A software framework that allows users, manufactures or operators to insert, remove, update and configure protocols, applications and hardware modules is also an essential part of a SDR system. Unfortunately, current commercial operating systems (OS) lack of fully supports of SDR features. In this paper, the impacts of SDR on the OS and the extension of the OS for a SDR system are investigated. Moreover, the design and implementation of a software framework based on a commercial on-the-shelf (COTS) OS are also presented.

Efficient and effective broadband wireless technologies are required to support the foreseeable need to process and exchange large amounts of data. In this Special Issue of the Springer Journal of Signal Processing Systems various disciplines of such efficiency and effectiveness in the context of Software-Defined Radio (SDR) technologies are discussed. At first, a selection of articles focuses on “spectral efficiency”. Since frequency spectrum is known to be scarce and limited, it becomes a resource of increasing value whose utilization must be handled with care. The rapidly growing demand for higher data throughputs in wireless communication does not allow inefficient use of spectrum anymore. Two promising approaches to tackle the “spectral efficiency” issue are Cognitive Radio (CR) and Dynamic Spectrum Access (DSA). A Cognitive Radio is capable of learning and adapting to its transmission environment. Taking e.g. spectrum sensing results into account, the decisions for accessing the scarce frequency spectrum in the most flexible and effective manner are made. CRs are typically based on SDR technology. Thus, the first set of articles puts emphasis on topics in the areas of Cognitive Radio, Cognitive Radio Networks, and Spectrum Sensing. The second selection of articles addresses the problems of “energy efficiency” and “implementation efficiency”. Especially in wireless communications these types of efficiencies are highly important to increase battery time of modern SDRbased platforms. The architectures of such SDRs are typically based on heterogeneous multi-processor hardware platforms hosting General Purpose Processors (GPP), Digital Signal Processors (DSP), Field Programmable Gate Arrays (FPGA) and sometimes even more specific processing elements. Each type of processor has a specific advantage in one or the other performance criterion like energy consumption, flexibility, processing time, throughput, waveform portability, components reusability etc. Whenever a new waveform shall be implemented on an SDR, the system designer has to take the decision for the best possible trade-off between all of these, partly conflicting, criteria under the given circumstances. For instance, the portability of waveform components can be improved by fulfilling the constraints of the Software Communications Architecture (SCA) specification and by using common Application Programming Interfaces (API). Thus, the second set of articles puts particular emphasis on topics in the areas of SDR and SCA Implementations.

New wireless communications standards do not replace old ones, instead the number of standards keeps on increasing and by now an abundance of standards exists. Moreover there is no reason to assume that this trend will ever stop. Therefore, the software-radio concept is emerging as a potential pragmatic solution: a software implementation of the user terminal able to dynamically adapt to the radio environment in which the terminal is located. For manufacturers this could result in shorter development time, cheaper production due to higher volumes. Furthermore software radio has advantages for consumers because it enables only software updates for new functionality without new hardware. Because of the analog nature of the air interface, a software radio will always have an analog front-end. In an ideal software radio, the analog-to-digital converter (ADC) and the digital-to-analog converter (DAC) are positioned directly after the antenna. Such an implementation is not feasible due to the power that such a device would consume and other physical limitations. It is therefore a challenge to design a system that preserves most properties of the ideal software radio while being realizable with current-day technology. Such a system is called a software-defined radio (SDR). A flexible, all-standard radio will consume more energy than a dedicated radio for a single standard. The first flexible radio could be an application where power consumption is less an issue; an example being a flexible radio in a notebook. This thesis presents such a radio with the focus on wireless LAN standards. These standards use phase modulation or OFDM in the $2.4$ GHz or $5$ GHz frequency band, so we decided in our project to combine a receiver of a phase modulation standard (Bluetooth) with an OFDM receiver (HiperLAN/2) first. In our view SDR is an implementation technology: the HiperLAN/2 hardware is that complex to the Bluetooth hardware that the Bluetooth receiver may be added to the HiperLAN/2 one at limited costs. In this thesis we describe how the physical layer of the OSI model of a phase-modulation receiver can be combined with an OFDM receiver at a functional level. The second goal of this research is to investigate whether this combined receiver can be implemented in software running on a General Purpose Processor (GPP) and estimate the costs of such an implementation with respect to power consumption and computational power requirements. For this reason, a testbed has been developed where all baseband physical layer functions have been successfully mapped on a Pentium 4 processor. This has been tested in combination with a CMOS-integrated wideband analog SDR front-end, containing a low noise amplifier, down-conversion mixers and filters. The testbed can be extended to other standards, because the only limitations in our testbed are the maximal channel bandwidth of $20$ MHz, the dynamic range of the wideband SDR analog front-end and the processing capabilities of the used PC. In 1999, Bose showed for second-generation mobile standards that it is possible to perform most baseband functions of the physical layer on a GPP processor. In his research, I/O was one of the main bottlenecks. In thesis we have identified that this is no longer true for current-day computers. Nowadays, an important bottleneck is the latency of the operating system, because wireless standards require fast response times. Major contributions of this thesis to the field of SDR research are extending the work of Bose for wireless LAN standards and developing a functional SDR receiver architecture that is capable of receiving standards that use OFDM or phase modulation.

The Lunar Augmented Navigation Service (LANS) is the lunar equivalent of GNSS for future lunar explorations. It offers users accurate position, navigation, and timing (PNT) capabilities on and around the Moon. The Augmented Forward Signal (AFS) is a standardized signal structure for LANS, and its recommended standard was published online on 7 February 2025. This work presents software-defined radio (SDR) implementations of the LANS AFS simulator and receiver, which were rapidly developed within a month of the signal specification release. Based on open-source GNSS software, including GPS-SDR-SIM and Pocket SDR, our system provides a valuable platform for future algorithm research and hardware-in-the-loop testing. The receiver can operate on embedded platforms, such as the Raspberry Pi 5, in real-time. This feature makes it suitable for lunar surface applications, where conventional PC-based SDR systems are impractical due to their size, weight, and power requirements. Our approach demonstrates how open-source SDR frameworks can be rapidly applied to emerging satellite navigation signals, even for extraterrestrial PNT applications.

Since the initiation of the Joint Tactical Radio System (JTRS) program, the concept of software defined radio (SDR) has received considerable attention and significant progress has been made. While the raison d'etre of SDR is somewhat different for military and commercial applications, they share similar challenges in implementing a true SDR. A true SDR faces numerous hardware and software challenges, many of them still to be addressed by research. In the literature concerning SDR software architecture and requirements, the technology requirements tend to be sidelined. This is mainly because, in the JTRS program, the focus is on voice and low data rate applications; also, the frequency band is limited to UHF. On the other hand, the implementation cost is less of a concern for now. However, by the emergence of advance warfare technology where it is required to transport more bits per warrior to accommodate video and telemetry data, and also by introducing initiatives similar to the JTRS to other communication systems, the technology requirements of SDR have to be revisited. The paper focuses on the hardware technology aspect of SDR. The main technical objective of SDR is a versatile reconfigurable platform, which provides interoperability. The main blocks of a true SDR are: intelligent antenna; programmable RF modules; high-performance digital-to-analog (DAC) and analog-to-digital converters (ADC); digital signal processing (DSP) techniques/technology; interconnection technology.

Currently software defined radio (SDR) is implemented by using DSP only or by using DSP plus FPGA chip. For DSP processing speed of the bottleneck problem, a complete FPGA IF software radio implementation is proposed in this paper. Traditional solutions use only FPGA for digital up and down conversion, modulation and demodulation; design proposed in this paper based on the FPGA chip, a CPU processor for SDR is designed. By using this processor, the full realization of all digital signal processing algorithms on software radio is implemented by FGPA only. Because of the full use of FPGA to implement software radio, so that the system power consumption is smaller, to solve the needs of software radio for defined power. In this paper, based on the FPGA chip CPU design method, the proposed greatly reduces the difficulty of FPGA development; the use of C language and assembly language to develop digital signal processing on FPGA platform, greatly reducing system development time.

Cyber is concerned with networks of systems in all their possible forms. Electronic warfare (EW) is focused on the many different uses of the electromagnetic spectrum (EMS). Given that many networks make use of the EMS (wireless networks), there is clearly large scope for collaboration between the cyber-warfare and EW communities. Unfortunately, such collaboration is complicated by the significant differences between these two realms. Software-defined radio (SDR) systems are based on interfaces between the EMS and computers and thus offer tremendous potential for encouraging cyber-EW collaboration. The concept of SDR is reviewed along with some hardware and software SDR systems. These are then used to propose a number of projects where SDR systems allow collaboration between the cyber and EW realms to achieve effects which neither realm could achieve alone.

A software-defined Radio (SDR) is a wireless communication system whose main radio functionalities are implemented in software on an embedded system instead of hardware. The advantages of SDR include its wide range of frequency channels that have configurable bandwidths in addition to its support of multiple configurations and modulations. In this paper, an SDR bridge implemented within a wireless sensor network (WSN) is developed. The SDR bridge is inserted as a gateway between sensor nodes and the end-user receiver to add security to the overall network. For this study, LoRa link is chosen to ensure communication between the network components because of its low power consumption and its long range. Typically, the sensor nodes will send their data to the SDR bridge using LoRa modulation. The bridge will add a layer of security to the overall system by encrypting the signals sent within the bridge. Experimental results found during this study showed that the SDR Bridge allows successful interconnection of the sensor nodes and the end-user receiver. Also, the SDR Bridge prevented reception of the data by the user when data was encrypted unless the proper key was used. Encryption of the signal did not have a significant effect on the QoS since the Packet Loss Ratio (PLR) of the link was around 1.6%. When the bridge is used, the Received Signal Strength Indication (RSSI) was also within the typical values for the LoRa receiver.

A software-defined radio (SDR) for ultrawideband (UWB) communication systems places several stringent requirements on the analog-to-digital converter (ADC). One alternative to using a single ADC is to sample the received signal with an array of lower speed ADCs that were driven by interleaved sampling clocks; however, mismatches among the ADCs will result in signal distortion. This paper makes three important contributions to overcoming this problem: 1) analytical quantification of the impact of ADC gain, offset, and timing mismatches on the performance of a time-interleaved sampling ADC array for UWB signals; 2) demonstration of the efficacy of using a pilot-based matched-filter architecture to mitigate the impact of timing mismatches in the presence of multipath; and 3) implementation of an 8-ADC time-interleaved UWB SDR testbed that operates at an effective sampling frequency of 6.4 GHz. In addition, our findings allow for the design specification of the number of pilots required to obtain a desired system performance. The simulation and measured performance results from this paper demonstrate that ADC mismatches can be controlled to within plusmn10%, yielding acceptable levels of distortion and bit-error-rate (BER) performance on the UWB SDR testbed. Both analytical and simulation results also demonstrate the efficacy of a pilot-based matched filter in mitigating the impact of timing mismatch errors, even in the presence of multipath.

In this paper a software-defined radio (SDR) implementation of a wireless transmitting (Tx) system is proposed. It is intended for real-time wireless transfer of time-critical control, diagnostics, and calibration data between a hardware-in-the-loop (HIL) test system and an automotive electronic control unit enabling novel HIL testing methods. The introduced SDR Tx system applies the wideband physical layer IEEE 802.11p and is designed for low Tx latency. Besides, it provides adaptivity in terms of a listen-before-talk mechanism that is mandatory required by the revised European spectrum regulations in the 2.4GHz industrial, scientific, and medical frequency band. Using hardware measurements concerning Tx latency and performance it is shown that the SDR Tx system offers an appropriate solution to evaluate the introduced real-time wireless application.

The study developed and evaluated the performance of an improved algorithm to demodulate sampled data frequency modulation (FM) signals in typical field programmable gate array (FPGA) - based software defined radios (SDR). An algorithm, based on the modification of a standard differentiate-divide FM demodulator was developed. The hardware resources requirement and the input noise suppression ability of the developed algorithm were investigated. The demodulator developed requires a quarter of the hardware resources needed by conventional differentiate-divide FM demodulators. The output signal to noise ratio (SNR) of the developed demodulator is lower than that of the standard differentiate divide-demodulator when the input carrier to noise ratio (CNR) is less than 45 decibels. The SNR plot of the developed demodulator is more linear, compared to that of the original differentiate-divide demodulator. This implies that the developed demodulator can be implemented using smaller sized FPGAs, thus reducing cost and the power dissipated. The small silicon area occupied by the demodulator gives room for instantiation of more demodulators and other signal processing units on the same FPGA chip

This paper is devoted to the software-defined radio (SDR) implementation of frequency modulated antipodal chaos shift keying (FM-ACSK) communication system. This novel and perspective class of spread-spectrum systems employs chaotic synchronization for the acquisition and tracking of the spreading signal and does not need resource-demanding cross-correlation usually employed for this purpose. This paper aims to present how to implement a full FM-ACSK communication system, including additional synchronization circuitry, using SDR and MATLAB Simulink. Moreover, for the first time, the performance of FM-ACSK in real conditions using over-the-air transmission between two SDRs is assessed. In the paper, it is shown that the presented class of the spread spectrum systems demonstrates good performance in low signal-to-noise ratio (SNR) conditions, and it is immune to large carrier frequency offset (CFO). The proposed solution fits well to low-speed long-range wireless sensor network (WSN) applications.