FLYOS: Integrated Modular Avionics for Autonomous Multicopters

Integrated Modular Avionics (IMA) architecture has emerged as the de-facto standard for hosting multiple avionic functions with different criticality levels on the same hardware platform. To further reduce size, weight, power and cost, the second generation IMA architecture aims to migrate multiple singlecore IMA partitions onto a multi-core hardware platform. In this paper, we propose a framework to safely allocate and schedule communicating, mixed-criticality IMA partitions on a cache-based multi-core platform with the added constraint that certain partition pairs should not be allocated on the same core for safety and security reasons. Simulation results demonstrate the effectiveness of our approach in allocating and scheduling partitions while respecting all constraints.

This paper presents research funded by European Space Agency (ESA) / European Space Research and Technology Engineering Centre (ESTEC) into the development of technology to incorporate security functions into spacecraft flight software. The security functions are derived from the time and space partitioning mechanism within the Integrated Modular Avionics (IMA) concept. ESA is establishing a software reference architecture for future avionics that consists of a layered architecture with defined interfaces and functionality, and abstraction levels per layer. The lower level layers handle the computer issues and each progressively higher layer adds increasing functionality and services up to the implementation of the flight software applications. This approach is complementary to the Multiple Independent Levels of Security (MILS) concept. The security components are added at the lowest layer in the form of a separation kernel which is responsible for enforcing the time and space partitioning of the flight software. The security components complement the safely critical elements of a separation kernel with measures to enforce the confidentiality, integrity and availability of data. The research study used the EBIOS method to establish a set of security objectives and functional requirements for flight software. Two separation kernels were selected, one commercial and the other open-source, and successfully ported to the LEON3 spacecraft processor. An attempt was then made to verify the kernels against the security functional requirements. The verification was incomplete because the kernels did not support all of the security mechanisms specified in the requirements. However the technology has been established and can be upgraded to fully provide the security functions for future flight software.

The implementation of the Multiple Independent Levels of Security (MILS) software architecture on modern microprocessor architectures has become technically feasible in recent years. This allows MILS-based systems to host applications and data of multiple security classifications concurrently on a uniprocessor platform at affordable cost. In this paper, the potential requirements for the implementation of a separation kernel to support MILS systems on multicore processor architectures will be considered, and the design challenges associated with its potential implementation on the NXP (formerly Freescale) QorIQ™ P4080 multicore processor will be discussed. Finally, the potential use of a MILS Multicore separation kernel in two use cases will be presented - a Cross-Domain System (CDS) network gateway, and a Multi-Level Secure (MLS) Integrated Modular Avionics (IMA) platform.

Recent improvements in the performance and security architecture of modern microprocessor designs have made the implementation of the Multiple Independent Levels of Security (MILS) software architecture technically feasible and at affordable cost. Reaching this inflexion point has enabled the development of MILS systems on single-core processor architectures comprising applications and data of multiple security classifications hosted concurrently on the same platform. In this paper, the potential requirements for the implementation of a separation kernel to support MILS systems on multicore processor architectures will be considered, and the design challenges associated with its potential implementation on the Freescale QorIQTM P4080 multicore processor will be discussed. Finally, the potential use of a MILS Multicore separation kernel in two use cases will be presented - a Cross-Domain System (CDS) network gateway, and a Multi-Level Secure (MLS) Integrated Modular Avionics (IMA) platform.

Reliability and vehicle survivability are key factors in achieving mission success for UAV aircraft. Maximizing these qualities is a challenging goal for tactical UAV’s exposed to target defenses as well as adverse environmental conditions and to structural or control system failures during extended length missions. Under damage conditions, using any operable control effectors becomes a critical need. These effectors could include conventional control surfaces, propulsion changes for multi-engine vehicles, and mass (fuel) transfer in lateral or longitudinal axes. Also needed may be recovery situations from extreme loss of control and upset conditions requiring correction flight control commands during flight with large angle of attack and sideslip. A major control effector for these conditions is the propulsion system of the vehicle. This control method requires two or more engines on the UAV. Engine thrust changes can change the flight path and attitude of the vehicle, and can be used as either an augmentor or for primary control of the vehicle. This use of propulsion changes to stabilize and control flight path of UAV’s is possible if sufficiently fast response time can be obtained from the engines. Flight test research conducted by NASA and Boeing on both high performance tactical aircraft and transport aircraft have demonstrated excellent potential for use of Propulsion Flight Control as part of the primary control system for UAV aircraft. Control techniques, remote pilot command methods and control station displays from these flight development programs can be applied to UAV aircraft. An important consideration for UAV aircraft is flight path control during operation outside of the normal maneuver boundaries of the vehicle, possibly caused by gust upsets, severe maneuvers for threat avoidance, structural failure, or other unanticipated causes. Propulsion control offers better response at extreme angle of attack, often better than using conventional control surfaces. Another UAV design issue is control of a tailless aircraft configuration, where the usual approach is use of split ailerons or flaps to give directional forces to the vehicle. The problem with this approach is the drag generated by these split surfaces can reduce range and speed. An alternate approach for tailless UAV’s with two or more engines is to use commanded differential thrust from the left and right engines to act as the control effector for yaw stability and for crosswind landings. Propulsion control can be a significant factor in UAV normal and adverse operating conditions. Engine controller modes integrated with flight control offer the means to achieve required flight path control during varied operating conditions of the UAV.

Heterogeneous multicore platforms are becoming an attractive choice to deploy mixed criticality systems demanding diverse computational requirements. One of the major challenges is to efficiently harness the computational power of these multicore platforms while deploying mixed criticality applications with timeliness properties. Energy efficiency is also one of the desired requirements in the design phase, and therefore it is often difficult for the system designer to simultaneously satisfy those sometimes contradictory requirements. In this paper, we propose a novel partitioning algorithm for unrelated heterogeneous multicore platforms to map mixed criticality applications. The algorithm not only ensures the timeliness in different modes of execution but also tries to allocate the applications to their energy-wise favourite cores. We considered a realistic power model that further increases the relevance of the proposed approach. We have performed an extensive set of experiments to evaluate the performance of the proposed approach, and we show that in the best-case, we achieve a 23.8% gain in the average power dissipation over the state-of-the-art partitioned algorithm. Our proposed algorithm also has a better weighted schedulability when compared to the existing partitioned algorithms.

Heterogeneous multi-core platforms that contain different types of cores, organized as clusters, are emerging, e.g., ARM’s big.LITTLE architecture. These platforms often need to deal with multiple applications, having different performance requirements, executing concurrently. This leads to the generation of varying and mixed workloads (e.g., compute and memory intensive) due to resource sharing. Run-time management is required for adapting to such performance requirements and workload variabilities and to achieve energy efficiency. Moreover, the management becomes challenging when the applications are multi-threaded and the heterogeneity needs to be exploited. The existing run-time management approaches do not efficiently exploit cores situated in different clusters simultaneously (referred to as inter-cluster exploitation) and DVFS potential of cores, which is the aim of this paper. Such exploitation might help to satisfy the performance requirement while achieving energy savings at the same time. Therefore, in this paper, we propose a run-time management approach that first selects thread-to-core mapping based on the performance requirements and resource availability. Then, it applies online adaptation by adjusting the voltage-frequency ( V-f ) levels to achieve energy optimization, without trading-off application performance. For thread-to-core mapping, offline profiled results are used, which contain performance and energy characteristics of applications when executed on the heterogeneous platform by using different types of cores in various possible combinations. For an application, thread-to-core mapping process defines the number of used cores and their type, which are situated in different clusters. The online adaptation process classifies the inherent workload characteristics of concurrently executing applications, incurring a lower overhead than existing learning-based approaches as demonstrated in this paper. The classification of workload is performed using the metric Memory Reads Per Instruction (MRPI). The adaptation process pro-actively selects an appropriate V-f pair for a predicted workload. Subsequently, it monitors the workload prediction error and performance loss, quantified by instructions per second (IPS), and adjusts the chosen V-f to compensate. We validate the proposed run-time management approach on a hardware platform, the Odroid-XU3, with various combinations of multi-threaded applications from PARSEC and SPLASH benchmarks. Results show an average improvement in energy efficiency up to 33 percent compared to existing approaches while meeting the performance requirements.

Heterogeneous multicore platform has been widely used in various areas to achieve both power efficiency and high performance. However, it poses significant challenges to researchers to uncover more coarse-grained task level parallelization. In order to support automatic task parallel execution, this paper proposes a FPGA implementation of a hardware out-of-order scheduler on heterogeneous multicore platform. The scheduler is capable of exploring potential inter-task dependency, leading to a significant acceleration of dependence-aware applications. With the help of renaming scheme, the task dependencies are detected automatically during execution, and then task-level Write-After-Write (WAW) and Write-After-Read (WAR) dependencies can be eliminated dynamically. We extended the instruction level renaming techniques to perform task-level out-of-order execution, and implemented a prototype on a state-of-art Xilinx Virtex-5 FPGA device. Given the reconfigurable characteristic of FPGA, our scheduler supports changing accelerators at runtime to improve the flexibility. Experimental results demonstrate that our scheduler is efficient at both performance and resources usage.

This dissertation presents a comprehensive approach to addressing the challenges associated with the control and navigation of Unmanned Aerial Vehicles (UAVs), specifically focusing on robustness under GPS-denied, turbulent, and dark indoor conditions with various disturbances. Initial efforts involved designing and theoretically validating Sliding Mode Controllers (SMC) with Disturbance Observers using MATLAB/SIMULINK, optimized using offline Particle Swarm Optimization (PSO). In order to evaluate their performance, a lightweight simulator was developed to simulate both quadcopter and hexacopter configurations under the PX4 architecture. This simulator served to validate and compare the optimized SMC against PSO-optimized PID controllers. The results of these comparisons demonstrated the superior adaptability of the SMC, especially in environments characterized by significant sensor noise and disturbances. Subsequent practical indoor tests were conducted with real quadcopters, which provided additional verification of the robustness and reliability of the enhanced control theory with the actual UAVs under dynamic disturbances. To further evaluate the compatibility and adaptability of the SMC, this dissertation establishes a framework for interfacing with high-performance STMH7 chips, serving as the UAV microcontroller unit (MCU). This framework facilitates the connection of various sensors and provides guidance for constructing different quadcopter frames. Moreover, it enables the comparison of different flight controllers on distinct air-frames. Concurrently, the optimized SMC allows for remote dynamic parameter tuning during flight. In pursuit of improved localization capacity, the dissertation also explores the integration of an Intel Realsense D435i camera with an Inertial Measurement Unit (IMU) for Visual-Inertial Odometry (VIO) fusion within the Robot Operating System (ROS) environment. This integration employs an onboard companion computer for real-time VIO estimation and flight command. The effectiveness of the VIO algorithm is verified through both simulations and real-world experiments, highlighting its ability to enhance UAV localization and navigation. Additionally, a visual inertial odometry method for UAV Simultaneous Localization and Mapping (vSLAM) is tested and validated in both simulated and real drone environments. Furthermore, the dissertation introduces an innovative hybrid filtered multi-directional radar inertial odometry solution denoted as Hybrid-MRIO. This Error State Extended Kalman Filter (ES-EKF) based Radar Inertial Odometry (RIO) approach is implemented within the open-source PX4 autopilot system, enhancing UAV navigation accuracy and performance, and serves as a robust navigation alternative, particularly in challenging environments where traditional navigation systems prove ineffective, such as dark or smoky conditions. This solution integrates data from multiple software synchronized high-resolution Frequency-Modulated Continuous-Wave (FMCW) mmWave radars with an IMU. A subsequent 4D (x, y, z, doppler) mmWave radar SLAM (rSLAM) system has been developed, including three modules: front-end, loop detection module, and back-end. In the front-end, radar ego-velocity is utilized for states estimation and dynamic object removal, and a point cloud registration-based approach known as APDGICP (Adaptive Probability Distribution-GICP) is employed for keyframe detection. The loop detection module utilizes the intensity scan context to identify potential loop closure candidates. In the back-end, a pose graph is constructed, integrating RIO estimated odometry and identified loop closures for better localization. To develop fully-autonomous UAVs with their decision making modules, this dissertation details the development of a custom AI-powered fully-autonomous quadcopter equipped with companion computers and stereo IR cameras. Additionally, this dissertation discusses a swarm of small Unmanned Aerial Systems (SUAS) interconnected through a software-defined communications network. These drones demonstrated their capacity to independently/collaboratively execute a wide range of tasks, including target search, detection, identification, classification, tracking, and following, both in simulated and real-world scenarios. The system exhibits advanced collision avoidance capabilities and the ability to strategically respond to dynamic scenarios, such as changes in target behavior, highlighting its effectiveness in managing dynamic and challenging situations without the need for continuous human intervention.--Author's abstract

Reducing energy consumption while providing performance and quality guarantees is crucial for computing systems ranging from battery-powered embedded systems to data centers. This article considers approximate iterative applications executing on heterogeneous multi-core platforms under user-specified performance and quality targets. We note that allowing a slight yet bounded relaxation in solution quality can considerably reduce the required iteration count and thereby can save significant amounts of energy. To this end, this article proposes Approx-RM , a resource management scheme that reduces energy expenditure while guaranteeing a specified performance as well as accuracy target. Approx-RM predicts the number of iterations required to meet the relaxed accuracy target at runtime. The time saved generates execution-time slack, which allows Approx-RM to allocate fewer resources on a heterogeneous multi-core platform in terms of DVFS, core type, and core count to save energy while meeting the performance target. Approx-RM contributes with lightweight methods for predicting the iteration count needed to meet the accuracy target and the resources needed to meet the performance target. Approx-RM uses the aforementioned predictions to allocate just enough resources to comply with quality of service constraints to save energy. Our evaluation shows energy savings of 31.6%, on average, compared to Race-to-idle when the accuracy is only relaxed by 1%. Approx-RM incurs timing and energy overheads of less than 0.1%.

\n Loss of Control in Flight (LOC-I) is the most lethal type of air accidents in recent aviation history; however, its characteristics are still not well understood, especially from the perspective of the human pilot. This research analysed whether (and to which extent) a quantitative LOC-I detection criterion correlates with subjective pilots\\' opinions on the controllability of an aircraft. Six flight test pilots flew a Boeing 777 in four scenarios (different combinations of typical LOC-I precursors) in a flight simulator, and performed 13 manoeuvres specifically designed to assess different aspects of controllability. The aircraft controllability category was determined from the pilots\\' qualitative opinions for each manoeuvre, via the so-called Cooper-Harper Rating Scale (CHR), and from recorded flight data, according to the Quantitative Loss of Control Criteria (QLC). Statistical correlation tests determined the degree of correlation between the approaches. A positive weak statistically significant correlation was found between the controllability categories resulting from both CHRs and QLC, thus revealing a lack of clear connection between the understandings of a LOC-I by human pilots and quantitative engineering metrics. The outcomes suggest LOC-I detection criteria should be revised towards including qualitative pilots\\' opinion, i.e., human-related factors must be given proper attention prior to the introduction and spread of potential \\"LOC-I solutions\\" solely based on quantitative metrics.\n

: This report describes the progress made on a one year project entitled Cyber-physical multi-Core Optimization for Resource and cachE effectS (C2ORES). The project set out to tackle core research needed to automate and optimize the allocation of software to computing cores for cyber-physical DoD systems and create prototypical tools needed by DoD programs and developers. It yielded a system execution modeling and deployment optimization platform designed to help developers and testers of cyber-physical DoD systems choose a task parallelization and distribution architecture for a range of multi-core hardware platforms, including both homogeneous and heterogeneous multi-core hardware platforms.

This article presents the design of a video decoder using dynamic task partition approach on a heterogeneous dual-core embedded platform. For such systems, static task partition between the two cores at design time is a typical approach for application development. In this article, we propose a runtime dynamic task partition model and implement an MPEG-4 Simple Profile video decoder using this approach on a TI OMAP 5912 platform. Comparing with a traditional mobile video decoder optimized for the same DSP core, the performance gain from dynamic task partition is 38.4% on average. More importantly, the gain is achieved with the design constraint that the implementation effort for the dynamic task partition decoder is about the same as the effort using design-time task partition model. Unlike common belief that the inter-processor communication overhead would be too high to justify intense cooperation between two heterogeneous cores, this paper shows that it is indeed beneficial to adopt dynamic task partition model on commercially available heterogeneous multi-core platforms.

Heterogeneous multi-core platforms are increasingly attractive for embedded applications due to their adaptability and efficiency. This proliferation of heterogeneity demands new approaches for extracting thread level parallelism from sequential applications which have to be efficient at runtime. We present, to the best of our knowledge, the first Integer Linear Programming (ILP)-based parallelization approach for heterogeneous multi-core platforms. Using Hierarchical Task Graphs and high-level timing models, our approach manages to balance the extracted tasks while considering performance differences between cores. As a result, we obtain considerable speedups at runtime, significantly outperforming tools for homogeneous systems. We evaluate our approach by parallelizing standard benchmarks from various application domains.

This paper presents a study of the fly-by-wire system and its innovations in aeronautical industry. In manned aircraft the pilot is the primary and fundamental component to the operation of the flight control commands, their functions are diverse and complex as the type of aircraft used. Conventionally command over the flight control surfaces is to use bonds by metal cables and hydraulic transmission for the same devices, making it difficult to install autopilot systems. The aviation market is highly competitive these days and increasingly is driven to develop new technologies present in the various aircraft systems, this competitiveness leads the industry to create comfort, safety and low maintenance costs. In this context, one of the systems that evolved to meet these requirements is the fly-by-wire system, where the mechanical and hydraulic connections disappear, the system pilot commands are sent directly to computers that process and transmit an electrical signal by means of which the position the flight control surfaces must operate, this procedure becomes automatic piloting and therefore safer, more efficient and stable for the various flight regimes that an aircraft will operate manual.