Generic constructions of $$\mathbb {Z}$$-bent functions

Bent functions over the finite fields of an odd characteristic received a lot of attention of late years. In Cesmelioglu et al. (J Comb Theory Ser A 119:420---429, 2012), Cesmelioglu and Meidl (Des Codes Cryptogr 66:231---242, 2013), an efficient method of construction of weakly regular and non-weakly regular bent functions defined over a finite field with odd characteristic is presented. In this paper, we give an adaptation of this method to the ring of integers modulo $$p^m$$pm, where p is an odd prime and m is a positive integer. We emphasize that different results than the results of the finite field case are obtained in every application process. First, we give a method that constructs bent functions using plateaued functions by increasing the dimension. Then, in order to give concrete examples, we compute Walsh spectrum of some specific quadratic functions defined over the ring of integers modulo $$p^m$$pm and apply the construction method on these functions. There are notable differences between the cases when m is odd and even. Also, we explain how to determine weakly regular and non-weakly regular bent functions among the bent functions that are constructed by the method.

We consider an approach to the classification of n-variable Boolean bent functions of the nonlinearity degree 3. We utilize the apparatus of bent rectangles introduced by S. V. Agievich. This apparatus was used for the classification of 8-variable Boolean cubic bent functions. The results of our research allow to construct cubic bent functions that depend on an arbitrary even number of variables; the construction is based on well studied quadratic bent functions.

It is well‐known that the number of designs with the parameters of a classical design having as blocks the hyperplanes in PG(n, q) or AG(n, q), n≥3, grows exponentially. This result was extended recently [D. Jungnickel, V. D. Tonchev, Des Codes Cryptogr, published online: 23 May, 2009] to designs having the same parameters as a projective geometry design whose blocks are the d‐subspaces of PG(n, q), for any 2≤d≤n−1. In this paper, exponential lower bounds are proved on the number of non‐isomorphic designs having the same parameters as an affine geometry design whose blocks are the d‐subspaces of AG(n, q), for any 2≤d≤n−1, as well as resolvable designs with these parameters. An exponential lower bound is also proved for the number of non‐isomorphic resolvable 3‐designs with the same parameters as an affine geometry design whose blocks are the d‐subspaces of AG(n, 2), for any 2≤d≤n−1. © 2010 Wiley Periodicals, Inc. J Combin Designs 18: 475–487, 2010

In this paper, we deal with determining the exact values for the complexity of the five graph access structures on six participants, which remained as open problems in van Dijk's paper (Des Codes Cryptogr 6:143---169, 1995). We prove that the complexity for each of the five graph access structures is equal to 7/4.

Consider a maximum-length shift-register sequence generated by a primitive polynomial f over a finite field. The set of its subintervals is a linear code whose dual code is formed by all polynomials divisible by f. Since the minimum weight of dual codes is directly related to the strength of the corresponding orthogonal arrays, we can produce orthogonal arrays by studying divisibility of polynomials. Munemasa (Finite Fields Appl 4(3):252---260, 1998) uses trinomials over $${\mathbb{F}_2}$$ to construct orthogonal arrays of guaranteed strength 2 (and almost strength 3). That result was extended by Dewar et al. (Des Codes Cryptogr 45:1---17, 2007) to construct orthogonal arrays of guaranteed strength 3 by considering divisibility of trinomials by pentanomials over $${\mathbb{F}_2}$$ . Here we first simplify the requirement in Munemasa's approach that the characteristic polynomial of the sequence must be primitive: we show that the method applies even to the much broader class of polynomials with no repeated roots. Then we give characterizations of divisibility for binomials and trinomials over $${\mathbb{F}_3}$$ . Some of our results apply to any finite field $${\mathbb{F}_q}$$ with q elements.

In the paper of Kyureghyan and Pott (Des Codes Cryptogr 29:149–164, 2003), the linear feedback polynomials of the Sidelnikov–Lempel–Cohn–Eastman sequences were determined for some special cases. We found that Corollary 4 and Theorem 2 of that paper are wrong because there exist counterexamples for these two results. In this note, we give some counterexamples of Corollary 4 and Theorem 2, and correct them by readopting the negation of the condition of Lemma 5 as their necessary and sufficient conditions.

In this article we introduce a method of constructing binary linear codes and computing their weights by means of Boolean functions arising from mathematical objects called simplicial complexes. Inspired by Adamaszek (Am Math Mon 122:367–370, 2015) we introduce n-variable generating functions associated with simplicial complexes and derive explicit formulae. Applying the construction (Carlet in Finite Field Appl 13:121–135, 2007; Wadayama in Des Codes Cryptogr 23:23–33, 2001) of binary linear codes to Boolean functions arising from simplicial complexes, we obtain a class of optimal linear codes and a class of minimal linear codes.

Integrated analog circuit design in nanometer CMOS technologies brings forth new and significant reliability challenges. Ever-increasing process variability effects and transistor wear-out phenomena such as BTI, hot carrier degradation and dielectric breakdown force designers to use large design margins and to increase the uncertainty on the circuit lifetime. To help designers to tackle these problems at design time (i.e., Design For Reliability, or DFR), accurate transistor aging models, efficient circuit reliability analysis methods and novel design techniques are needed. The paper overviews the current state of the art in DFR for analog circuits. The most important unreliability effects in nanometer CMOS technologies are reviewed and transistor aging models, intended for accurate circuit simulation, are described. Also, efficient methods for circuit reliability simulation and analysis are discussed. These methods can help designers to analyze their circuits and to identify weak spots. Finally, cost-effective design techniques for more resilient and self-healing analog circuits are studied.

In this paper, we study the nonexistence of bent functions in the class of Boolean functions without monomials of degree less than d in their algebraic normal forms (ANF). We prove that n-variable Boolean functions in such class are not bent when there are not more than n + d - 3 monomials in their ANFs. We also show that an n-variable Boolean function is not bent if it has no monomial of degree less than ⌈3n/8 + 3/4⌉ in its ANF.

The development of complex electronic modules requires very efficient simulation technique for faster design and optimization process. For smaller component level models, current state of the art FEM/CFD tools is sufficient if appropriate boundary conditions are used. But for larger system level models, this approach can be computationally expensive as the finite element model can lead to very large set of equations. Hence, there is a need for much efficient computational methods such as model order reduction (MOR). MOR was developed to study property of dynamical systems to reduce their complexity without changing input/output to the system.

A framework for compiler construction of functional programming languages is described. The framework has been designed to allow experimenting with functional programming languages and their implementations. Its three main characteristics are: (1) given the existing implementation of a functional programming language (not necessary in a source code), the implementation of a new functional programming language can be easily and efficiently developed, using the framework; (2) the framework enables enhancement of already implemented languages with new features; and (3) implementations of the languages in the framework are transparent, which can be freely exchanged between the languages.

Circuit synthesis denotes the automated generation of logic networks from behavioral descriptions at an arbitrary level. Synthesis is becoming a key issue in VLSI design for efficient and flexible usage of cell and component. The architectural synthesis involves resource allocation, resource binding, and scheduling tasks. As the capacity of FPGAs increases, synthesis tools and efficient synthesis methods for targeted device become more significant to efficiently exploit the resources and logic capacity. This paper explores a design solution and synthesis optimization constraints for targeted FPGA device. The issue focuses on: the synthesis optimization for various modeling approaches; synthesizer producing sub optimal results for setting the target constraints too high; how an inefficient coding style can adversely impact synthesis and simulation, resulting in slow circuits. All the design solutions are elucidated with appropriate example. The module functionality are described using Verilog HDL and performance issues like slice utilized, simulation time, percentage of logic utilization, level of logic are analyzed at 90 nm process technology using SPARTAN6 XC6SLX150 XILINX ISE12.1 tool.

Purpose: To explore the individual experience of being a scooter user and the ways in which scooters impact the individual’s community and social engagement, daily activities and enhances mobility. Methods: A qualitative, constructive framework utilising purposive sampling and a semi structured interview was used with 14 individuals. Questions were categorised according to the International Classification of Functioning, Disability and Health framework into the three areas of activities, participation and environmental factors. Results: The three main themes identified through the research were knowledge, engagement and environments. Knowledge included a lack of concise information, and adequate trialling and training prior to purchase. Engagement consisted of participation and interaction demonstrating scooter use resulted in increased participation, role maintenance, choice, freedom and social interaction. Environments highlighted discrimination from the wider population and building design and barriers. Conclusions: The research demonstrated a strong positive impact on individual’s engagement from using a scooter, while highlighting a lack of adequate knowledge about scooters, batteries, skill ability and design along with environmental challenges of discriminatory attitudes and physical barriers. The research indicates the need for pre-purchase assessments and trials along with improvements in community attitudes and environments.Implications for RehabilitationDevelopment of a pre-purchase assessment including specific core skills for scooter use is of great importance to minimise accidents and death as a consequence of scooter driving.Education and training of prescribers and suppliers of scooters is important to match needs and skills to enable a better fit of scooter to user.Incorporation of adjustability of features within the standard design of scooters, including type of driving controls, seat height, and adjustment of distance to controls, will enable greater fit of scooter to the user s needs.

This paper addresses the filter design optimization (FDO) problem that is to find a set of filter coefficients which yields the least design complexity while meeting the required filter constraints. The design complexity of a filter is defined in terms of the total number of adders/subtracters, assuming that the multiplication of coefficients by the filter input is realized under a shift-adds architecture. Existing algorithms use efficient search methods, but none of them can guarantee the minimum design complexity. Hence, we propose an exact algorithm, called SIREN, that finds an optimum solution of the FDO problem under the minimum quantization value. It is based on a depth-first search method equipped with an exact technique, that finds the minimum number of adders/subtracters in the multiplier block of the filter, and search pruning techniques that enable it to be applicable to practical instances. Experimental results show that SIREN can still find better solutions than efficient FDO algorithms and its solutions lead to filters with significantly less area when compared to a straightforward filter design technique.

Two nonlinear feedback shift registers (NFSRs) of the same stage number are called isomorphic if their state diagrams are of the same cycle structure. In this paper, we focus on a class of isomorphic NFSRs that are derived from a previous work (Zhao et al. in Des Codes Cryptogr 86(12):2775–2790, 2018). First, we give an explicit formula for counting this class of isomorphic NFSRs, which generalizes the previous result given by Rozhkov (Discret Math Appl 20(2):127–155, 2010). Then we study the inherent relation of the affine sub-families among these NFSRs. The obtained result shows that the analysis of the affine sub-families of these NFSRs could be reduced to the analysis of the affine sub-families of a specific NFSR. Finally, we present a Galois representation of some specific isomorphic NFSRs whose periods of the output sequences are controllable.