GPU Based Angular Radial Transform for Image Analysis

Polar Fourier analysis can extract orthogonal and rotation invariant features and demonstrate superior performances in many image processing tasks. For real world applications, execution efficiency is always a significant challenge. With widespread use of Graphics Processing Unit (GPU), this research presents GPU accelerated polar Fourier analysis. Proposed parallel algorithm is based on mathematical properties of polar Fourier analysis and optimization techniques of GPU. Optimal parameter selections for GPU execution are also evaluated. In our experiments, with same computation result proposed method is over 170 times faster. Wide range of applications that using polar Fourier analysis will inspired from this work.

Graphical Processing Units (GPU) have become a vital source for data processing in many advanced or intelligent technologies. They have proven to be faster and more efficient than the Central Processing Unit (CPU) in computing large data sets. The automotive industry has adopted GPUs for Advanced Driver Assistance Systems (ADAS), but other systems like electric vehicles and autonomous vehicles will also employ GPUs soon. Although GPUs are faster at computing large data sets, a substantial increase in core temperature is challenging during the process. This review paper primarily focuses on active and passive cooling methods for GPUs in the automotive industry. The paper commences by addressing the role and need for GPUs in the automotive industry and explores the challenges they face and the factors that lead to an increase in temperature. The paper further reviews various cooling methods that original equipment manufacturers (OEM) use in the automotive industry. The outcomes of the review are a detailed understanding of the use of GPUs in automotive, a brief interpretation of heating issues in GPUs and what causes them, a comprehensive understanding of the cooling methods used to reduce the core temperature, and a perception of an anticipated technology to resolve the heating problem.

In radiation transport calculations, the effects of material temperature on neutron/nucleus interactions must be taken into account through Doppler broadening adjustments to the microscopic cross section data. Historically, Monte Carlo transport simulations have accounted for this temperature dependence by interpolating among precalculated Doppler broadened cross sections at a variety of temperatures. More recently, there has been much interest in on-the-fly Doppler broadening methods, where reference data is broadened on-demand during particle transport to any temperature. Unfortunately, Doppler broadening operations are expensive on traditional central processing unit (CPU) architectures, making on-the-fly Doppler broadening unaffordable without approximations or complex data preprocessing. This work considers the use of graphics processing unit (GPU)s, which excel at parallel data processing, for on-the-fly Doppler broadening in continuous-energy Monte Carlo simulations. Two methods are considered for the broadening operations – a GPU implementation of the standard SIGMA1 algorithm and a novel vectorized algorithm that leverages the convolution properties of the broadening operation in an attempt to expose additional parallelism. Numerical results demonstrate that similar cross section lookup throughput is obtained for on-the-fly broadening on a GPU as cross section lookup throughput with precomputed data on a CPU, implying that offloading Doppler broadening operations to a GPU may enable on-the-fly temperature treatment of cross sections without a noticeable reduction in cross section processing performance in Monte Carlo transport codes.

Data in a data center are stored dispersively. The data-oriented task computing disperses big data analysis tasks to different computing nodes. The extensive use of graphics processing unit (GPU) makes it urgent and important to study how to reasonably assign heterogeneous resources to different computing frameworks. We investigate the existing big data computing framework and the GPU computing. Based on the existing cluster resource management model and the GPU management model, we propose a hybrid heterogeneous resource management model that combines CPU resources with GPU resources. The computing nodes manage local resources and implement tasks; the resource management center concertedly manage various computing frameworks. We design and implement a hybrid domain resource sharing and allocation algorithm, which allocates the hybrid domain resources to computing frameworks according to the coordinated use of them so as to fairly share the hybrid domain resources among various computing frameworks and prevent the CPU from too many tasks but the GPU or CPU from resource "hunger". The experimental results show that the allocation algorithm can increase the use of heterogeneous resources and the number of completed tasks by around 15%.

There is great interest in the use of graphics processing units (GPU)for general purpose applications because the highly parallel architectures used in GPUs offer the potential for huge performance increases. The use of GPUs in image analysis applications has been under investigation for a number of years. This article describes modifications to the InsightToolkit (ITK) that provide a simple architecture for transparent use of GPU enabled filters and examples of how to write GPU enabled filters using the NVIDIA CUDA tools.This work was performed between late 2009 and early 2010 and is being published as modifications to ITK 3.20. It is hoped that publication will help inform development of more general GPU support in ITK 4.0 and facilitate experimentation by users requiring functionality of 3.20 or wishing to pursue CUDA based developments.

Current data centers leverage virtual machines (VMs) in order to efficiently use hardware resources. VMs allow reducing equipment acquisition costs as well as decreasing overall energy consumption. However, although VMs have noticeably evolved to make a smart use of the underlying hardware, the use of GPUs (Graphics Processing Units) for General Purpose computing (GPGPU) is still not efficiently supported. This concern might be addressed by remote GPU virtualization solutions, which may provide VMs with GPUs located in a remote node, detached from the host where the VMs are being executed. This chapter presents an in-depth analysis about how to provide GPU access to applications running inside VMs. This analysis is complemented with experimental results which show that the use of remote GPU virtualization is an effective mechanism to provide GPU access to applications with negligible overheads. Finally, the approach is presented in the context of cloud federations for providing GPGPU as a Service.

The use of graphics processing units (GPUs) in simulation applications offers a significant speed gain as compared to computations on central processing units (CPUs). Many simulation methods require a large number of independent random variables generated at each step. We present two approaches for implementation of random number generators (RNGs) on a GPU. In the one-RNG-per-thread approach, one RNG produces a stream of random numbers in each thread of execution, whereas the one-RNG-for-all-threads method builds on the ability of different threads to communicate, thus, sharing random seeds across an entire GPU device. We used these approaches to implement Ran2, Hybrid Taus, and Lagged Fibonacci algorithms on a GPU. We profiled the performance of these generators in terms of the computational time, memory usage, and the speedup factor (CPU time/GPU time). These generators have been incorporated into the program for Langevin simulations of biomolecules fully implemented on the GPU. The ∼250-fold computational speedup on the GPU allowed us to carry out single-molecule dynamic force measurements in silico to explore the mechanical properties of the bacteriophage HK97 in the experimental subsecond time scale. We found that the nanomechanical response of HK97 depends on the conditions of force application, including the rate of change and geometry of the mechanical perturbation. Hence, using the GPU-based implementation of RNGs, presented here, in conjunction with Langevin simulations, makes it possible to directly compare the results of dynamic force measurements in vitro and in silico.

In addition to the intended use of graphics processing units (GPU) to accelerate computer games, their potential has become apparent for scientific computations in the recent years. Molecular modeling and molecular design are only few examples of numerous research areas that are significantly benefiting from novel developments of hardware and software platforms. For example, the impact of high computational power of GPUs has been demonstrated in molecular dynamics (MD) simulations or quantum chemical (QC) calculations. Thus far, several MD programs have been adapted to GPU computing, including NAMD/VMD, GROMACS, AMBER, etc. In addition, modeling tools intended for molecular design based on receptor-ligand interactions, such as molecular docking or core hopping protocols have recently been updated for GPU environment. The tremendous increase in the computing power facilitated by the integration of GPUs and the availability of GPU-based systems could accelerate material research on nanoscale. The price/performance ratio of GPU-based systems supports the development of custom-made protocols for efficient modeling of biomolecular systems and nanostructures. GPU-related molecular modeling tools will also accelerate the combined quantum chemical/molecular mechanics (QC/MM) methodologies. An overview of the performance of NVIDIA Tesla GPU-based system built for high-performance and high-throughput computing aimed for biomolecular modeling and nanodesign is presented.

Network Function Virtualization (NFV) replaces the hardware that supports packet processing in network operation from specific- by general-purpose ones, reducing costs and bringing more flexibility and agility to the network operation. However, this shift can cause performance losses due to the non-optimal packet processing capabilities of the general-purpose hardware. Moreover, supporting the line rate of optical network channels with Virtualized Network Functions (VNFs) is a challenging task. This work analyzes the benefits of using Graphics Processing Units (GPUs) to support the execution of a Deep Packet Inspection (DPI) VNF towards supporting the line rate of an optical channel. The use of GPUs in VNFs has a great potential to increase throughput, but the delay incurred might be an issue for some functions. Our simulation was performed using an Intrusion Detection Systems (IDS) which performs DPI deployed as a VNF under real-world traffic scaled to high bit rates. Results show that the packet processing speedup achieved by using GPUs can reach up to 19 times, at the expense of a higher packet delay.

Over recent years, the use of Graphics Processing Units (GPUs) for general-purpose computing has become increasingly popular. The main reasons for this development are the attractive performance/price and performance/power ratios of these architectures.However, substantial performance gains from GPUs come at a price: they require extensive programming expertise and, typically, a substantial re-coding effort. Although the programming experience has been significantly improved by existing frameworks like CUDA and OpenCL, it is still a challenge to effectively utilise these devices. Directive-based approaches such as hiCUDA or OpenMP-variants offer further improvements but have not eliminated the need for the expertise on these complex architectures. Similarly, special purpose programming languages such as Microsoft's Accelerator try to lower the barrier further. They provide the programmer with a special form of GPU data structures and operations on them which are then compiled into GPU code.In this paper, we take this trend towards a completely implicit, high-level approach yet another step further. We generate CUDA code from a MATLAB-like high level functional array programming language, Single Assignment C (SaC). To do so, we identify which data structures and operations can be successfully mapped on GPUs and transform existing programs accordingly. This paper presents the first runtime results from our GPU backend and it presents the basic set of GPU-specific program optimisations that turned out to be essential. Despite our high-level program specifications, we show that for a number of benchmarks speedups between a factor of 5 and 50 can be achieved through our parallelising compiler.

The use of Graphics Processing Unit (GPU) for computational work has revolutionized how complex electromagnetic problems are solved. Complex problems which required supercomputers in the past for analysis can now be tackled and solved using personal computers by channeling the computational work towards GPUs instead of the traditional computer Central Processing Unit (CPU). Finite-Difference Time-Domain (FDTD) analysis, which is a computationally expensive method of solving electromagnetic problems is highly parallel in nature and can be readily executed in a GPU. We have developed an algorithm for three dimensional FDTD analysis of optical devices with micro and nano-structures using Compute Unified Device Architecture (CUDA). The developed algorithm exploits the benefits of multiple cores of GPU chips and boosts the speed of simulation without sacrificing its accuracy. We achieved a 25-fold speed up of simulation using CUDA compared to MATLAB code in CPU.

Recently, hierarchical cascading accelerated with graphics processing units (GPUs) has proven efficient for accelerating 3D periodic finite-element method (FEM) analysis of acoustic wave devices. However, the limited memory available in GPUs severely restricts the accuracy of the simulations; moreover, numerical libraries are not fully matured yet. This paper considers two techniques to circumvent these limitations. Firstly, to extend the size of the problems that can be handled, the use of GPUs can be limited to isolated cascading operations. While the related data transfer between RAM and GPUs hinders the efficiency of GPUs, significant acceleration is still achieved as compared to CPU-based implementation. Secondly, a GPU-friendly alternative is presented for the reduction of FEM system matrices to B-matrices. Examples of simulations of 3D periodic TCSAW, IHP, and XBAR arrays are provided.

The large power requirements of current High-Performance Computing (HPC) deployments has motivated that several supercomputers and research proposals consider the use of low-power processor architectures instead of the traditional mainstream, but power hungry, x86 designs. However, many of these proposals do not consider the use of GPUs (Graphics Processing Units). GPUs are power efficient devices while in use and, therefore, considering them is aligned with the power-efficiency efforts that motivated the use of low-power processors. In this paper we explore the use of GPUs in several low-power processor architectures in the context of the bioinformatics domain. To that end, we make use of the rCUDA remote GPU virtualization middleware to provide these low-power systems with access to GPU accelerators. In this study we leverage three different low-power processor architectures to execute three bioinformatics applications. The result of this exploration is that the Xeon D processor architecture is well suited for this purpose whereas other low-power architectures such as the Atom or ARM ones still need to be improved.

Convolution filtering is one of the most important algorithms in image processing. It is data-intensive, especially when dealing with high-definition images. Most previous studies on accelerating convolution computation in parallel focus on the use of graphics processing units (GPUs), whereas the central processing units (CPUs) always play the role of host to manage the data buffer and control flow. However, recent CPU architectures have seen significant modifications to parallel data computing capabilities, and the trend of integrating the CPU and GPU on a single chip is on a rise. We propose an approach to accelerate convolution filtering on the heterogeneous architecture of integrated CPU–GPU. We exploit the parallel processing power of vector instructions on a CPU and make it collaboratively function with the on-chip GPU. Two task assignment methods, static and dynamic task partitioning, are proposed for CPU–GPU collaboration. We evaluate our approach with images and filters of different sizes. The experimental results demonstrate that we can achieve 146 GFLOP/s at best using a quad-core CPU and the performance is 2.5 to 4.8 times faster than that of the single-GPU version of the OpenCV library. We also obtain 90 times speedup over the single-threaded CPU version. The results demonstrate that the proposed algorithm is efficient.

The complexity estimate of a hash collision algorithm is given by the unit hash compressions. This paper shows that this figure can lead to false runtime estimates when accelerating the algorithm by the use of graphics processing units (GPU) and field-programmable gate arrays (FPGA). For demonstration, parts of the CPU reference implementation of Marc Stevens' SHA-1 Near-Collision Attack are implemented on these two accelerators by taking advantage of their specific architectures. The implementation, runtime behavior and performance of these ported algorithms are discussed, and in conclusion, it is shown that the acceleration results in different complexity estimates for each type of coprocessor.