Ground leakage current reduction in single-phase grid-connected power converter

Power inverters produce common mode voltage (CMV) and common mode current (CMC) which cause high-frequency electromagnetic interference (EMI) noise, leakage currents in electrical drives application and grid-connected systems, which consequently drops the efficiency of the system considerably. This CMV can be mitigated by designing suitable EMI filters and/or investigating the effects of different modulation strategies. In this paper, the effect of various modulation techniques over CMV and CMC are investigated for two-level and three-level inverters. It is observed that the modified third harmonic injection method reduced the CMV and CMC in the system by 60%. This modified pulse width modulation (PWM) technique is employed along with EMI chokes which results in reduced distortion of the system.

Electromagnetic Interference (EMI) noise is one of the major issues during the design of the grid-tied power converters. Presence of high dv/dt in Common Mode (CM) voltage, excites the parasitic capacitances and causes injection of narrow peaky current to ground. This results in high EMI noise level. A topology consisting of a single phase PWM-rectifier with LCL filter, utilising bipolar PWM method is proposed which reduces the EMI noise level by more than 30dB. This filter topology is shown to be insensitive to the switching delays between the legs of the inverter. The proposed topology eliminates high dv/dt from the dc-bus CM voltage by making it sinusoidal. Hence, the high frequency CM current injection to ground is minimized.

The development of the world demands on the progress of electricity operation and quality enhancement. Microgrid (MG) is a solution that manages the additional need of electricity. The MG generates electricity mostly from renewable energy sources, e.g. solar, wind and hydro. Most renewable energy sources require energy storage system as they are highly unpredictable in nature. An inverter is needed to convert that stored DC power to AC. The presence of a capacitor within the grid provides a galvanic connection that varies the common mode (CM) voltage of the inverter. Thus, the leakage current as well as the total harmonic distortion (THD) of the grid voltage and current increases. The increase of the leakage current hampers the safe operation of the MG. Now-a-days transformerless inverter is gaining more attention because of high efficiency, low cost, less weight and the capability of eliminating the high frequency component from the inverter CM voltage. In addition, a controller inclusion with a transformerless inverter can maintain a near-seamless performance. This paper proposes a blended technique of an improved H5 topology with an Integral Linear Quadratic Gaussian (ILQG) controller for grid-connected MG operations, that reduces the inverter leakage current by keeping the CM voltage constant. Thus it has the capability to reduce the THD of voltage and current. A comparative analysis has been carried out between this technique and existing topologies with different modulation techniques that helps to find out the most optimum inverter package to eliminate the leakage current and reduce the THD of grid voltage and grid current to almost zero.

Electromagnetic interference (EMI) noise is one of the major issues during design of grid-tied power converters. A novel LCL filter topology for a single-phase pulsewidth modulation (PWM) rectifier that makes use of bipolar PWM method is proposed for a single-phase to three-phase motor drive power converter. The proposed topology eliminates high dv/dt from the dc-bus common-mode (CM) voltage by making it sinusoidal. Hence, the high-frequency CM current injection to the ground and the motor-side CM current are minimized. The proposed filter configuration makes the system insensitive to circuit nonidealities such as mismatch in inductors values, unequal turn-on and turn-off delays, and dead-time mismatch between the inverter legs. Different variants of the filter topology are compared to establish the effectiveness of the proposed circuit. Experimental results based on the EMI measurement on the grid side and the CM current measurement on the motor side are presented for a 5-kW motor drive. It is shown that the proposed filter topology reduces the EMI noise level by about 35 dB.

A common-mode (CM) voltage reduction modulation for a three-level full bridge phase-shift DC-DC converter is proposed in this paper. With conventional modulation, the three-level full bridge phase-shift DC-DC converter generates considerable CM voltage. The CM voltage is undesired because it causes CM current noise and deteriorate EMI performance. To solve this problem, methods including bulky EMI filter or additional cancellation circuits are usually used. However, it increases system cost, and reduces efficiency. The proposed modulation method can reduce the CM voltage close to zero and reduce the CM current substantially. The method does not require any additional circuit. The size of EMI filter could also be reduced due to the reduced CM voltage and current. Compared with conventional methods, the proposed CM voltage reduction method has the benefits of effective, low cost and high efficiency. The principle of the proposed modulation method is presented in this paper. The correctness and effectiveness of the method is verified by simulation and experimental results.

The existing ground leakage current suppression methodologies are effective when Photovoltaic (PV) arrays' stray capacitors are small (in several nano-Farads). In such case, the High Frequency (HF) content of the inverter's Common-Mode (CM) noise is dominating the ground leakage current Root-Mean-Square (RMS) value. However, when the PV parasitic capacitors are large (in several micro-Farads), which is realistically the case with higher power ratings (i.e. Po > 5 kW); the grid CM noise is the major contributor to the ground leakage current. In fact, this makes the existing approaches for leakage current suppression ineffective. Therefore, this paper proposes novel filter topologies for transformerless grid-connected PV applications with a novel CM control scheme that suppress the ground leakage current when the PV parasitic capacitors are large. These filters are termed as Shunt-less filters. Additionally, the proposed topologies are equivalent to well-established filters, such as LCL, LLCL and LCL-L r C r . This fact makes the selection of their parameters as conventional filters. The theoretical analyses are validated with a 10 kW / 240 V rms grid-tied PV system. The results have demonstrated that the proposed control scheme can reduce the ground leakage current RMS value from 1.8 A to 60 mA.

Variable speed drive (VSD) systems including diode rectifiers and two-level voltage source inverters (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{2 L}$</tex>-VSI), connected to the induction motor through long cables, are common in modern industrial applications. However, the inverter's switching behaviors generate unwanted side effects such as common-mode (CM) voltage due to fast switching transients, while the long cable may cause over-voltage at the motor terminal. CM voltage generates CM current through parasitic coupling paths in the VSD system, causing electromagnetic interference (EMI). Overvoltage increases stator winding stress, leading to premature motor failures such as winding-to-ground and turn-to-turn insulation faults. These stator insulation faults create impedance imbalance, and inturn affects the propagation of the CM current. This paper evaluates the stator winding-to-ground insulation fault by analyzing CM current at different measurement points using a laboratory VSD reference system. A frequency-domain CM simulation model is proposed to precisely validate this fault and predict the CM current up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1 0 ~ M H z}$</tex> at the motor side.

PWM inverters used in motor drives produce high frequency Common Mode Voltages (CMV) which results in Common Mode (CM) currents and bearing currents due to parasitic capacitances. These currents cause abominable effects in electronics devices and develop voltage at motor shaft. When voltage exceeds dielectric breakdown voltage of lubricant film, it develops a huge bearing current which can damage bearings in very short interval. This paper emphasis on mitigation of CM currents and bearing currents by minimizing CMV produced by inverter-motor system based on selection and refinement of PWM algorithm without any additional hardware change. Multilevel inverters are apt for industrial applications due to low voltage distortion and less stress on switching devices than conventional two level inverter. To Investigate the effects on CMV, CM currents, bearing currents and motor shaft voltage, a high frequency Induction Motor (IM) model was chosen and analysis was done with different PWM techniques. The present work focused on three level Diode Clamped MultiLevel Inverter (DCMLI) and proposed new Space vector Pulse width Modulation (SVPWM) by choosing reductant CMV vectors in combination with sequence of changing one state in phase during switching transition. The proposed SVPWM technique shows the effectiness to reduce CMV as well as Electro-Magnetic Interference (EMI) and validated using MATLAB simulations.

A single-phase transformerless full-bridge photovoltaic grid-tie inverter is presented. It utilizes 1) a virtual ground technique to mitigate ground leakage current, 2) a hybrid pulsewidth modulation (HPWM) scheme to profile the output current and prevent sudden changes in the common-mode voltage, and 3) a nonlinear output inductor to attenuate current ripple around zero crossings and minimize filter size. The HPWM is effectively the same as unipolar PWM (UPWM), but with soft voltage transition modulation introduced around the zero crossings. Apart from low switching losses, the output filter is implemented with a minimum number of components to achieve high attenuation of ripple current. By deriving the switching trajectory, a mathematical model is formulated, and the ground leakage current and the output current with the traditional UPWM and the proposed HPWM schemes are compared. The output current harmonics caused by the nonlinear output inductor is analyzed by the Volterra theory. A 340 W, 380 Vdc/110 V ac, 50 Hz prototype has been built and evaluated.

A Simplified Filter Topology for Compensating Common Mode Voltage and Electromagnetic Interference in Induction Motor Drives

Common mode voltage is a key issue in variable speed AC motor drive, but conventional single three-phase voltage source inverter cannot effectively suppress the common mode voltage. The system of paralleled voltage source inverters is more flexible and can be utilized to implement novel modulation schemes to reduce the common mode component. This paper focuses on three modulation schemes which have different performance in common mode voltage suppression and fair comparison of electromagnetic interference is also implemented. Experimental results are provided to show the advantage of proposed method in common mode electromagnetic interference noise reduction and DC side electromagnetic interference filter design.

Transformerless Photovoltaic (PV) inverters are gaining popularity compared to their transformer-based counterparts. They are more efficient, cost-effective, and smaller in volume. Despite this, parasitic capacitance causes the common mode current to flow between the PV array and the grid. In addition to losses, leakage current increases electromagnetic interference (EMI) and poses issues to the protection system. Transformerless inverters should therefore be so designed that the leakage current is minimized. Common mode voltage changes (VCM) causes the leakage current. There are a number of PV inverter topologies that have been designed to minimize these variations. This paper discusses H4, H5 and HERIC single-phase PV inverter topologies. Circuit simulations have been used for analysis. HERIC Topology is best one of these since it reduces the leakage current with lowest power loss due to ac bypass instead of usual dc side decoupling. It is a type of resonant converter that operates at high frequencies to achieve efficient power conversion. In this work comparison has been made between topologies for their effectiveness in reducing leakage current. Moreover, its variation with load has been studied, a perspective missed in other studies.

In this paper, a new method to mitigate the common-mode (CM) voltage in neutral point clamped (NPC), three-level converters is proposed by analyzing the voltage vectors and related CM voltages. Currently, only 19 of 27 available voltage vectors are used in order to reduce the amplitude of CM voltage to be one sixth of the dc-link voltage. This is achieved by adding a constraint to the universal, multilevel PWM algorithm proposed by an earlier paper. The constraint will determine the value of the zero-sequence component adding to the fundamental component, thus selecting of the required voltage vector. Simulation and experimental results validate the proposed method, and show that the CM voltage is effectively mitigated and the maximum output voltage is not affected.

The common-mode (CM) noise in nonisolated dc-dc converters is mainly caused by the displacement current through the high <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv/dt</i> node in the circuit and the associated parasitic capacitance, and it may cause electromagnetic interference (EMI) to the surrounding equipments. To reduce the original CM noise and shrink the EMI filter size of non-isolated dc-dc converters, CM noise cancellation methods have been proposed, including the symmetry circuit, balancing technique, passive cancellation and CM voltage cancellation. In these methods, additional components or windings are required for reducing the CM noise. In this article, a new CM noise cancellation method in non-isolated dc–dc converters is proposed by adopting a split-winding configuration. Compared to the existing CM noise cancellation methods which require additional components, the proposed method in the buck, boost and single-ended primary-inductor converter (SEPIC) converters which runs in voltage step-up mode has the identical volume as their conventional circuit configurations. The proposed method is verified for a buck converter by experiment.

This paper presents a PWM strategy for the reduction of common-mode (CM) voltage generated by variable-speed motor drives composed of two-level, three-phase active-front-end rectifier and three-phase inverter. This method theoretically provides complete elimination of the CM voltage by synchronizing all inverter commutations with rectifier commutations, so that the resulting CM voltage does not vary. The degrees of freedom of this strategy are studied and an experimental implementation is provided on a 15 kW prototype to validate the method effectiveness. Taking into account dead-time compensation, measurements in time and frequency domains show that the CM voltage is strongly reduced and that more than 15 dB reduction is achieved in a wide frequency range.