High-Efficiency Single-Phase Transformerless PV H6 Inverter With Hybrid Modulation Method

Transformerless single-phase inverters are preferring in residential grid-connected PV systems when compared to galvanic-isolated ones (i.e., transformer-based inverters). In addition to the special leakage current issue, high efficiency, power quality and reactive power injection are of concern that should be considered in grid-connected applications. Nowadays, the fast development of wide-bandgap (WBG) devices brings new challenges to transformerless inverters, e.g., electromagnetic interference (EMI) issues, but efficiency can be improved. This paper first reviews the full-bridge PV inverters seen from the perspective of topology configuration. The oscillation during switching transitions is analyzed and compared in typical full-bridge inverters under a hybrid modulation method, which has a significant relationship with the EMI issue. Then, power loss distribution is discussed to reveal the thermal performance under the hybrid modulation scheme with reactive power injection. Simulations are carried out on the full-bridge prototype to validate the discussions of the hybrid modulation strategy.

This paper adopts PAM+PWM hybrid modulation method in a five cascade SVG (Static Var Generator). Four PAM (Pulse Amplitude Modulation) units output a voltage which is of fixed amplitude and in phase with the system voltage; and current direct controlling method was applied in the only PWM (Pulse Width Modulation) unit to adjust the output reactive current. To balance the DC-side voltage, pulses rotated cyclic between PAM units. This paper put forward a new method that rotated the pulses in an asymmetric way, in which the DC-side voltage of the PAM units was elevated and that of the PWM unit was accordingly reduced. Further, this paper successfully balanced the DC-side voltage volatility of each H-bridge by reasonably distributing capacitor parameter. Finally, PSCAD simulation results and the SVG experimental prototype prove the validity of this method.

Rail-to-rail amplifiers are based on an input stage made up of two parallel-connected complementary differential pairs. The paper introduces a circuit technique for maintaining the small-signal behaviour (i.e. the transconductance, gm) of the amplifier constant over the entire input common-mode (CM) voltage range. The operation principle consists in comparing the total amplifier transconductance with a reference transconductance value and then generating an appropriate bias current for one of the two pairs of the rail-to-rail input stage. Thus, the technique is universal, since it is valid regardless of the gm/ID characteristic and the operating region of the input devices. Also, the accuracy in providing a constant transconductance does not depend on precise matching between n-channel and p-channel input transistors, which makes the technique robust. Experimental results from a 0.8-μm CMOS test chip demonstrate that amplifier transconductance variations, obtained as a function of the input CM voltage, are lower than for any previously reported technique.

The solid state transformer (SST) is a power electronic transformer that combines power electronic conversion technology with high frequency power conversion technology based on the principle of electromagnetic induction. Modulation strategies based on the input stage of modular multilevel solid state transformers currently have the following types: nearest level modulation (NLM), carrier phase shift modulation (CPS) and hybrid modulation. This paper focuses on the advantages and disadvantages of the nearest level modulation and hybrid modulation. Considering comprehensively, the hybrid modulation method is adopted in the input stage of the modular multilevel solid state transformer to realize the control of the solid state transformer rectifier stage. The simulation results show that the hybrid modulation method reduced the harmonic content of the grid side output current and the arm circulation to a certain extent.

Active Neutral Point Clamped three-level converters find extensive application in high-power scenarios. However, under conventional modulation strategies, they suffer from severe imbalance in power dissipation and thermal generation between inner and outer tubes, thereby compromising system reliability. To address this issue, novel modulation techniques that do not increase hardware complexity require investigation. This paper provides an in-depth analysis of the operating principles and multiple typical operating modes of the ANPC three-level converter. Building upon this foundation, a hybrid modulation method is proposed that cyclically alternates and sequentially cascades two drive modulation strategies with complementary loss characteristics. This approach achieves dynamic transfer and balancing of switching device loss stresses by rotating high-loss components across different time periods. Simulation results demonstrate that, compared to conventional single-modulation strategies, the proposed hybrid modulation scheme effectively balances power dissipation between the inner and outer tubes, significantly improving the system's temperature distribution without necessitating increased switching frequencies or additional hardware. This provides an effective solution for enhancing the operational reliability and engineering applicability of high-power ANPC converters.

In order to increase the output power and voltage levels, a nine-level ANPC/H-Bridge inverter for high power medium voltage motor drive applications is presented in this paper. Each phase of this inverter consists of two five-level ANPC bridges and all the phases are powered by a common DC-link, which is very suitable for ship integrated electric propulsion with open-winding multi-phase motors. A hybrid modulation method is adopted to control this inverter. The series connected or high-voltage switches in all the five-level ANPC bridges are operated at fundamental frequency and the other switches are controlled with PS-PWM, which is easy to implement and can achieve the natural voltage balance of the neutral-point potential and flying capacitor voltages. A capacitor voltage balancing method based on this hybrid modulation method is also proposed. Simulation and experimental results are presented to verify the validity of this method.

Nonisolated three-phase AC/DC converter concepts facilitate more compact and more efficient realizations of future electric vehicle (EV) chargers. However, without the galvanic isolation and/or high common-mode (CM) impedance provided by an isolation transformer, nonisolated chargers must employ other means to suppress CM leakage currents to ground sufficiently and to prevent nuisance tripping of mandatory residual current devices (RCDs). Typically, the required electromagnetic interference (EMI) filters reduce high-frequency (HF) CM leakage currents to uncritical values. However, low-frequency (LF) CM voltages, e.g., generated by third-harmonic injection, may drive significant LF CM currents through the parasitic capacitances of the DC output (including the battery pack) to protective earth (PE). Therefore, considering a nonisolated three-phase buck–boost (bB) current DC-link PFC rectifier system that consists of a buck-type current-source rectifier (CSR) stage and a three-level boost-type DC/DC-stage, this article first proposes a virtual grounding control (VGC) of the DC output voltage midpoint. VGC employs the DC/DC-stage to compensate the LF (third-harmonic) CM voltage inherently generated by the CSR-stage and thus controls the LF CM voltage between the DC output midpoint and PE to zero. This enables further a direct connection of the DC output midpoint to PE, where an additionally proposed ground current control (GCC) ensures near-zero LF CM leakage current. The proposed concepts are verified with a 10-kW hardware demonstrator (power density of 6.4 kW/dm 3 or 107.5 W/in 3 and full-load peak efficiency of 98.5%) considering terra–terra (TT) and terra–neutral (TN) grounding systems. With a direct connection of the DC output midpoint to PE, GCC limits the LF CM leakage current to < 6 mA RMS, i.e., significantly below typical RCD trip levels, and, using the human-body impedance model according to UL 2202, achieves a test voltage of 110 mV that is clearly below the most stringent limit (250 mV) of the standard.

Aiming at the application of full-bridge LLC resonant converter in electric vehicle on-board charger, a PSM+PFM hybrid modulation method is used to optimize the working situation of the LLC resonant converter. At the same time, by combining the advantages of phase shift modulation (PSM) and pulse frequency modulation (PFM), linear active disturbance rejection control (LADRC) is designed to realize efficient closed-loop compensation of the converter, and improve the stability and dynamic response performance of the system under different load conditions. The experimental results show that the control strategy can effectively improve the efficiency and performance of the LLC resonant converter and meet the demand of EV charging.

Pseudo-dc-link inverters are promising due to the single-stage configuration. The inverters can be isolated by high-frequency transformers, which also provide the freedom of step-up/down through winding turns ratio. Conventionally, a pseudo-dc-link inverter is based upon a pulsewidth modulation converter like flyback converter, but the accompanying switching losses can degrade efficiency and overall system performance. Alternatively, resonant converters (e.g., series resonant converter) seem to fit the need as they typically display soft-switching characteristics. However, the relevant research results are scarce because of two main reasons: high resonant current and limited soft-switching range. To overcome the difficulties, a hybrid modulation method is proposed in this article for a pseudo-dc-link inverter based on series resonant converter. In high-line region, the inverter operates with variable-frequency modulation, which leads to zero-voltage switching and relatively low-resonant current. In low-line region, the inverter operates with a short-pulse density modulation so that switching losses are greatly curtailed without excessive resonant current. The merits in both regions together contribute toward the high efficiency of the inverter. This article presents the operational principle of the proposed modulation as well as a comparison with other modulation methods. In addition, a 400 V–230 V ac, 2-kW prototype was built to verify the proposed modulation and the peak efficiency reaches 98.0%.

This paper presents a transformerless inverter topology, which is capable of simultaneously solving leakage current and pulsating power issues in grid-connected photovoltaic (PV) systems. Without adding any additional components to the system, the leakage current caused by the PV-to-ground parasitic capacitance can be bypassed by introducing a common mode (CM) conducting path to the inverter. The resulting ground leakage current is therefore well controlled to be below the regulation limit. Moreover, the proposed inverter can also eliminate the well-known double line frequency pulsating power that is inherent in single-phase PV systems. By properly injecting CM voltages to the output filter capacitors, the pulsating power can be decoupled from the dc-link. Therefore, it is possible to use long lifetime film capacitors instead of electrolytic capacitors to improve the reliability of the PV system. The mechanism of leakage current suppression and the closed-loop control of pulsating power decoupling are discussed in the paper in details. A 500 W prototype was also built and tested in the laboratory, and both simulation and experimental results are finally presented to show the excellent performance of the proposed PV inverter.

the author presents a new folded differential pair topology that is suitable for low-voltage applications. The new differential pair is made from floating-gate MOS (FGMOS) transistors and simultaneously provides a rail-to-rail common-mode input voltage range with a high rejection of the common-mode input voltage by keeping the sum of the two output currents fixed. Moreover, when biased in weak or moderate inversion, the allowable output voltage swing is also almost from rail-to-rail. The author discusses the operation of the circuit and some of the trade-offs involved in its design. He also shows experimental measurements from a version of the circuit, operating on a single 1.8 V power supply, that was breadboarded from transistors fabricated in a 1.2 /spl mu/m double-poly n-well CMOS process.

In this paper, a constant-gm rail-to-rail operational amplifier is proposed. The transconductance variation due to the changes in the input common-mode voltage is reduced by controlling the tail-current of the parallel nMOS and pMOS input differential pairs. In addition, a bump-smoothing technique is applied to the circuit to decline sub-threshold effects in transition regions, and therefore lower the overall gm variations. Furthermore, a stabilizing technique is employed in the output stage to minimize the fluctuation of the DC-gain and the phase margin by fixing the bias current of the cascode transistors. Thanks to stabilizing the DC-gain of the amplifier in the entire range of the input common-mode voltage, the circuit can be used as an accurate small-signal voltage amplifier in an external feedback loop for input signals with various common-mode voltages. The circuit is simulated in a standard 0.18 μm CMOS technology. The simulation results manifest that the gm variation is around ± 0.85% and the variations of the Gain–Bandwidth, the low-frequency voltage gain (DC-gain), and the phase margin are ± 1.20%, ± 3.75%, and ± 3.00%, respectively. The presented operational amplifier with the low-frequency voltage gain of 81.3 dB and the Gain–Bandwidth of 50.9 MHz for a 5-pF capacitive load consumes 1.48 mW with a 1.8 V supply voltage at the room temperature and in the typical condition.

The three-level neutral-point-clamped (NPC) quasi-Z-source inverter (qZSI) is a promising power converter for renewable applications, where low total harmonic distortion and adjustable output voltage are highly demanded. Similar to the conventional transformerless three-level NPC inverter, common-mode voltage (CMV) and neutral-point voltage (NPV) issues should be addressed properly for the NPC-qZSI. Thus, this paper proposes a new control strategy for the NPC-qZSI to reduce CMV and balance NPV simultaneously by taking advantage of an additional control freedom enabled by the impedance network, i.e., three types of shoot-through states. The proposed strategy can achieve the CMV reduction by choosing the essential switching vectors with acceptable CMVs, while the NPV can be balanced by rearranging the chosen switching vectors in a switching cycle. Experimental tests are provided, which verify the effectiveness of the proposed strategy in terms of CMV reduction and NPV balancing.

More and more researchers have great concern on the issue of Common-mode voltage (CMV) in high voltage large power converter. A novel common-mode voltage suppression scheme based on zero-vector PWM strategy (ZVPWM) is present in this paper. Taking a diode-clamped five-level converter as example, the principle of zero vector PWM common-mode voltage (ZCMVPWM) suppression method is studied in detail. ZCMVPWM suppression strategy is including four important parts, which are locating the sector of reference voltage vector, locating the small triangular sub-sector of reference voltage vector, reference vector synthesis, and calculating the operating time of vector. The principles of four important pars are illustrated in detail and the corresponding MATLAB models are established. System simulation and experimental results are provided. It gives some consultation value for the development and research of multi-level converters.

Single-phase five-level transformer-less inverter has been widely used in photovoltaic (PV) applications because of low total harmonic distortion (THD) and excellent output quality. However, a serious problem for transformer-less inverters is the leakage current issue which will lead to safety problems. This paper proposes a single-phase five-level transformer-less inverter to eliminate the leakage current. The circuit consists of eleven active switches and can keep the common mode voltage half of the DC bus voltage. The voltages of flying capacitors are balanced within one switching cycle through selecting the proper switching states. The mechanism of suppressing the leakage current is analyzed in detail with operational modes and modulation strategy. A 1 kW single-phase five-level inverter prototype is built to verify the validity and flexibility of the proposed topology and modulation.