High-speed Esaki switching diodes

Reverse currents of GaSb and GaAs tunnel diodes are investigated at temperatures between 4.2 and 290°K up to several hundred times their peak currents. Applying Kane's tunneling theory, the slope of the log J vs. log V curve should be nearly equal to 1.0 in low bias range, while it increases with the applied voltage in the middle bias region, depending on the impurity concentration, band gap width, effective mass and others. The experimental results show that the relative magnitude of the current is explained by the theory to a extent over fourth order if the series resistance is correctly taken into account. In very high bias region, the theoretical consideration suggests that the slope of the curve tends to 1.5 in every kinds of tunnel diodes.

Remarkable progress has been made in the development of high efficiency Copper-Sulfide/Cadmium-Sulphide (Cu2S/CdS) solar cells. The stability degradation mechanisms of these devices are of utmost importance. Cu2S/CdS solar cell is fabricated of four main layers and deposited on a glass substrate. CdS film exhibited high degree of transmittance in the infrared region and showed sharp absorption edge at nearly 0.5 μm wavelength. Transmittance curves of Cu2S films diminished transmission in the near infrared region and have maximum transmittance value at 0.7 μm wavelength. The spectral response measurements for the Cu2S/CdS films prove that the light is absorbed mainly by the Cu2S layer. The sample exposed to 100 oC annealing (20 min.) yielded maximum photogenerated current. The annealing improves the open circuit voltage (Voc) of the samples, and Voc increases considerably with time while the degradation of the sample under illumination becomes smaller. The load characteristics of the cell washed for five minutes and heated at 200oC is improved by enhancement of the exchange reaction and formation of Cu2S/CdS layer. Another achievement of the cell efficiency is to deposit of a very thin layer of copper followed by additional heat treatment at 200oC for 5 minutes to ensure the formation of chalcocite phase. Improvements have been made by varying the thickness of Cu2S layer. More than 80% efficiency has been detected at 5 μm thicknesses with the highest efficiency in the gradual transition between 0.5 and 0.8 μm. This is the reason behind the choice of a few microns (2–5μm) thickness of the Cu2S layers. Creating a highly doped p++ layer at the surface of Cu2S can reduce the effects of the back contact potential barrier produces tunneling or thermally assisted tunneling carrier transport mechanism. The tunnel diode is formed by high doping thin layer of Cu2S to produce p++, then depositing another highly doped CdS to produce n++. The tunnel diode is designed to be able to have a peak current that may exceed 50mA/cm2. Measured I-V characteristics of a Cu2S/CdS solar cell with Cu2S (p++) CdS (n++) tunnel diode at the short circuit current of the cell to be lower than the maximum tunneling current push the short circuit current up as long as the photogenerated current is increased, this consequently means that the maximum power output of solar cell is increased.

<div class="htmlview paragraph">An electronic throttle actuator with a faster response time and reduced peak current was aimed for the DI-G engine. An qualitative analysis of the drivetrain of the throttle actuator is performed. It was found that to obtain faster response, inertia, motor inductance, and motor resistance need to be reduced, while the reduction gear ratio has an optimal value. On the other hand, to reduce the peak current, motor inductance, motor resistance and the reduction gear ratio must be increased. Based on this analysis, a more detailed numerical calculation is done and design parameters are optimized. An actuator with optimized parameters is prototyped and showed 20% faster response time and 50% lower peak current.</div>

During the night of 22–23 October 2012, together with the Hydrology cycle in the Mediterranean eXperiment (HyMeX) Special Observation Period 1 campaign, optical observations of sprite events were performed above a leading stratiform Mesoscale Convective System in southeastern France. The total lightning activity of the storm was monitored in three dimensions with the HyMeX Lightning Mapping Array. Broadband Extremely Low Frequency/Very Low Frequency records and radar observations allowed characterizing the flashes and the regions of the cloud where they propagated. Twelve sprite events occurred over the stratiform region, during the last third of the lightning activity period, and well after the coldest satellite‐based cloud top temperature (−62°C) and the maximum total lightning flash rate (11 min−1). The sprite‐producing positive cloud‐to‐ground (SP + CG) strokes exhibit peak current from 14 to 247 kA, Charge Moment Changes (CMC) from 625 to 3086 C km, and Impulsive CMC (iCMC) between 242 and 1525 C km. The +CG flashes that do not trigger sprites are initiated outside the main convective core, have much lower CMC values, and in average, shorter durations, lower peak currents, and shorter distances of propagation. The CMC appears to be the best sprite predictor. The delay between the parent stroke and the sprite allows classifying the events as short delayed (<20 ms) and long delayed (>20 ms). All long‐delayed sprites, i.e., most of the time carrot sprites, are produced by SP + CG strokes with low iCMC values. All SP + CG flashes initiate close to the convective core and generate leaders in opposite directions. Negative leaders finally propagate toward lower altitudes, within the stratiform region that coincides with the projected location of the sprite elements.

Chapter 2 - TUNNELLING IN ESAKI JUNCTIONS

A new gate drive for high-voltage, high-power IGBT has been developed for the SLAC NLC (Next Linear Collider) Solid State Induction Modulator. This paper describes the design and implementation of a driver that allows an IGBT module rated at 800 A/3300 V to switch up to 3000 A at 2200 V in 3 /spl mu/s with a rate of current rise of more than 10000 A//spl mu/s, while still being short circuit protected. Issues regarding fast turn on, high de-saturation voltage detection, and low short circuit peak current are presented. A novel approach is also used to counter the effect of unequal current sharing between parallel chips inside most high-power IGBT modules. It effectively reduces the collector-emitter peak currents and thus protects the IGBT from being destroyed during soft short circuit conditions at high di/dt.

Induction motor direct starting may cause faults on both the power net and mechanical load. In other words the first current peak and the first torque peak of induction motors are vital for the power net and mechanical load respectively. A model for induction motors is proposed in [1] considering saturation effects. Although this model attempts to predict the induction motor behavior in direct starting, some differences between simulation and experimental results are perceived. In this paper, firstly the coreloss is taken into account in [1], and then we show that power net voltage initial phase value is impressive in the value of the current first peak in direct starting. Finally, by considering the condition of [1], our method fits experimental results better than [1].

High performance Esaki tunnel diodes [L. Esaki, Phys. Rev. 109, 603 (1958)] based on small-diameter Ge/Si core/shell nanowires vertically grown on Si substrates are demonstrated. The devices exhibit pronounced negative differential resistance with peak-to-valley current ratio of 2.75, high peak current density of 2.4 kA/cm2, and high tunneling current density of 237 kA/cm2 at 1 V reverse bias, all obtained at room temperature. The peak current is found to increase with temperature and the data can be well explained with a band-to-band tunneling model. These results suggest that Si-Ge heterojunction with low defect density can be obtained for device applications such as tunnel diodes and tunnel field-effect transistors.

A resonant tunneling transistor was manufactured by integrating a self-aligned metallic gate 30 nm above and 100 nm below resonant tunneling diodes. The Schottky depletion around the gate controls the current to a confined vertical channel with a conduction area in the range of 100×100 nm. Due to the three-dimensional asymmetric placement of the gate with respect to the tunneling diodes, modulation of both the peak voltage and peak current was achieved.

The purpose of this paper is to present an introductory analysis of the tunnel diode locked-pair circuit. The characteristics of the tunnel diode, together with the simplicity of the locked-pair circuit, make it a major contender for use as a high-speed computer element. High speed and high gain are the main advantages of the locked pair; the multi-phase power supply and lack of a simple means for logical inversion are the main disadvantages. The basic circuit consists of two tunnel diodes in series, the node common to the tunnel diodes being both the input and output terminal. As a computer element, the locked pair functions in much the same manner as the phase-locking harmonic oscillator (PLO). Like the PLO, the locked pair overcomes the difficulty of coincident input and output terminals by using a three-phase voltage source. However, the theory of three-phase majority logic is not essential to the understanding of this paper.

Study of the total lightning activity in a hailstorm

The series resistance of a high-quality varactor diode is primarily determined by the resistance of the semiconductor material close to the junction. With increasing reverse bias, the width of the space-charge region becomes greater, and the series resistance decreases, Theoretical models of graded and step junctions have been assumed, and calculations have been made of the series resistance as a function of bias. Epitaxial silicon diodes have been measured for series resistance as a function of bias by using the transmission loss method at 6 to 12 Gc/sec., with the diode mounted across a reduced-height waveguide. The variation of series resistance with bias agrees well with the theoretical calculations. By measurement of the 3-db bandwidth of the series resonance of the diode mounted in the reduced-height waveguide, the junction capacitance and the effective series inductance of the package also can be determined.

In this paper we report source–drain engineering for the realization of low contact resistance between CoSi2 and p+ Si with low junction leakage current and low junction capacitance using laser thermal processing (LTP) and the optimization of ion implantation conditions. We first demonstrate the impact of pre-amorphization on the reduction of the contact resistivity of a CoSi2/p+ deep source–drain (deep-SD) interface using laser thermal processing (LTP). A highly activated dopant profile at the CoSi2/deep-SD interface is required to reduce the contact resistivity there. Dopant profile can be finely controlled by implanting heavy ions to preamorphize a region to the desired depth and then using an appropriate laser power to selectively melt the amorphous Si, which has a melting temperature lower than that of single-crystal Si. We can thus form a highly activated boxlike dopant profile suitable for a deep-SD by using LTP and relatively deep preamorphization. Then, we discuss how to suppress the leakage current and the capacitance of the junctions. The larger junction capacitance and junction leakage current due to the abrupt deep-SD profile can be greatly reduced by combining LTP with lower-dose, higher-energy implantation and RTA prior to preamorphization (predoping and pre-RTA) to form a graded deep-SD profile beyond the abrupt deep-SD profile and overwhelm the channel doping profile, resulting in a wide depletion layer.

An oscillator with a series connection of tunneling diodes produces significantly higher power than a single diode oscillator. However, a circuit with series-connected tunneling diodes biased simultaneously in the negative differential resistance (NDR) region of the I-V curve is dc unstable. This dc instability makes the series connection oscillator fundamentally different from a single diode oscillator. Associated with the dc instability are the phenomena of minimum oscillation amplitude and frequency. Due to the minimum oscillation amplitude, it is critical to provide the impedance match between the oscillator circuit and the series connection at the desired oscillation amplitude level. An in depth, comprehensive analysis of the dc instability is given here. Based on this analysis, a numerical procedure is developed to accurately predict the minimum oscillation amplitude and frequency. Time domain simulations which give further insight into series-connection oscillator behavior are discussed. The effect of increasing the number of diodes on the oscillator performance is explored as well. Based on numerical and simulation results, oscillators with several tunnel diodes connected in series were designed and tested. Experimental results that confirm the existence of the minimum oscillation amplitude are presented for oscillators with two, three, and four tunnel diodes.

The principle of super-regeneration can be applied to many electronic circuits to achieve large amplifications The advent of the tunnel diode has made available a device which, by virtue of its voltage controlled negative conductance region, can be used as the active element in a simple super-regenerative amplifier. In a tunnel diode super-regenerative amplifier the quenching process, necessary to start and interrupt the oscillations periodically, is simply accomplished by moving the operating point in the current-voltage characteristics from the negative conductance region to the positive conductance region The simplicity of the circuitry associated with the tunnel diode and its low noise capabilities make tunnel diodes super-regenerative amplifiers or detectors very attractive An analysis based on well-established super-regeneration theory shows that tunnel diodes can operate reliably in the super-regenerative mode. The results of the analysis compare with experimental results with good agreement The possibility of utilizing tunnel diode super-regenerative detectors or amplifiers in practical circuitry has boon demonstrated by their incorporation, with good performance, in actual communication circuits.