Highly sensitive performance assessment of extended source height vertical tunnel field effect transistor pH sensor

This report showcases a vertical tunnel field effect transistor (TFET) fabricated from a GaN/InGaN heterostructure and compares it to a gated vertical GaN p-n diode. By including a thin InGaN layer, the interband tunneling in the TFET is increased compared to the gated homojunction diode. This leads to an increased drain current of 57 μA/μm and a reduced subthreshold swing of 102 mV/dec, from 240 mV/dec. However, trap assisted tunneling prevents devices from realizing subthreshold slopes below the Boltzmann limit of 60 mV/dec. Nevertheless, this work shows the capability of tunnel field effect transistors to be realized in GaN by taking advantage of the spontaneous and piezoelectric polarization in the III-N material system.

This article presents an innovative extended source structure for vertical tunnel field effect transistor as a pH sensor for detecting bio‐electrolyte. In this structure, the source has been extended inside the channel to improve the sensitivity. The optimal extended source inside the channel is Sh = 30 nm, which shows the higher drain current and drain current sensitivity. Current sensitivity has also been examined for the proposed structure with variations in pH value. An electrolyte model and site binding model have also been developed for surface potential in order to better understand device physics as a pH sensor, as pH changes directly impact surface charge density, thus detecting small changes. In addition, the pH sensor's response to variations in extended sources has been investigated. Additionally, the proposed pH sensor has a voltage sensitivity of about 100 mV pH−1, exceeding Nernst's limit.

This research proposes a SiGe heterojunction based dopingless Vertical tunnel field effect transistor (SiGe-DV-TFET). To obtain high sensitivity for biomedical applications, a cavity is added to the gate metal side of the proposed device. Fluctuation in surface potential is caused by the immobilization of biomolecules within the cavity. Various aspects impacting the device’s electrical characteristics, such as spacer length, applied voltages (Vds and Vgs), and channel material, have been investigated in this study. To validate the results, the modeling output features were compared to simulated outcomes. The surface potential of each segment is determined using Poisson’s equation in one and two dimensions, respectively. In the Silvaco ATLAS tool, multiple outcomes of charge density and dielectric constant are employed to recreate biomolecules for simulation.KeywordsSensitivityBiosensorModelingDopingless vertical tunnel FETCharged densityPlasmaAmino acids

Insights into the impact of random dopant fluctuation on ferroelectric germanium source vertical TFET

The performance of a double metal-gate (DG) InAs/Si heterojunction gate-all-around vertical nanowire tunnel field effect transistor (TFET) is studied using a technology-computer-aided-design tool. Typical drawbacks of the conventional TFET are resolved by taking advantage of using (i) InAs source and (ii) DG structure. The InAs is used as a source material to address the low on-state drive current in the TFET. In addition, a double metal-gate structure is adopted to control the ambipolar current by optimizing the work function of metal gates. Furthermore, the effect of fabrication-induced interface traps at InAs/Si and Si/HfO2 on device performance is studied. Predictive simulations with various interface traps indicate that a steep subthreshold slope is achieved for Dit 1013 cm−2 eV−1 at the InAs/Si interface. To further analyze the optimized device, DC and AC analysis is done for the optimized TFET with traps.

The novel hetero-dielectric gate dual-source vertical tunnel field effect transistor architecture (HDG-DS-VTFET) is investigated in this paper along with an analysis of its DC, RF/Analog, noise, and linearity characteristics. This device features a vertically stacked gate oxide structure of HfO2/SiO2 in a dual-source vertical TFET configuration that reflects enhanced ION and better leakage current suppression compared to High-k-dielectric (HfO2)-DS-VTFET. Additionally, in comparison to HfO2-DS-VTFET, the HDG-DS-VTFET showed a reduced threshold voltage ( $${{V}_{{{\text{th}}}}}$$ ) of 0.21 V, a lower sub-threshold value of 8.5 mV/decade, and a higher ION/IOFF reflected as 7.1 × 1012. The present work used a calibrated SILVACO technology computer-aided design (TCAD) simulator. The proposed device has been thoroughly examined concerning its RF/Analog performance parameters, such as gate capacitances, gain-bandwidth product (GBP), cut-off frequency ( $${{f}_{t}}$$ ), early voltage, intrinsic gain, and compared to a high-k dielectric (HfO2) DS-VTFET structure. Furthermore, a linearity analysis was performed as a figure of merit (FOM), considering several parameters such as the 1-db compression point, the 3rd-order intermodulation intercept point (IIP3), the 3rd-order voltage intercepts point (VIP3), and the 3rd-order intermodulation distortion point (IMD3). In comparison to the high-k dielectric (HfO2) DS-VTFET, the proposed HDG-DS-VTFET showed a significantly reduced sub threshold value of approximately 77% which gives a notably high ON current with low ( $${{V}_{{{\text{th}}}}}$$ ) for possible low-power linear and RF applications.

A new hetero-structure vertical tunnel field effect transistor is proposed and investigated using Sentaurus Technology Computer-aided Design simulation. Since the direction of the gate electric field is in alignment with the direction of tunneling of electrons, a higher on state current is attained. Optimization of the geometric dimension of the proposed structure is carried out to yield its optimum performance. As temperature variation affects the device performance, temperature analysis of the proposed structure is performed in which both the off state leakage current and the average subthreshold swing increases with temperature. Further investigation on the influence of temperature variation is carried out in terms of Analog/RF parameters such as transconductance, gate capacitance, cut-off frequency, transconductance frequency product and linearity figure of merits. It is observed that the proposed structure attains superior linearity performance and lower distortion at higher gate voltage with rise in temperature and is less affected by temperature variation at lower gate voltage.

This paper introduced a novel Triple Metal Gate Vertical Tunnel Field Effect Transistor (TMG-VTFET) structure, incorporating three key innovations: (i) a vertical geometry to enhance tunnelling area at the source-channel interface, (ii) narrow bandgap source materials for efficient band-to-band tunnelling, and (iii) a triple metal gate configuration for superior electrostatic control. Simulations using Silvaco TCAD (version: 5.26.1.R) investigated energy band diagrams, electric fields, and I-V characteristics of the TMG-VTFET architecture. Dielectric materials like $\mathrm{S i O}_{2}$, $\mathrm{Si}_{3} \mathrm{~N}_{4}, \mathrm{Al}_{2} \mathrm{O}_{3}$, and HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> were used here as the oxide layer between the gates controls, and the channel region. Out of them, HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> exhibited superior electrostatic control, owing to its high dielectric constant, which resulted in significant band bending that reduced the threshold voltage and increased ${\mathrm {I}}_{\text {on }} / {\mathrm {I}}_{\text {off }}$ ratio, as confirmed by the energy band diagrams and I-V characteristics. These results emphasized $\mathrm{H f O}_{2}$’s critical role in advancing VTFET technology, and its substantial benefits for future semiconductor devices.

Modeling and Assessment of Atomic Precision Advanced Manufacturing (APAM) Enabled Vertical Tunneling Field Effect Transistor.

Based on density functional calculations, tight-binding models are proposed for few layers of three BCN allotropes sandwiched between two layers of graphene. The results pave the road toward investigation of the performance of novel nanoelectronic devices such as vertical tunneling field effect transistors and nanoscale sensors operating on the basis of quantum tunneling through these layered materials-based systems.

A superjunction GaN-based vertical heterojunction field effect transistor with ununiformly doped buffer (UDSJ-VHFET) is proposed in this paper. In contrast to the conventional superjunction vertical heterojunction field effect transistor (SJ-VHFET), the doping density of n-pillar increases linearly from top to bottom, while the p-pillar is split into three regions: linearly doped top region, uniformly doped middle region and linearly doped bottom region. The ununiform doping profile suppresses the increase of electric field peak due to the imbalanced charge and smooths the electric field distribution, thus leads to an increase of the breakdown voltage (Vbr) under charge imbalance condition. Simulation results show that with the doping dose of p-pillar 40% lower (higher) than that of the n-pillar, the Vbr and on-state resistance (Ron) of the proposed device are 6863 V and 4.25 mΩ cm2 (5751 V and 4.32 mΩ cm2), comparing with 3205 V and 4.03 mΩ cm2 (2175 V and 4.10 mΩ cm2) for the conventional SJ-VHFET. Additionally, the proposed device shows a Vbr of 12280 V and Ron of 4.29 mΩ cm2 under charge balance condition, comparing with 12874 V and 4.07 mΩ cm2 for the conventional SJ-VHFET.

The luminescence intensity regulation of organic light-emitting transistor (OLED) device can be achieved effectively by the combination of graphene vertical field effect transistor (GVFET) and OLED. In this paper, we fabricate and characterize the graphene vertical field-effect transistor with gate dielectric of ion–gel film, confirming that its current switching ratio reaches up to 102. Because of the property of high light transmittance in ion–gel film, the OLED device prepared with graphene/PEDOT:PSS as composite anode exhibits good optical properties. We also prepare the graphene vertical organic light-emitting field effect transistor (GVOLEFET) by the combination of GVFET and graphene OLED, analyzing its electrical and optical properties, and confirming that the luminescence intensity can be significantly changed by regulating the gate voltage.

We fabricated a vertical tunnel field-effect transistor (TFET) with a GaAsSb/InGaAs heterojunction using a 5-nm-thick Al 2 O 3 dielectric. The 26-nm width of the narrow channel mesa structure was confirmed using citric acid solution. The minimum sub-threshold slope (SS) was 71 mV/dec. On the basis of our simulated and experimental results, the SS was estimated to be 54 mV/dec for an effective oxide thickness (EOT) of 1 nm.

A gas sensor made from graphene vertical field effect transistor (VGr-FET) has been fabricated using graphene as the source electrode, C60 thin film as the semiconductor layer and aluminum thin film as the drain electrode. The on/off ratio of transistor gated by bottom electrode with ionic liquid gel as dielectric layer is derived to be 103 from measured source–drain current Ids. The apparent energy barrier height between the graphene and polycrystalline fullerene was calculated from the model of heterojunction diode I–V response curves. The barrier height φBH was altered by the gating potential vertically applied on graphene sheet, resulting the large on/off ratio of the transistor. The effect of surface adsorption of water vapor, oxygen, ammonia and isoprene gas phase molecules on the Ids was measured. The lower limit of detection (LOD) for ammonia (86 ppb) than that of isoprene (420 ppb) is attributed to the donor nature of ammonia contact with p-type graphene, and the adsorbed donor leads to a corresponding positive gating effect to the VGr-FET. This facile, low cost and quick responsive device shows promise for early diagnose of severe human respiratory diseases.

We report a theoretical and experimental investigation of the switching characteristics in patterned-source vertical field effect transistors. Experimentally we show that the layered structure gives rise to capacitances coupling of the potential between the drain and source electrodes. By removing the extrinsic gate-source capacitance we are able to demonstrate unprecedented sub-2 μs switching and current levels of 3 A/cm2. Theoretically, using a 2D drift-diffusion model, we show that the intrinsic response depends on two processes: the formation of the virtual electrode and the injection through it to form the vertical channel. The importance of the source structure parameter to achieve ultimate speed is discussed.