Improving error detection with selective redundancy in software-based techniques

A low-level software-based fault tolerance approach to detect SEUs in GPUs' register files

Among hardware fault injection techniques involved in the validation of fault tolerant systems, pin-level fault injection is one of the more relevant techniques of the last years. The technique is suitable for injecting faults in the real system under test or in a prototype. Tools based on this technique are generic being possible the reusability of the tool. They are developed externally to the target causing no execution overhead on the system. This chapter presents a general overview about pin-level fault injection with a state of the art including the more remarkable features of the technique. Finally the tool AFIT developed by the Polytechnic University of Valencia (Spain), is described as a real implementation of the technique. Moreover, it presents an example about the methodology carried out in fault injection campaigns and the usability of the pin-level fault injection technique.

This paper presents a non-intrusive hybrid fault detection approach that combines hardware and software techniques to detect transient faults in microprocessors. Such faults have a major influence in microprocessor-based systems, affecting both data and control flow. In order to protect the system, an application-oriented hardware module is automatically generated and reconfigured on the system during runtime. When combined with fault tolerance techniques based on software, this solution offers full system protection against transient faults. A fault injection campaign is performed using a MIPS microprocessor executing a set of applications. HW/SW implementation in a reprogrammable platform shows smaller memory area and execution time overhead when compared to related works. Fault injection results show the efficiency of this method by detecting 100% of faults.

Today's integrated circuits are increasingly subject to the effects of radiation. To assess the reliability of a digital system and to identify the most critical failure effects, radiation-based experimentation or fault injection campaigns are usually performed, which may be costly and time-expensive. This paper proposes enhancements to current widely employed fault injection techniques, aimed at accelerating the process and lowering the costs of the flow. The employed principles and a new fully automatic fault injection flow are presented. Experimental case studies based on available microprocessor systems demonstrate the effectiveness of the proposed solutions.

CAFI: A Configurable location-Aware Fault Injection technique for software reliability assessment against soft errors

Graphic Processing Units have become popular in a broad range of applications due to their high computational power and low prices. Among the applications there are the safety critical ones, where fault tolerance is mandatory. This paper presents a fault injection methodology to evaluate a soft-core General Purpose GPU design over Single Event Upsets in its register files. Different configurations of CUDA algorithms are explored to verify their impact on the GPU's behavior during a fault injection campaign. This paper also presents an error characterization analysis by verifying the GPUs memories and program counters in order to evaluate the real impact of the fault in the GPU, even if the fault does not result in an error in the final output of the system. Results can help designers developing fault tolerant techniques in an effective fashion.

PTM-based hybrid error-detection architecture for ARM microprocessors

Fault-tolerant circuits are currently required in several major application sectors, and a new generation of CAD tools is required to automate the insertion and validation of fault-tolerant mechanisms. This paper outlines the characteristics of a new fault-injection platform and its evaluation in a real industrial environment. The fault-injection platform is mainly used for assessing the correctness and effectiveness of the fault tolerance mechanisms implemented within ASIC and FPGA designs. The platform works on register transfer-level VHDL descriptions which are then synthesized, and is based on commercial tools for VHDL parsing and simulation. It also details techniques devised and implemented within the platform to speed-up fault-injection campaigns. Experimental results are provided, showing the effects of the different techniques, and demonstrating that they are able to reduce the total time required by fault-injection campaigns by at least one order of magnitude.

The growth in mobile communication and Internet usage has lead to increase in demand for robust transmission of compressed video over error prone channels. The quality of decoded video in erroneous environments depends on efficient detection, localization and concealment of errors. In fact, the role of error detection and localization is very important because undetected erroneous macroblocks (MBs) are not concealed and correct MBs may be termed as erroneous. However, traditional error detection method isn't enough for detection. A novel detection method proposed recently can detect some special errors, but can't make precise localization. In this paper, an improved error detection and localization technique using syntactic, semantic and statistical information in MPEG-4 is proposed. This scheme can detect most types of transmission error and locate the exact position of the first error. Experimental results show the proposed technique can achieve high error detection ratio, usually more than 90%, and increase the decoded video quality efficiently

Fault injection is a well-established technique in the research community that consists of emulating faults in order to obtain dependability-related data. Despite its potential, fault injection has been less widely adopted outside of academia, due to the expertise required to effectively conduct fault injection campaigns and to the lack of tools that can be easily adapted to different systems. This paper presents ucXception, an easy-to-install, extendable, open-source framework for orchestrating the entire lifecycle of fault injection campaigns without requiring expert knowledge and using a graphical interface. ucXception supports injection of software and hardware faults using realistic fault models and can be applied to a variety of target systems, including virtualized systems and complex cloud computing deployments. This brings fault injection to modern environments of cloud computing. As a use case, a preliminary analysis on the usage of failure models as a valid alternative to fault models is performed.

This study focused on improving vigilance performance through developing methods to arouse subjects to the possibility of errors in a data manipulation information warfare attack. The study suggests that by continuously applying arousal stimuli, subjects would retain initially high vigilance levels thereby avoiding the vigilance decrement phenomenon and improving error detection. The research focused on which methods were the most effective as well the impact of age upon the arousability of the subjects. Further the implications of vigilance and vigilance decrement for correct detections as well as productivity were explored. The study used a simulation experiment to provide a vigilance task in a reality-based information warfare environment. The results of the study suggest that stimuli type and age do impact arousal, although stimuli type had the greater effect. Also, moderate support was found to indicate that arousal does affect vigilance and vigilance decrement. However, the final analysis revealed that it was the arousal-vigilance interaction that had the greatest impact on correct detection and productivity.

This paper presents a generic approach to specify a fault tolerant robot controller, and its implementation and validation with ROS and Gazebo. The main idea is to implement a fault tolerance strategy using a fault tree and an ordered set of recovery modules. A fault injection campaign has been carried out with a mobile autonomous robot for airport inspection using simulation with Gazebo and ROS. This successful experiment implements a safety-first strategy.

With existing virtualized systems, hypervisor failures lead to overall system failure and the loss of all the work in progress of virtual machines (VMs) running on the system. We introduce ReHype, a mechanism for recovery from hypervisor failures by booting a new instance of the hypervisor while preserving the state of running VMs. VMs are stalled during the hypervisor reboot and resume normal execution once the new hypervisor instance is running. Hypervisor failures can lead to arbitrary state corruption and inconsistencies throughout the system. ReHype deals with the challenge of protecting the recovered hypervisor instance from such corrupted state and resolving inconsistencies between different parts of hypervisor state as well as between the hypervisor and VMs and between the hypervisor and the hardware. We have implemented ReHype for the Xen hypervisor. The implementation was done incrementally, using results from fault injection experiments to identify the sources of dangerous state corruption and inconsistencies. The implementation of ReHype involved only 880 LOC added or modified in Xen. The memory space overhead of ReHype is only 2.1MB for a pristine copy of the hypervisor code and static data plus a small reserved memory area. The fault injection campaigns used to evaluate the effectiveness of ReHype involved a system with multiple VMs running I/O and hypercall-intensive benchmarks. Our experimental results show that the ReHype prototype can successfully recover from over 90% of detected hypervisor failures.

Soft error resilience has become an essential design metric in electronic computing systems as advanced technology nodes have become less robust to high‐charged particle effects. Designers, therefore, should be able to assess this metric considering several software stack components running on top of commercial processors, early in the design phase. With this in mind, researchers are using virtual platform (VP) frameworks to assess this metric due to their flexibility and high simulation performance. In this regard, herein, this goal is achieved by analysing the soft error consistency of a just‐in‐time fault injection simulator (OVPsim‐FIM) against fault injection campaigns conducted with event‐driven simulators (i.e. more realistic and accurate platforms) considering single and multicore processor architectures. Reference single‐core fault injection campaigns are performed on RTL descriptions of Arm Cortex‐M0 and M3 processors, while gem5 simulator is used to multicore Arm Cortex‐A9 scenarios. Campaigns consider different open‐source and commercial compilers as well as real software stacks including FreeRTOS/Linux kernels and 52 applications. Results show that OVPsim‐FIM is more than 1000× faster than cycle‐accurate simulators and up to 312× faster than event‐driven simulators, while preserving the soft error analysis accuracy (i.e. mismatch below to 10%) for single and multicore processors.

Software fault injection (SFI) has been used to intentionally cause "failures" in software components and assess their impacts on the entire software system. A key property that SFI should satisfy is the representative ness of injected failures, the failures caused by SFI should be as close as possible to failures in the wild. If injected failures do not represent realistic failures, the measured resilience or tolerance against failures of the investigated system is not trustworthy. To the best of the authors' knowledge, the representative ness of "faults" has been investigated. However, it is an open problem whether the failures caused by injected faults represent realistic failures. In this paper, we report the preliminary results of the investigation on the representative ness of injected failures. To compare injected failures with real failures, we have collected 43,742 real crash logs of Linux from the Red Hat repository, and conducted a fault injection campaign on Linux, using SAFE, a state-of-theatre injector of software faults. In the fault injection campaign, 50,000 faults are injected to the Linux file system and 71,470 runs of a workload are executed. The crash logs generated by SFI are compared with the real Red Hat logs with respect to crash causes, crashed system calls, and crashed modules. Our preliminary results suggest that failures caused by injected faults do not represent real failures, probably because injected faults are not representative enough or because the selected workload is not realistic.