Improving Power Amplifier Efficiency of Zero-Crossing Modulation at Sub-THz Frequencies

Medium power broadband millimeter wave (mmWave) power amplifiers (PAs) designed in an advanced 40-nm Gallium-Nitride (GaN) process from Hughes Research Laboratories (HRL) and a 22-nm fully depleted silicon-oninsulator (FDSOI) CMOS process from Global Foundries (GF) are characterized using 5G modulated signals in our lab. Our GaN PAs have reached continuous wave (CW) saturated output power (P<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT,sat</inf>) of ~ 24 dBm, whereas our CMOS PAs reached P<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT,sat</inf> ~ 14 dBm, both covering large portions of the FR2 band (e.g., 24.2552.6 GHz) and reaching down into the upper FR3 band (e.g., 7.125-24.25 GHz). Post-layout parasitics extracted (PEX) electromagnetic (EM) simulations are used to design the PAs, and they are tested with 5G modulated waveforms using equipment in our labs, consisting of a mm-Wave probe station and two different vector signal transceivers (VSTs) from Emerson (i.e., formerly National Instruments (NI)). The VSTs used to characterize the PAs are: (1) our original VST, "VST1" (i.e., PXIe-5831), and (2) a latest VST, "VST3" (i.e., PXIe-5842 1C), that has greater maximum operating frequency and higher instantaneous signal bandwidth (IBW), and the VST3 can be used for testing in the FR4 band (e.g., 71-114.25 GHz) and at sub-THz frequencies up to ~300 GHz with up/downconverters. The performance of the PAs will be characterized using these VSTs, and demonstrated during the conference using the first VST3 deployed worldwide.

In this article, a compact waveguide magic-T (WMT) with four coplanar ports is presented for sub-THz power combination applications. In the WMT, simple and robust geometries, i.e., trapezoidal irises, cuboid-shaped ridge, and waveguide step, are employed to ease manufacturing difficulties at sub-THz frequencies. Thereinto, the trapezoidal irises replace the traditional multiple steps or long chamfers to simplify the waveguide transformer and shorten the path, the waveguide step widens the available bandwidth, and the cuboid-shaped ridge reduces the difference-port reflection and acts as a coupling probe for the sum port to improve isolation. Moreover, a bed of nails is applied to the waveguide splitting plane for electromagnetic-leakage suppression and assembly convenience. To verify this WMT, a WR-4 band (170–260 GHz) prototype is fabricated and measured, showing an average combination efficiency of 92.2% within 175–255 GHz (37.2% bandwidth). Then, the WMT is applied to a two-way combined solid-state power amplifier module. Thereinto, a contactless <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</i> -plane waveguide transition with unprecedented L-shaped chock grooves is presented for waveguide system interconnection. In power measurement, the power combined module produces a maximum power output of 76.6 mW @ 216 GHz.

Due to the growing concerns toward green communications, future wireless communications systems should aim at higher data rate with even lower power consumption. Since the power amplifier (PA) is a major power consuming analog component, its efficient use is of primary concern in such green communications framework. Orthogonal frequency division multiplexing (OFDM) is a standard approach for achieving high data rate communications with high reliability, but one of its well-known drawbacks is low PA efficiency caused by its signal with high peak-to-average power ratio (PAPR). The use of iterative clipping and filter (ICF) has been widely studied to reduce peak-to-average ratio (PAPR) so that sufficient usage of PA is achieved, but at a cost of in-band distortion and increasing complexity at the transmitter. In many communication standards, however, there is a constraint in acceptable in-band distortion level and thus the question is how much improvement can one achieve in terms of PA efficiency for a given in-band distortion constraint. In this paper, we investigate the trade-off between amplifier efficiency and distortion for an OFDM system operated with ICF in the long term evolution (LTE) framework, and reveal its limitation when considering the effect of PA that comes after the ICF in a practical circuit.

: A key component of microwave telecommunication systems is the power amplifier (PA). The design parameters of a communication system, such as link performance, power budget, and thermal design are typically driven by the power amplifier's linearity, output power, and efficiency. These design parameters of PA are the key to ensuring an efficient system because the PA is the most power-consuming circuit in the communication system. In an effort to have students involved in this research area, the International Microwave Symposium (IMS) sponsored by IEEE Microwave Theory and Technique Society (MTT-S) has introduced a High Efficiency Power Amplifier Design Competition. In this report, we present a 2.8-GHz, 5-W, highly efficient PA based on a wide bandgap gallium nitride (GaN) high electron mobility transistor (HEMT) device (CGH 40010f from CREE). The PA design was presented at the 2010 IMS Student Design Competition and achieved the competition goal of output power greater than 5 W with a measured power added efficiency (PAE) of 61% at 2.8 GHz.

Linear amplification using nonlinear components (LINC) is a method of vector summing two constant amplitude phase-modulated signals to achieve power amplification. The theoretical efficiency of the LINC power amplifier has been reported as 100% since highly efficient nonlinear constant amplitude amplifiers can be used. However, the 100% efficiency performance is only possible at one or two loads along the power output curve. The bulk of the papers regarding LINC has focused on clever implementations of the signal vector decomposition as well as methods to achieve highly linear signal separation. There has been little regard in the literature to the signal combiner implementation necessary to achieve the high power-added efficiency (PAE) of the LINC radio frequency (RF) power amplifier. Efficiency is not an intrinsic property of the combiner implementations, however, the combiner method is the single biggest contributor to efficient performance of a LINC RF power amplifier. This paper develops an analysis method that determines the efficiency of the LINC power amplifier as a function of the amplitude modulation statistics. This can be employed to design the RF communication system amplitude modulation characteristics and to tradeoff and optimize the RF transmitter PAE.

In this paper, high-efficiency power amplifier is implemented using adaptive bias control circuit for the wireless power transmission (WPT). The high efficiency power amplifier uses the Class-E amplifier structure because the efficiency of the WPT system is strongly affected by the efficiency of power amplifier. The adaptive bias control circuits consist of the directional coupler, power detector and operation amplifier. And the high gain two-stage amplifier using the drive amplifier is performed for the low input stage of power amplifier. The proposed power amplifier using the adaptive bias control circuit can have high efficiency at lower power level.

The class DE power amplifier (PA) has high efficiency only with certain parameters of the input signal, frequency and load resistance. Therefore, amplification of signals with high peak-to-average power ratio causes a violation of the zero voltage switching (ZVS) condition. This can reduce the efficiency of class DE PA. In particular, by using the analytical model it was found that PA efficiency depends significantly upon the value of transistor grading coefficient of a body junction diode. Moreover, after simulation, the range of the voltage was determined, at which the ZVS condition must be satisfied in order to minimize the power loss.

This paper discusses a method for improving the efficiency of linear power amplifiers by externally injecting power into the output at the second harmonic frequency. An experimental proof-of-concept PA based on class-A/AB mode with a 10-W GaN pHEMT at 2.45GHz is presented, and its efficiency improved from 58% to 75% with −6.5 dBc injected 2nd harmonic power. Two-tone measurements confirm improved linearity with simultaneous increase in efficiency, accompanied by gain compression at higher input power.

Long-term-evolution (LTE) communication enables high data-rates but degrades the efficiency of the power amplifiers (PAs) due to high peak-to-average power ratios of transmitted signals. Envelope tracking (ET) and envelope-elimination-and-restoration (EER) techniques have been proposed to improve the PA efficiency by adapting the PA supply voltage to the envelope. Linear PAs in ET systems are mostly implemented in non-CMOS technologies for high efficiency [1]. However, the growing demand for low-cost integrated systems has motivated the use of CMOS PAs [2]. The main drawback of this is that linear CMOS PAs have poor efficiency. The high efficiency of switching PAs makes them a promising candidate in CMOS [3]. In EER systems, where switching PAs are used, the supply modulator must satisfy stringent noise and bandwidth specifications in order to recover the amplitude information of the LTE signal. Thus, it is a challenge for supply modulators to maintain high efficiency. Recently, a number of methods have been adopted to improve supply-modulator efficiency. In [1], a dual-switching topology is proposed, but it requires an additional inductor and results in an unpredictable noise spectrum. In [4], an AC-coupling topology is adopted to reduce the supply voltage of the linear amplifier. However, due to the slow response of the switching amplifier, the efficiency is still low.

This letter presents an approach to maximize the output power and efficiency of a Doherty power amplifier (PA). The conventional carrier PA having match, used in a symmetric Doherty PA, does not deliver the saturated high efficiency at the 6 dB back-off power but at the 5.5 dB back-off power due to the knee voltage effect. To solve the problem, the gate biases of the carrier and peaking PAs are adapted. The gate bias voltage of the carrier PA is optimized for a higher peak output power, delivering a 3 dB larger peak power at match. That of the peaking PA is also optimized to have the same peak power of the carrier PA. A Doherty PA with the concept is designed using a 45 W gallium nitride (GaN) high electron mobility transistors (HEMT) for the carrier and peaking cells at 1.94 GHz. The measured average output power, drain/power-added efficiencies and gain are 44.35 dBm, 60.5/57.2%, and 12.75 dB for a 10 MHz long term evolution (LTE) signal with a 6.5 dB peak-to-average power ratio (PAPR).

This paper proposes a new closed-form expression for computing the power efficiency of delta-sigma (DS) radio frequency (RF) transmitters. Due to the large bandwidth of the pulsewidth modulated (PWM) signal at the output of the DS modulator, the peak efficiency of the power amplifier (PA) when driven by a PWM signal is considerably different than its peak efficiency when the input signal is a continuous sine wave. A weight averaging of the efficiency over the frequency bandwidth of the PWM signal is considered for accurate estimation and prediction of the power efficiency of DS RF transmitters. It is shown that, for a low-pass DS transmitter, the overall average power efficiency of the DS transmitter can be accurately estimated by the product of the modulated peak efficiency of the PA and the coding efficiency of the modulator. For bandpass DS transmitters, an additional parameter that accounts for the duty cycle effect on the efficiency of switching-mode PAs has to be considered. To validate the new proposed expression, a DS transmitter for WiMAX, CDMA and EDGE standards is designed, prototyped and tested. The comparison of the simulated and measured efficiencies of the DS transmitter proves the validity and accuracy of the proposed expression.

This paper proposes a new high efficiency power amplifier configuration injecting envelope components. The proposed configuration has the saturated power amplifier for continuous wave and the liner amplifier for extracted envelope signal from the input signal to the proposed configuration. The envelop component is extracted from the input signal, while that is injected to the input signal in the input side of the saturated power amplifier. The linear power amplifier attains the same gain of the saturated power amplifier for the extracted envelope component. At the output port of the saturated power amplifier, the extracted envelope component is injected into the output signal of the saturated power. From this process, the proposed power amplifier can achieve high efficiency amplification with acceptable the out-of-band distortion level. The calculation results show that validity of the proposed configuration. In ideal case, the proposed power amplifier can attain the efficiency of about 64% at the third-order intermodulation component to the fundamental component of -45 dBc, when the saturated efficiency of saturated power amplifier is 80%. These results show the potential of proposed configuration.

Envelope tracking (ET) is a key technology improving efficiency of RF power amplifiers (PAs) and battery lifetime in mobile handsets. It has been commercialized since 4G LTE era, and is also being employed in 5G NR handsets. A supply modulator (SM) is a circuit generating power supplies of RF PAs for ET and average power tracking (APT) operations. Currently, the maximum channel BW and supported ET BW of 5G NR handset is 100MHz [1]–[4]. In a short time, over 100MHz BW will be necessary to support intra-band contiguous carrier aggregation cases of n77C/n78C/n79C in 3GPP standard [5]. The required instantaneous maximum output power of SM is about 10W which is calculated by the following parameters: 26dBm output power by power class 2 (PC2), 2dB loss of RF front-end module (FEM) due to complex operating band combinations (EN-DC for non-standalone mode, NE-DC, 2CA/3CA), 6dB higher instantaneous power due to peak-to-average power ratio (PAPR) at 1 resource block (RB), 1dB margin, and poor PA efficiency of around 33% (worst example) due to high carrier frequency of 5GHz at n79 band. The poor PA efficiency can be relaxed by high voltage PA design beyond 5V. In [1], a supply modulator with boosted output larger than battery voltage $(V_{BAT})$ is proposed, and the designed PA with 30% higher voltage shows 10% higher efficiency and broader BW owing to low impedance transformation ratio from $50 \Omega$ and small parasitic output capacitance of power cell. The challenge is how to design a supply modulator for 5G NR that can achieve both wide ET BW and high output voltage/power capability, while satisfying high efficiency, low receiver-band noise, short transition time, and multi-mode/standard operation.

With the tremendous growth in wireless networks market, unprecedented energy consumption and emissions of carbon dioxide (CO 2 ) is a growing concern for both operators and governments. OFDM technology has been adopted by many standards organizations due to its high spectrum efficiency, but induces poor energy efficiency of power amplifier (PA). A new scheme named Selecting Sub-Carriers Modulation (SSCM) to lower the input power of PA is given in this paper. SSCM divides the information bits into two parts of bits according to modulation mode: the first part of bits selects some sub-carriers of OFDM to transmit nothing, another part of bits is transmitted by the remainder sub-carriers. Sub-carriers transmitting nothing do not need energy, and fewer number of sub-carriers transmitting modulation symbols can improve PA's efficiency because of the lower peak-to-average power ratio (PAPR). Analysis results show SSCM with different modulation modes can lower input power of PA with different proportion compared with traditional OFDM. Theoretical analysis and simulation results of the reliability of SSCM are given and match closely. In multi-path channel, SSCM with BPSK has the same performance as BPSK in traditional OFDM, while SSCM with QPSK performs worse than QPSK in traditional OFDM.

An input driver circuit for driving a cascode stage Class F RF Power Amplifier in deep submicron CMOS technology is proposed. The input driver circuit will deliver an improvement to the RF Power Amplifier's efficiency by reducing drain current distortion and provide better breakdown voltage protection for the transistor. The proposed input driver and Class F Power Amplifier are designed using Silterra RF CMOS 0.18μm technology and simulated using Hspice.