In-Situ Multiprocessing of Ultrathin Silicon Nitride Capacitors for Advanced Dram Cells

Rapid thermal and integrated processing: J C Gelpey, M L Green, J J Wortman and R Singh (Editors)MRS, 1991, 503 pp, hardcover, $67.00. ISBN: 1-55899-118-2

An electrical method is proposed to measure the dielectric film thickness, electron temperature, and plasma density for deposition plasmas. In this method, a square voltage is applied to a flat probe coated with a dielectric film, and the transient voltage of a series capacitor connected to the probe is measured. The thickness of the dielectric film is obtained from the transient voltage because the applied voltage is divided across the dielectric film and the series capacitor. The deposited dielectric film causes a change in transient voltage of the series capacitor. A circuit model with a nonlinear sheath, a series capacitor, and the dielectric films is suggested to obtain plasma density and electron temperature. The time response of transient voltage is related to plasma density, electron temperature and total capacitance of the series capacitor and the dielectric film. Two square voltages with different amplitudes were applied to measure plasma density and electron temperature. Experiments were conducted in inductively coupled plasma. Various capacitors were used to replace the dielectric films, and a flat probe coated with Al2O3 was used to verify the measurement of dielectric film thickness, showing the high accuracy of our method. In addition, the electron temperature from our method is in good agreement with that from electron energy distribution functions, and the plasma density is in good agreement with that from orbital motion limited theory. Therefore, this method would be useful for monitoring plasma parameters and deposited film thickness in industrial plasma processing.

The oxidation and nitridation processes of niobium films in a rapid thermal processing (RTP) – system were investigated. 200 and 500 nm niobium films were deposited via sputtering on sapphire-(1-102)-substrate. At first niobium films were oxidized in molecular oxygen at temperatures ranging from 350 to 500 °C and for times of 1, 2 and 5 min and then nitridated in ammonia at 1000 °C for 1 min using an RTP system. For characterisation of the niobium films complementary analytical methods were used: X-ray diffraction (XRD) for phase analysis, secondary ion mass spectrometry (SIMS) for determining the elemental depth profiles of the films, scanning electron microscopy (SEM) and atomic force microscopy (AFM) for characterisation of the surface morphology of the films. The influence of the substrate, single crystalline sapphire, on the reactivity of the niobium films was studied in dependence of temperature, time of reaction and film thickness. The possibility of existence of niobium oxynitride phase was investigated. According to XRD and SIMS data, there is evidence that an oxynitride phase is formed after oxidation and subsequent nitridation in the bulk of some Nb films. In some of the experiments crack formation in the films or even delamination of the Nb films from the substrates was observed.

Like many of the technologies used to process integrated circuits, the road to manufacturing for rapid thermal processing (RTP) has been twisted. What began as a speculative laboratory apparatus has evolved into a cornerstone of IC technology. Qualities that make RTP desirable for IC manufacture include the ability to process wafers individually, the ability to minimize the time wafers spend at elevated temperature, the convenience of clustering RTP to other systems, and the possibility of maintaining cold reactor walls. This paper will review how these properties make RTP desirable. The paper also will present an overview of the difficulties surrounding the use of RTP and describe how many serious hurdles have been overcome. It will summarize the evolution of RTP from a curiosity to a mainstay technology in building integrated circuits. It then will describe SEMATECH’s role in working with RTP, ending with a direction for future application of RTP based on the National Technology Roadmap for Semiconductors (NTRS).

The effects of two‐step rapid thermal processing (RTP) sequentially in different ambients on the formation of denuded zone (DZ) and oxygen precipitation in the Czochralski (CZ) silicon wafers have been investigated. With the first‐step RTP in Ar ambient, no obvious DZ but a high density of bulk micro‐defects (BMDs) were formed in the sample with the second‐step RTP in N2 ambient, while the BMD density in the sample with the second‐step RTP in O2 ambient was remarkably low. With the first‐step RTP in N2 ambient, a high density of BMDs and a width of DZ could be formed in either of the samples with the second‐step RTP in Ar or O2 ambient, but the DZ width in the two samples differed to a certain extent. With the first‐step RTP in O2 ambient, the two samples with the second‐step RTP in Ar and N2 ambients respectively possessed reasonably comparable DZ width and BMD density. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Application of rapid thermal process to solution-processed Ti-silicate films for enhancing permittivity without losing amorphous nature

Variations of deep levels in Si-doped molecular-beam epitaxy (MBE) n-GaAs layers by rapid thermal processing (RTP) were investigated by deep-level transient spectroscopy. RTP was performed at 850, 910, and 1000 °C with SiOx encapsulation. Native deep levels M1 (Ec − 0.18 eV), M3 (Ec − 0.33 eV), and M4 (Ec − 0.51 eV) are annealed out by RTP at a higher temperature (1000 °C) compared with the case of capless RTP. Three electron traps NC1 (Ec − 0.36 eV), NC2 (Ec − 0.48 eV), and EL2 (Ec − 0.81 eV) are produced by RTP. After RTP at 850 and 910 °C, the concentrations of the EL2 decrease with depth from the surface and show no peculiar lateral distribution across the wafer, which is different from that of capless RTP reported previously. The formation of the EL2 is enhanced by the stoichiometry change due to the Ga outdiffusion into the SiOx film during RTP. After RTP at 1000 °C, the outdiffusion of the EL2 is observed near the surface. This result seems to be ascribed to the As loss, since it can no longer prevent the As evaporation at such high temperature. Though it has been reported previously that an N1 trap which has a broad energy level (Ec − 0.5–0.7 eV) is formed in MBE GaAs by RTP without any encapsulation, no N1 trap was observed in a SiOx-capped sample after RTP. We discuss the difference of the EL2 concentration depth profiles between SiOx-capped MBE GaAs and capless samples after RTP, considering the absence of the trap N1 in capped samples.

A new proprietary rapid thermal processing (RTP) method has been developed and implemented for the fast switching of a gas ambient surrounding a wafer inside a RTP furnace operated in the low pressure or atmospheric pressure regime. By controlling the gas flow pattern around a semi-conductor wafer, the effective volume of process gas interacting with the wafer has been reduced by a factor of 33. Thus, real-time gas sequencing can be realized so that multiple rapid thermal processing steps, involving dry and wet rapid thermal oxidation (RTO), rapid thermal nitridation (RTN), rapid thermal annealing (RTA) and chemical vapor deposition (CVD), can be carried out sequentially in a single RTP cycle. Experimental data from ion implant anneal and thermal oxide thin film growth will be presented to illustrate the major technical challenges and solutions associated with the integration of the new method into the Summit/spl trade/ RTP systems. Using this approach, the benefits of rapid thermal processing with high productivity and quick ambient switching is realized.

Poly(methyl methacrylate)-derived graphene films on different substrates using rapid thermal process: a way to control the film properties through the substrate and polymer layer thickness

In this work, efficiency enhancement of wafer based polycrystalline silicon (pc-Si) solar cells has been investigated by using plasmonic silver nanoparticles (Ag NPs) on the top surface. Ag NPs has been fabricated by rapid thermal processing (RTP) of non-continuous silver thin film at low temperature regime (200–300 °C) for various RTP durations (5–30 min). The results obtained reveals that an optimum RTP durations of 20 min leads to drastic reflectance reduction of pc-Si wafers with minimum average particle size at all temperatures. At 20 min RTP duration, the total reflectance of the pc-Si wafers integrated with Ag NPs reduced from 35.1% of the raw pc-Si wafer to 12.97, 17.9 and 19.31% respectively at 200, 250 and 300 °C in the wavelength region 300–800 nm. Around 3% increase in conversion efficiency of pc-Si solar cells is observed due to incorporation of plasmonic Ag nanoparticles.

We have investigated the motion of dislocations originating from Vicker indentations in single-crystalline silicon wafers subjected to high temperature rapid thermal processing (RTP) under different ambients. It is found that the dislocations move very rapidly due to the release of residual stress around the indentations during the RTP. Moreover, as the RTP temperature exceeds 1100 °C, the dislocation gliding distances in the specimens subjected to the RTP in N2 atmosphere are much shorter than in Ar ambient. We believe that the nitrogen atoms injected into the indentation by the RTP under N2 ambient exhibit a pinning effect on dislocation motion. It is thus shown that the high temperature RTP in N2 ambient can improve the mechanical strength of silicon wafer.

Flexible CdTe solar cells on ultra-thin glass substrates can enable new applications that require high specific power, unique form-factors, and low manufacturing costs. To be successful, these cells must be cost competitive, have high efficiency, and have high reliability. Here we present back contact processing conditions that enabled us to achieve over 16% efficiency on flexible Corning® Willow® Glass substrates. We used co-evaporated ZnTe:Cu and Au as our back contact and used rapid thermal processing (RTP) to activate the back contact. Both the ZnTe to Cu ratio and the RTP activation temperature provide independent control over the device performance. We have investigated the influence of various RTP conditions to Cu activation and distribution. Current density-voltage, capacitance-voltage measurements along with device simulations were used to examine the device performance in terms of ZnTe to Cu ratio and rapid thermal activation temperature.

Nonalloyed Ohmic contacts of evaporated Pt/Ti to p-InGaAsP (λg=1.3 μm) with different Zn doping levels ranging 5×1018–2×1019 cm−3 have been fabricated by rapid thermal processing. These contacts showed Ohmic behavior prior to any heat treatment with a specific contact resistance of 4×10−3 Ω cm2 for the lowest doping level and 1×10−4 Ω cm2 for the highest level. A decrease in the specific resistance was achieved by supplying rapid thermal processing to the contacts, while the lowest values were observed on all the contacts as a result of heating at 450 °C for 30 sec. The lowest resistance of 1×10−6 Ω cm2 was achieved at the contact that was formed on the 2×1019 cm−3 Zn-doped InGaAsP layer. Measurements of the conduction activation energy yields a good linear dependence of the specific resistance on temperature in all the contacts as deposited and after the different heat treatments. The higher the doping level and the rapid thermal processing temperature up to 450 °C, the lower the activation energy, which may suggest an increase in the tunneling carrier transport mechanism contribution at the expense of the thermionic-emission one. The morphology and microstructure of these contacts were not influenced by the variations in the Zn doping concentration.

ABSTRACTA methodology for predicting the spatial and temporal distribution of film thickness is given for Chemical Vapor Deposition (CVD), and for thermal oxidation in Rapid Thermal Processor (RTP) systems, e.g. RTPCVD and RTO. The methodology is based on a wafer thermal model for the heat transfer to, from and within the wafer, a geometric ray trace algorithm to predict the radiant heat transfer from the lamps and reflectors to the wafer, a process model for the deposition or oxidation, and a gas flow model to predict the flow field in the RTP chamber. The CVD process is based on the Arrhenius deposition model, and thermal oxidation is based on a parallel diffusion model. The methodology has been validated by comparison of measured and predicted final film thickness from a cylindrical RTP system. The methodology is based on physical principles, with a minimum reliance on empirical relations and experimental data. As such it can be used for optimization of existing RTP designs and for the evaluation of proposed RTP configurations, such as new or novel lamp, reflector or chamber geometry.

Rapid thermal processing (RTP) is becoming increasingly more important in semiconductor wafer fabrication. A nonlinear physical model for a generic RTP system is described. This generic RTP system is representative of the state-of-the-art RTP systems. A low-order nonlinear model is developed. A model-based LQG controller is designed for the low-order model which successfully controls the full-order nonlinear simulation model.