Instruction-level programming approach for very long instruction word digital signal processors

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This paper is focused on the benefit of low-level programming of Digital Signal Processors (DSPs) with Very Long Instruction Word (VLIW) architecture. Specifically, the process of hardware resources allocation which is outlined in text and proved by basic matrix benchmarks. Compared to available library functions, the proposed results decrease the number of execution cycles by tens of percent for smaller matrix dimensions and help developers to solve critical parts of their applications in the instruction-level approach.