Integrating Diamond for Cooling Electronics

The maximum output power of GaN-based high-electron mobility transistors is limited by high channel temperature induced by localized self-heating, which degrades device performance and reliability. Chemical vapor deposition (CVD) diamond is an attractive candidate to aid in the extraction of this heat and in minimizing the peak operating temperatures of high-power electronics. Owing to its inhomogeneous structure, the thermal conductivity of CVD diamond varies along the growth direction and can differ between the in-plane and out-of-plane directions, resulting in a complex three-dimensional (3D) distribution. Depending on the thickness of the diamond and size of the electronic device, this 3D distribution may impact the effectiveness of CVD diamond in device thermal management. In this work, time-domain thermoreflectance is used to measure the anisotropic thermal conductivity of an 11.8 μm-thick high-quality CVD diamond membrane from its nucleation side. Starting with a spot-size diameter larger than the thickness of the membrane, measurements are made at various modulation frequencies from 1.2 to 11.6 MHz to tune the heat penetration depth and sample the variation in thermal conductivity. We then analyze the data by creating a model with the membrane divided into ten sublayers and assume isotropic thermal conductivity in each sublayer. From this, we observe a two-dimensional gradient of the depth-dependent thermal conductivity for this membrane. The local thermal conductivity goes beyond 1000 W/(m K) when the distance from the nucleation interface only reaches 3 μm. Additionally, by measuring the same region with a smaller spot size at multiple frequencies, the in-plane and cross-plane thermal conductivities are extracted. Through this use of multiple spot sizes and modulation frequencies, the 3D anisotropic thermal conductivity of CVD diamond membrane is experimentally obtained by fitting the experimental data to a thermal model. This work provides an improved understanding of thermal conductivity inhomogeneity in high-quality CVD polycrystalline diamond that is important for applications in the thermal management of high-power electronics.

Wide-bandgap gallium nitride (GaN)-based semiconductors offer significant advantages over traditional Si-based semiconductors in terms of high-power and high-frequency operations. As it has superior properties, such as high operating temperatures, high-frequency operation, high breakdown electric field, and enhanced radiation resistance, GaN is applied in various fields, such as power electronic devices, renewable energy systems, light-emitting diodes, and radio frequency (RF) electronic devices. For example, GaN-based high-electron-mobility transistors (HEMTs) are used widely in various applications, such as 5G cellular networks, satellite communication, and radar systems. When a current flows through the transistor channels during operation, the self-heating effect (SHE) deriving from joule heat generation causes a significant increase in the temperature. Increases in the channel temperature reduce the carrier mobility and cause a shift in the threshold voltage, resulting in significant performance degradation. Moreover, temperature increases cause substantial lifetime reductions. Accordingly, GaN-based HEMTs are operated at a low power, although they have demonstrated high RF output power potential. The SHE is expected to be even more important in future advanced technology designs, such as gate-all-around field-effect transistor (GAAFET) and three-dimensional (3D) IC architectures. Materials with high thermal conductivities, such as silicon carbide (SiC) and diamond, are good candidates as substrates for heat dissipation in GaN-based semiconductors. However, the thermal boundary resistance (TBR) of the GaN/substrate interface is a bottleneck for heat dissipation. This bottleneck should be reduced optimally to enable full employment of the high thermal conductivity of the substrates. Here, we comprehensively review the experimental and simulation studies that report TBRs in GaN-on-SiC and GaN-on-diamond devices. The effects of the growth methods, growth conditions, integration methods, and interlayer structures on the TBR are summarized. This study provides guidelines for decreasing the TBR for thermal management in the design and implementation of GaN-based semiconductor devices.

Superior thermoelectric property requires high electrical conductivity ( $$\sigma$$ ), Seebeck coefficient (S) but low thermal conductivity (k). GaN/InxGa1-xN/GaN superlattice (SL) has a strong interfacial polarization electric (IPE) field ~ 1 MV/cm at hetero-interfaces. Experiments reported that IPE field enhances S and $$\sigma$$ of the SL. In this paper, IPE field on thermal boundary resistance (TBR) and cross-plane thermal conductivity (kcp) of the SL is explored for indium contents x = 0.1 and 0.3 theoretically. IPE field revises phonon velocity causing enhanced boundary/interface scattering. Our result shows that TBR is enhanced (2.10–5. 30) ✕ 10–9 m2 KW−1 due to unequal changes in specific heat and phonon velocity on both sides of interface leading to decreased phonon transmission and acoustic properties of material become more dissimilar under IPE field. This reduced kcp. For GaN (10 nm)/InxGa1-xN (5 nm) SL, room-temperature (RT) kcp in the presence (absence) of IPE field is 4.652 (5.720) and 4.282 (5.221) Wm−1 K−1, respectively, for x = 0.1 and 0.3 proving more than 20% reduction. This work demonstrates that desired value of k can be achieved by tailoring interfacial polarization field of SL for optimum power production at RT and above.

As the demand for high-frequency and high-power electronic devices has increased, gallium nitride (GaN), particularly in the context of high-electron mobility transistors (HEMTs), has attracted considerable attention. However, the ‘self-heating effect’ of GaN HEMTs represents a significant limitation regarding both performance and reliability. Diamond, renowned for its exceptional thermal conductivity, represents an optimal material for thermal management in HEMTs. This paper proposes a novel method for directly depositing diamond films onto N-polar GaN (NP-GaN) epitaxial layers. This eliminates the complexities of the traditional diamond growth process and the need for temporary substrate steps. Given the relative lag in the development of N-polar material growth technologies, which are marked by surface roughness issues, and the recognition that the thermal boundary resistance (TBRGaN/diamond) represents a critical factor constraining efficient heat transfer, our study has introduced a series of optimizations to enhance the quality of the diamond nucleation layer while ensuring that the integrity of the GaN buffer layer remains intact. Moreover, chemical mechanical polishing (CMP) technology was employed to effectively reduce the surface roughness of the NP-GaN base, thereby providing a more favorable foundation for diamond growth. The optimization trends observed in the thermal performance test results are encouraging. Integrating diamond films onto highly smooth NP-GaN epitaxial layers demonstrates a reduction in TBRGaN/diamond compared to that of diamond layers deposited onto NP-GaN with higher surface roughness that had undergone no prior process treatment.

The thermoelectric performance of Gallium Nitride (GaN) is inherently limited by its relatively high thermal conductivity and low electrical conductance and thus subsequently decreases its efficiency for power generation from thermal differences. To overcome these limitations, we propose the GaN/WSSe vdW Heterostructure to lower the thermal lattice conductivity and enhance efficiency. Our present work utilizes density functional theory (DFT) to explore structural, electronic, and thermal transport characteristics. The stability of both the monolayer and bilayer structures has been evaluated by analyzing their energetic and thermodynamic stability. The adhesion energy was calculated for the bilayer to verify the most stable stacking model of the GaN/WSSe. The Se-4 and S-3 stacking model has the highest adhesion energies of -508 and -663 meV, respectively, and exhibits staggered (type-II) band alignment, enabling the separation of charge carriers at the interface. Furthermore, the thermoelectric transport characteristic has been analyzed using the nonequilibrium Green's function (NEGF) formalism with the Landauer-Büttiker framework, which describes ballistic quantum transport. The electronic transport channels at the interface suppress the electron scattering, causing a higher Ge of vdWHs and also intermediate thermopower between |S|GaN and |S|WSSe. The Se-4 and S-3 vdWHs enhance the phonon scattering, leading to a decrease in phonon thermal conductance (κph) and consequently resulting in high ZT values of 3.99 and 4.23 having been achieved at higher temperatures. The findings indicate that the GaN/WSSe vdWH holds significant potential for thermoelectric applications.

Thermal conductivity of polydisperse hexagonal BN/polyimide composites: Iterative EMT model and machine learning based on first principles investigation

A wood-inspired epoxy-based electronic packaging material with vertically aligned thermally conductive channels for electromagnetic waves absorption and thermal management

Significant reductions in both the in-plane and cross-plane thermal conductivities of superlattices, in comparison to the values calculated from the Fourier heat conduction theory using bulk material properties, have been observed experimentally in recent years. Understanding the mechanisms controlling the thermal conductivities of superlattice structures is of considerable current interest for microelectronic and thermoelectric applications. In this work, models of the thermal conductivity and phonon transport in the direction perpendicular to the film plane of superlattices are established based on solving the phonon Boltzmann transport equation (BTE). Different phonon interface scattering mechanisms are considered, including elastic vs inelastic, and diffuse vs specular scattering of phonons. Numerical solution of the BTE yields the effective temperature distribution, thermal conductivity, and thermal boundary resistance (TBR) of the superlattices. The modeling results show that the effective thermal conductivity of superlattices in the perpendicular direction is generally controlled by phonon transport within each layer and the TBR between different layers. The TBR is no longer an intrinsic property of the interface, but depends on the layer thickness as well as the phonon mean free path. In the thin layer limit, phonon transport within each layer is ballistic, and the TBR dominates the effective thermal conductivity of superlattices. Approximate analytical solutions of the BTE are obtained for this thin-film limit. The modeling results based on partially specular and partially diffuse interface scattering processes are in reasonable agreement with recent experimental data on GaAs/AlAs and Si/Ge superlattices. From the modeling, it is concluded that the cross-plane thermal conductivity of these superlattices is controlled by diffuse and inelastic scattering processes at interfaces. Results of this work suggest that it is possible to make superlattice structures with thermal conductivity totally different from those of their constituting materials.

Thermal interface material (TIM) is a component frequently used for achieving more efficient heat transfer in the packaging of modern microsystems, such as integrated circuits, micro-electro-mechanical systems, and photonic devices. TIMs applied in the microsystem packages today are typically made of polymeric matrices such as epoxy dispersed with fillers such as silver, which has high thermal conductivity. Graphene is an allotrope of carbon synthesized and characterized by scientists since the beginning of the twenty-first century. Based on experimental and theoretical research, it has been revealed that graphene possesses the highest thermal conductivity among the known materials till now. Therefore, dispersing graphene fillers in polymeric metrics has been attempted to yield more efficient TIMs for applications in microsystem packaging. However, according to the experimental research to date, the heat transfer performance achieved on polymer-graphene TIMs is not as anticipated. It is established that the significant thermal boundary resistance across the interface between polymeric metrices and graphene fillers makes a big contribution to the suppressed heat transfer performance of the polymer-graphene TIMs. In this work, multiscale modeling and simulations have been established to investigate the heat transfer performance of TIMs composed of epoxy matrix and graphene fillers. Firstly, by employing molecular dynamics simulations, the introduction of molecular interposers at the epoxy-graphene interface is explored as a solution to enhance the epoxy-graphene interfacial heat transfer. It is revealed that the epoxy-graphene thermal boundary resistance could be significantly reduced by the introduction of molecular interposers. Secondly, the influence of molecular interposers on the heat transfer performance of epoxy-graphene TIMs is evaluated based on calculations using the effective media theory. A great improvement on the heat transfer performance of epoxy-graphene TIMs is discovered when molecular interposers are introduced. Lastly, by using finite element analysis, the response speed of a temperature sensor packaged by epoxy-graphene TIM is studied. Based on transient thermal solution results, it is demonstrated that the temperature sensing response speed of the temperature sensor can be made much faster, when molecular interposers are introduced to the epoxy-graphene interface.

Purpose: The purpose of the present study was to demonstrate the procedure for determining the thermal conductivity of a solid material with relatively high thermal conductivity, using an original self-designed apparatus. Design/methodology/approach: The thermal conductivity measurements have been performed according to the ASTM D5470 standard. The thermal conductivity was calculated from the recorded temperature values in steady-state heat transfer conditions and determined heat flux. Findings: It has been found from the obtained experimental results that the applied standard test method, which was initially introduced for thermal conductivity measurements of thermal interface materials (TIMs), is also suitable for materials with high thermal conductivity, giving reliable results. Research limitations/implications: The ASTM D5470 standard test method for measurement of thermal conductivity usually gives poor results for high conductive materials having thermal conductivity above 100 W/mK, due to problems with measuring heat flux and temperature drop across the investigated sample with reasonably high accuracy. Practical implications: The results obtained for the tested material show that the presented standard test method can also be used for materials with high thermal conductivity, which is of importance either for the industrial or laboratory applications. Originality/value: The thermal conductivity measurements have been carried out using an original self-designed apparatus, which was developed for testing broad range of engineering materials with high accuracy.

Thermal resistance and phonon scattering at the interface between carbon nanotube and amorphous polyethylene

Thermal boundary resistance (TBR), which measures an interface's resistance to the thermal flow, is of critical importance among various areas, such as electronics cooling and thermoelectric materials. As for measuring TBR, electrical techniques are generally less sensitive compared to optical ones, but they are easily operable and compatible with the measurement of other electric properties; thus, it is highly desirable to develop electrical methods with higher accuracy and larger measurement range. Here, a two-sensor 3ω-2ω method with a novel experimental procedure design is proposed, which can well address those deficiencies in the conventional 3ω method. Two parallel metal sensors are fabricated, with one of them being wide and the other being narrow. The temperature changes of these two sensors are measured by detecting the 3ω and 2ω signals, respectively. The measurement includes three steps: (1) obtain thin film's thermal conductivity from the wide sensor's 3ω thermal response; (2) obtain substrate thermal conductivity from the narrow sensor's 2ω thermal response; and (3) derive an effective TBR from the narrow sensor's 3ω thermal response. Moreover, it is found the TBRs of metal/dielectric and dielectric/substrate interfaces are distinguishable due to the considerable difference between their contact areas, which enables us to separate these two TBRs by varying the contact area (heater's width). Then, our method is employed to probe the TBRs between the Al2O3 nanofilm and Si as well as SiC substrates at room temperature and good agreement with the previous measurements is achieved, verifying its feasibility. Our present scheme will be helpful for the experimental study of interfacial thermal transport.

Integrating high thermal conductivity cost-effective SiC to the Si-active-layer film is an effective solution to enhance the thermal performance of silicon-on-insulator (SOI) and maintain its distinct electrical performance. Although direct bonding of Si films to SiC substrates demonstrates many advantages over epitaxial growth, different bonding techniques may yield disparate bonding qualities and heat dissipation abilities. Here, a comparative analysis from thermal-mechanical-structural perspectives of different Si/SiC interfaces, prepared by hydrophilic bonding (HB) and surface-activated bonding (SAB) methods, is systematically conducted. It was found that the amorphous interlayer thickness and thermal boundary resistance (TBR) of the SAB-Si/SiC heterojunction can be significantly modulated by annealing, accompanied by a beneficial decreased TBR at high working temperatures. Moreover, the residual stress within the Si film by SAB is greatly reduced to an order of magnitude lower than that by HB. In general, the SAB-Si/SiC interface exhibits a tunable microstructure, comparably low TBR, and nearly fully relaxed stress, potentially outperforming the HB-Si/SiC interface when considering the comprehensive performance. This work puts forward an important thermal-mechanical perspective to evaluate interface bonding quality for practical applications, and removes a headache barrier toward wafer-scale high-yield integration of Si active layers onto SiC substrates to greatly enhance SOI devices' thermal management.

In recent years, heat generation and heat density of electronic devices have been increasing due to highly integrated and high working frequency of semiconductors. Power devices have a cooling system to release its generated heat efficiently. For cooling system low thermal resistance material is required in order to conduct generated heat from semiconductor to the heat sink. This paper reports a very low thermal resistive film material developed for thin, high thermal conductive, good compliance to the surface to reduce thermal contact resistance and high resistance for dielectric-breakdown material for power devices. High thermal conductive films have been promoted in the market. However they have limitations of 1) thermal contact resistance due to low compliance to the surface caused by high modulus as a result of high loading volume of inorganic fillers, and 2) thickness to ensure the dielectric-breakdown resistance. For these challenges we have applied a low modulus resin to satisfy both high filler loading and compliance to the surface. We also have tried optimizing particle size and loading volume of inorganic filler. As a result of development we achieved to have a film material which can suppress corona discharge, has high dielectric-breakdown resistance even thickness is less than 100 um, and has more than 5 W/m-K of thermal conductivity. To confirm the heat dissipation performance of this material we performed to measure thermal resistance which has to be a key factor for the thermal design of power devices. The thermal resistance was 0.86 K/W when 50 μm compare to 1.45 K/W with conventional 125 um film in the market. It demonstrates that this material has very low thermal resistance. It is expected that using this film material may reduce the joint temperature of semiconductor and also improve thermo-mechanical reliability of the power device by a good stress relaxation performance given by low modulus.

The thermal boundary resistance is the key feature of innovative approach of high-thermal-conductivity diamond substrate for high-power GaN HEMTs, and has significant impact on the thermal design of GaN chip. A three-dimensional thermal simulation for analysis of the heat dissipation capability of different thermal designs is presented by finite element method. The model accounts for the nonlinear thermal conductivity of GaN and diamond materials by employing Kirchhoff's transformation with the aims to improve calculation accuracy. We investigate impact rules of thermal boundary resistance on the thermal design of the GaN chip, including the GaN buffer, diamond substrate, gate-gate pitch spacing, and chip size. Those results indicate that the impacts of diamond thickness and chip size on junction temperature are have a rule, the thermal boundary resistance has no influence upon the rules, but it influences the variation of the junction temperature. In addition, the rule for impact of gate-gate pitch spacing on junction temperature is limited by the thermal boundary resistance, and the impact is proportional to the value of thermal boundary resistance. What is worth our special attention is the impact of GaN thickness on junction temperature, the optimal GaN thickness should exist for the junction temperature, and is also affected by the thermal boundary resistance. Overall, we provide thermal structure design guidelines for GaN-based diamond substrate.