Cloud FPGAs have been gaining interest in recent years due to the ability of users to request FPGA resources quickly, flexibly, and on-demand. In addition to the existing single-tenant deployments, where each user gets an access to a whole FPGA, recent academic proposals have looked at creating multi-tenant deployments, where multiple users share a single FPGA, e.g., [3]. In both settings, there is a large amount of infrastructure and physical resources that are shared among users. Sharing of the physical resources in data centers and processors is well known to lead to potential attacks, e.g., [4]. However, only recently have there been demonstrations of various security attacks that our group and others have shown to be possible in Cloud FPGA setting, e.g., [5]. This talk will discuss Cloud FPGA security from the perspective of side and covert channel attacks that arise due to these shared resources. It will first cover our recent work on thermal channels that can be used to create covert channels between users renting same FPGA over time [5]. These channels can create stealthy communication medium for leaking small amounts of sensitive information, e.g., cryptographic keys. As defense strategies, the talk will point out possible solutions at the system level and at the hardware level. At the system level, adding delays between when different users can access the same FPGA, or preventing users from being able to identify unique FPGA instances can mitigate the threats, but does increase overhead. At the hardware level, additional cooling to erase thermal information after users uses and FPGA, or new sensors to monitor FPGAs and generate an alert when excessive heat is detected are possible solutions that will be discussed. The talk will also discuss recent work on voltage-based attacks that leverage custom circuits instantiated inside the FPGAs to measure voltage changes. Voltage-based channels can be used to leak sensitive information across FPGAs (in single-tenant or multi-tenant settings) [2], or can be combined with other existing attacks to perform cross-talk leakage inside the FPGAs (in multi-tenant settings) [1]. These attacks highlight the power of attacker when they are able to synthesize any circuit into a shared FPGA environment. Furthermore, even with certain restrictions on the types of designs that can be synthesized, this talk will show how attacks can be deployed. As defense strategies, the talk will point out possible new design check rules that can be used by Cloud FPGA providers. In light of the attacks and defenses, Cloud FPGA security remains a cat-and-mouse game. There is then the foremost need to better understand the existing and potential attacks -- to design defenses and deploy them before malicious users try to launch such attacks. Only with proper understanding of the possible FPGA attacks, can secure Cloud FPGAs be created.
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