Jitter Effect on a Digital IF Transceiver for SDR-based Mobile communication Base Station

A multi-mode reconfigurable digital intermediate frequency (IF) module for software defined radio (SDR) transmitters is presented. It supports variable input sample rate from 7kHz to 30.72MHz, and variable signal bandwidth from 5kHz to 20MHz. Its output sample rate is 80MHz or 160MHz.The digital IF module consists of 7 half-band filters, a digital up converter (DUC) and 4 FIR filters. Each stage can be turned off separately. The 10-bit output signal to noise and distortion ratio (SNDR) is above 54.5dB, while the 12-bit input signal SNDR is 60dB.This digital IF module supports both traditional narrowband industry-specific network and LTE cluster communication applications.

Recently, digital Intermediate Frequency (IF) waveform generators and receivers are introduced in modern radar systems to reduce the cost, size, and achieve better performance. Moreover, digital IF waveform generators achieve the requirements of high resolution and complex modulation schemes. Digital receivers have better sensitivity, wider dynamic range and lower noise Figure than analog receivers. Digital IF waveform generators and receivers work well in conjunction with a high-speed Analog to Digital Converters (ADC) and Digital to Analog Converters (DAC). In this paper, the design and implementation of high-speed data acquisition circuits (ADC and DAC) to generate and acquire IF waveforms are presented. Different modulated waveforms are generated digitally using Field Programmable Gate Array (FPGA). The corresponding digital receiver, including digital phase detection and matched filtering, is designed and implemented on the same FPGA chip. Design and implementation of a Printed Circuit Board (PCB) including FPGA chip and its required circuitry are introduced. The proposed design is simulated using Computer-Aided Design (CAD) tools and verified experimentally through laboratory testing.

To satisfy the requirement of high performance signal processing technique, it is necessary to use the direct sampling of intermediate frequency signal to obtain quadrature signals.Digital intermediate frequency (DIF) system is widely used in radar and communication system.This paper briefly introduces the principle of test system based on DIF.We design this DIF test system to test the performance of ADC and I/Q.The design has the advantages of convenient use, and reliable performance.

A bandpass delta-sigma modulator (BPDSM) is a key building block to implement a digital intermediate frequency (IF) receiver in a wireless communication system. This paper proposes a time-interleaved (TI) recursive loop BPDSM architecture that consists of five-stage TI blocks for a code-division multiple-access (CDMA) receiver. The proposed TI BPDSM provides reduction in the clock frequency requirement by a factor of 5 and relaxes the settling time requirement to one-fourth of the conventional approach. The test chip was designed and fabricated for a 30-MHz IF system with a 0.35-/spl mu/m CMOS process. The measured peak SNR for a 1.25-MHz bandwidth is 48 dB while dissipating 75 mW from a 3.3-V supply and occupying 1.3 mm/sup 2/.

The Software Defined Radio (SDR) paradigm as applied to GNSS has blossomed in the last twenty years. This approach involves performing all the high rate processing from Intermediate Frequency (IF) to baseband, including acquisition, tracking and observation generation, in software. In this time interval the capabilities of modern processors have evolved significantly, enabling more interesting processing, of more signals with wider bandwidths. Equally, low cost or embedded platforms today have processing capabilities surpassing those of the desktop computers used in the first experiments in GNSS SDR. In this work we investigate the possibilities for optimizing the software implementation of high rate GNSS signal processing tasks. In contrast to some earlier work in this field, rather than considering the optimization of a specific operation for a specific platform, we consider the general problem of maintaining a software code base that is capable of performing across a range of target machines, with a range of performance requirements, both in terms of processing efficiency (the number of channels that can be processed in real time, for example) and the processing accuracy (certain approximations can reduce the computational complexity at the cost of a loss in Signal-to-Noise Ratio (SNR) or ranging performance).

In this paper, a novel control algorithm for near-infrared spectra detection system based on grating light modulators is proposed. Firstly, the principle of this novel control algorithm is analyzed theoretically, and the encoding and decoding process of two scanning modes based on the control algorithm are obtained. Secondly, the numerical simulation is carried out to evaluate the effect of this control algorithm on the signal-to-noise ratio (SNR) of the spectra detection system. The difference between the SNR of the system under different scanning modes is acquired. When the number of pixels M in a unit becomes larger, the stage number of driven voltages is smaller. In the end, related experiments have been set up, and the feasibility of the control algorithm is validated. By using the novel control algorithm, the detected spectrum of 1340nm narrow band filter could be reconstructed well and the deviations of the peak wavelengths under both scanning modes based on this algorithm are less than 1nm. Furthermore, the novel Hadamard transforms scanning mode based on this control algorithm could not only decrease the complexity of the control circuit but also increase the SNR of the spectra detection system.

Modularized GPS software defined radio (SDR) has many advantages of applying and modifying algorithm. Hardware based GPS receiver uses many hardware parts (such as RF front, correlators, CPU and other peripherals) that process tracked signal and navigation data to calculate user position, while SDR uses software modules, which run on general purpose CPU platform or embedded DSP. SDR does not have to change hardware part and is not limited by hardware capability when new processing algorithm is applied. The weakness of SDR is that software correlation takes lots of processing time. However, in these days the evolution of processing power of MPU and DSP leads the competitiveness of SDR against the hardware GPS receiver. This paper shows a study of modulization of GPS software platform and it presents development of the GNSS software platform using MATLAB Simulink™. We focus on post processing SDR platform which is usually adapted in research area. The main functions of SDR are GPS signal acquisition, signal tracking, decoding navigation data and calculating stand alone user position from stored data that was down converted and sampled intermediate frequency (IF) data. Each module of SDR platform is categorized by function for applicability for applying for other frequency and GPS signal easily. The developed software platform is tested using stored data which is down-converted and sampled IF data file. The test results present that the software platform calculates user position properly.

NASA's Deep Space Network is currently updating a number of sub systems within the Signal Processing Centers at its Deep Space Communication Complexes in order to modernize aging equipment in the downlink receivers for telemetry, tracking, radio science, and radio astronomy. To reduce development costs and increase commonality among these traditionally custom-built receivers, the implementation team has developed a flexible architecture built primarily around commercial off-the-shelf hardware compliant with the Micro Telecommunications Computing Architecture (uTCA) specification and commercial high speed 10Gbit Ethernet switches. Custom firmware and software are being developed to perform the required signal processing functions needed to replace the legacy systems in a phased implementation approach which establishes a new digital Intermediate Frequency (IF) signal distribution system first, followed by implementations of various receiver functions as dictated by need. The first of these new receivers, the Open Loop Receiver, will come online in the Fall of 2018. A description of the new architecture, referred to as the “Common Platform”, will be provided followed by an overview of the phased implementation approach and initial OLR performance results.

In this paper, we implement the UDCM (up down conversion module) for the WiBro base station equipment RAS (radio access station). It performs the digital IF (intermediate frequency) signal processing between a channel card and the radio equipments (REs). The UDCM embed on digital optic interface unit of RAS. Converting the frequency into 10 MHz or baseband is the main function. It filters the spurious within channel bandwidth for downlink (DL) /uplink (UL). Also to support the communication with the other chips or peripherals, we design the interface modules and controller. As the UDCM is optimized on the Virtex5 families, it can save the dedicated FPGA resources and lowers the development costs. Its functionality is verified using simulation tools on the RTL (register transfer level) for the predefined test vector. After setting the timing constraints for the interface signals and timing verification, the UDCM downloaded into main unit. Finally, this digital unit is connected to a channel card and REs to ensure the expected performance for its reference simulation results by capturing I/Q, synchronization signals.

This paper describes a GPS (Global Positioning System) signal acquisition method using sample-based shifting and FFT (Fast Fourier Transform). Before the digital IF (Intermediate Frequency) signal is processed with the correlation algorithm, an averaging algorithm is applied to reduce the FFT operation. The principle of sample-based shifting is presented and its influence on the maximum correlation value is also simulated and analyzed. The result of simulation indicates that this method can increase the maximum correlation value and reduce the number of correlation operations.

An Integrated Approach for Jammer Detection using Software Defined Radio

With the wide application of new media, users require more and more mobile communication. In order to satisfy users’ high-quality experience and save resources, it is necessary to predict the traffic data of mobile communication base station, so that mobile communication base station can adjust the frequency load quantity according to the traffic fluctuation. From March 1 to April 9, 2018, this paper collects traffic data, selects 40, 000 sets of data, uses python to mine data, and predicts the traffic data of mobile communication base station by establishing wavelet neural network short-time traffic prediction model. The results show that the average accuracy of the short-term prediction model is 43. 15 and the root mean square error is 0. 0076.

For WPAN (Wireless Personal Area Network) applications, a low-power low-noise IF (Intermediate-Frequency) circuit is proposed for GFSK (Gauss Frequency Shift Keying) low-IF receivers. The proposed IF system is realized by an all-analog architecture, which is composed of a couple of LAs (Limiting Amplifiers) and RSSIs (Received Signal Strength Indicators), a couple of BPFs (Band-Pass Filters), a FD (Frequency Detector), a LPF (Low-Pass Filter) and a slicer. The chip is implemented with HJTC 0.18-μm CMOS technology and measured under a data rate of 100 kb/s, a carrier frequency of 200 kHz and a modulation index of 1.0. The RSSI has a dynamic range of 51 dB with a logarithmic linearity error of less than ±1 dB. For 0.1% BER (Bit Error Ratio), the minimum input SNR (Signal-to-Noise Ratio) of the proposed IF circuit is 5 dB, and the input dynamic range of the whole IF circuit is 55.4 dB. When the input SNR is set at 6 dB, the proposed circuit can tolerate a frequency offset from −3% to +9.5%. The total power consumption of the proposed IF circuit is 5.65 mW ∼ 5.89 mW.

Compensation of RF impairment in multi-band receiver based on RF sub-sampling

The noise simulation circuit of noncoherent spread-spectrum system intermediate frequency (IF) signal simulator is designed based on FPGA and DSP. This circuit generates white Gaussian noise (WGN), calculates coefficients of signal-to-noise ratio (SNR) refer to the specified SNR of each channel and according to these coefficients to generate spread-spectrum IF signal for transmitting to simulate the actual receive signal of responder beacon (RSP). It has been verified that the result of test meets the requests of system.