Level-shift space vector pulse width modulation for a nine-switch inverter

This article proposes an optimized space vector pulsewidth modulation (SVPWM) strategy with minimum common-mode voltage (CMV). Compared with earlier SVPWM methods, the proposed optimized strategy is implemented in the 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> coordinates. Locating the sector triangle, calculating the duty cycles, and determining the switching sequences require only basic arithmetic operations, which greatly reduces the computational complexity. The switching state with minimum CMV corresponding to the space vector can be calculated directly. The proposed optimized modulation strategy effectively solves the problem that the traditional SVPWM is difficult to be implemented as the number of levels increases. It can be easily extended to any level converters without additional computational burden. Based on the proposed optimized SVPWM strategy with minimum CMV, the SVPWM strategy for eliminating CMV is proposed. The proposed SVPWM strategy for eliminating CMV improves the utilization of the redundant cells and reduces the total harmonic distortion of phase voltages without increasing the difficulty of implementing the SVPWM algorithm. Finally, the proposed two SVPWM strategies are verified with extensive simulations and experiments.

This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for multilevel inverters. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is provided in the paper. Simulation results of five-, six-, and seven-level inverters are given.

The Variable Frequency Drives (VFD) are a common type of controlling the speed of 3-phase induction motors which are based on two control modulation techniques of Voltage Source Inverter: Sinusoidal Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SV-PWM). The SPWM control technique is known as an easier implementation, but the SV-PWM control technique can be distinguished by an easier digital realization and a better utilization of DC bus. All 3-phase PWM inverters produce a total harmonic distortion (THD) on its output, which causes electromechanical and thermal stresses. The aim of this paper is comparing the low order current harmonics while driving an unbalanced 3-phase induction motor (the case of deterioration of the insulation as a result of inter-turn short circuits between few turns of the same phase) using SPWM and SV-PWM two-level 3-phase Voltage Source Inverters (VSI). For this type of unbalanced 3-phase induction motor, the SVPWM and SV-PWM schemes are modeled and simulated using Matlab/Simulink software. A detailed comparative analysis of THD-phase currents is made for both modulation strategies at different switching frequencies while keeping the constant amplitude modulation index.

Multi-phase induction motor drives are being considered for various high power applications because of their superiority over three-phase counterparts. Space vector pulse width modulation (SVPWM) schemes can be utilized to improve output voltage spectrum of the inverter thus reducing stator harmonic currents and torque pulsation. Different SVPWM techniques are analyzed for a dual three-phase induction motor (DTIM) supplied from two three-phase inverters. Harmonic component in the phase current and phase voltage is analyzed for four different SVPWM schemes. A detailed modeling of DTIM along with SVPWM strategies are is presented in the paper. Simulation results are provided to verify the analysis proposed.

&lt;span&gt;In this paper, we present a comparative study between two-level space vector pulse width modulation (SVPWM) and seven-level SVPWM strategy in direct vector control (DVC) of a doubly fed induction generator (DFIG) based wind energy conversion systems (WECSs). The feasibility and effectiveness of the two strategies are demonstrated by simulation results. The obtained results showed that, the proposed DVC strategy with Seven-level SVPWM technique have stator and rotor current with low harmonic distortion and low active and reactive powers ripples than two-level SVPWM strategy.&lt;/span&gt;

A multiaverage random switching frequency space vector pulsewidth modulation (MARSF-SVPWM) strategy is proposed in this article, in order to further disperse the high-order harmonics concentrated at the switching frequency and its integer multiplies in the output voltage of the inverter. The proposed strategy divides the fundamental period equally, with different stages corresponding to different average switching frequencies and spread-spectrum ranges, in contrast with the conventional random switching frequency space vector pulsewidth modulation (RSF-SVPWM), under the premise of maintaining the same overall average switching frequency and spread-spectrum range. The simulation and experimental results demonstrate that, even in the case of a narrow spread-spectrum range, the proposed MARSF-SVPWM strategy can obtain a better effect of high-order harmonic dispersion.

The recent developments in power electronics technology have lead to the improvements of insulated gate bipolar transistor (IGBT) based Voltage source converter High voltage direct current (VSC HVDC) transmission systems. These are also commercially known as HVDC Light transmission systems, which are popular in renewable, micro grid, and electric power systems. Out of different pulse width modulation (PWM) schemes, Space vector PWM (SVPWM) control scheme finds growing importance in HVDC Light applications because of its better dc bus utilization. In this paper, SVPWM scheme is utilized to control the HVDC Light system in order to achieve better DC bus utilization, harmonic reduction, and for reduced power fluctuations. The simulations are carried out in the MATLAB/SIMULINK environment and the results are provided for steady state and dynamic conditions. Finally, the performance of SVPWM based vector controlled HVDC Light transmission system is compared with sinusoidal pulse width modulation (SPWM) based HVDC Light system in terms of output voltage and total harmonic distortion (THD).

This article presents an enhanced space vector pulse width modulation (SVPWM) strategy based on vector space decomposition (VSD) for the dual three-phase machines fed by two dc-source voltage source inverters (VSIs). Compared with existing methods that only account for balanced dc-link voltages, the proposed method considers unbalanced dc-link voltages in both the α-β and z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> -z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> planes. Two categories of medium voltage vectors are first defined in this article. An enhanced 12-sector SVPWM strategy that toggles two categories of medium voltage vectors in each fixed 30° sector is proposed. Moreover, the performance of the proposed method, including the modulation depth, the range of the dc-link voltage ratio, and the toggling point of the medium vector is analyzed. The proposed method can reduce the computational burden of the complicated sector classifications and it easily chooses suitable vectors to track the reference voltage with changes in the dc-link voltage ratio. The experimental results of the proposed SVPWM techniques are verified in a dual three-phase permanent magnet synchronous machine (PMSM) fed by two dc-source VSIs.

A modified space vector pulse width modulation (SVPWM) strategy based on vector space decomposition and its equivalent dual three-phase SVPWM realization are proposed in this paper, which is suitable for two-level six-phase voltage inverter fed asymmetrical dual stator induction machines (DSIMs). The DSIM is composed of two sets of symmetrical three-phase stator windings spatially shifted by 30 electrical degrees. The proposed SVPWM technique can reduce the torque ripple and suppress the harmonic currents flowing in stator windings. Above all, the equivalent relationship between the proposed SVPWM technique and the dual three-phase SVPWM technique has been demonstrated, which allows easy implementation for digital signal processor (DSP). Simulation and experimental results, carried out separately on a simulation system and a 3.0 kW DSIM prototype test bench, are presented and discussed.

&lt;p class="Abstract"&gt;Due to their better DC bus utilization and easier digital realization, Space Vector Pulse Width Modulation (SVPWM) scheme is the most widely used PWM scheme. Also two level inverter is the traditional frequency converter because it has fewer components and is lower complex to control, but on the other hand it generates higher harmonic distortion. This paper presents the realization of novel SVPWM approaches applied to the three phase induction motor drives. Specifically various schemes are based on using more combinations of step operation in each cycle to approximate the reference vector, such as 24 and 48 step operations in each cycle. The basic principle of conventional SVPWM with different modulation index M is presented. The switching sequences of new approaches are described. The modulation signals waveforms, DC bus voltage utilization, De-rated motor torque, standard error of average torque, voltage and current harmonic of new approaches are analyzed by the MATLAB/SIMULINK software. The results confirms that 48 step SVPWM approach is the best compared to other approaches.&lt;/p&gt;

The 9 switch inverter (9SI) configuration is capable to control the power for two independent 3-phase loads simultaneously. However, this 9SI has the limitation on modulation index (M.I) since each inverter leg is controlled with 2 reference waves and one carrier wave. This lower M.I result in higher magnitude requirement of DC-link voltage. In addition to this, the load gets 2 level voltage only. For addressing these issues, in this paper, the 9 switch inverter (9SI) configurations for multiphase (>3) Induction motor (MIM) drives is explored. The 9SI configurations with split winding will generate the 3-level voltage across the effective phase winding of 6-phase and 9-phase IM drives. The phase reconfiguring techniques for enhancing the modulation index of proposed 9SI based multilevel inverter (MLI) fed 6-phase as well as 9-phase machines is proposed, where the phase difference between two identical voltage profile coils (IVPC) excited with same Inverter leg is minimized. The possible phase reconfiguring concepts for both symmetrical and asymmetrical configurations of the 6-phase and 9-phase machines are presented. The generalized adaptability and analysis of the proposed 9SI configurations with phase reconfiguring techniques for a machine with any number of phases is presented. The carrier based space vector pulse width modulation is implemented for proposed 9SI based MLI configurations which enhances the M.I further by 15.4%. The 9SI based MLI fed symmetrical 9-phase IM drive is validated by using Ansys Maxwell 2D.

The Space Vector Pulse Width Modulation (SVPWM) is possibly the best among all the PWM techniques for variable frequency drive applications. Unfortunately, the modulation algorithm is mainly implemented with software based on microcontroller or digital signal processors (DSP). These are software-based technique purely and obviously not an ideal solution. Employing Field Programmable Gate Array (FPGA) to realize SVPWM strategies provides advantages that it is considered as an appropriate solution to boost system performance of an SVPWM algorithm. Moreover, although in the literatures the implementation for three-phase SVPWM based on FPGA is not lacking, however all these designs are based on the conventional SVPWM without considering hardware-resource saving and not simple. This paper present a simple realization of 5-segment discontinuous SVPWM with a difference approach based on FPGA, in which the judging of sectors and the calculation of the firing time to generate the SVPWM waveform is simple, and also the switching losses is low. The proposed discontinuous SVPWM has been designed and successfully implemented by using APEX20KE Altera FPGA considering hardware-resource saving and has successfully driven a three phase inverter system with induction machine 1.5 kW as load.

The space vector pulsewidth modulation (SVPWM) techniques enhance the performance of multilevel multiphase inverters. With multilevel (three-phase) inverters and with (two-level) multiphase inverters, it is widely accepted that the typical SVPWM strategies have an equivalent carrier-based pulsewidth modulation (CBPWM) counterpart, which produces identical results. However, the conclusions reached in the articles that show these cannot be applied, nor even extended, to SVPWM techniques with more than two levels and three phases. This article shows that the most widely accepted multilevel multiphase SVPWM techniques have a fully equivalent CBPWM counterpart, which consists of a phase disposition pulsewidth modulation with an appropriate zero-sequence injection scheme. Closed-form expressions to calculate the zero sequences are provided. The proposed modulation techniques are simulated and then implemented in a field-programmable gate array, showing that the equivalent CBPWM techniques produce identical results as the original SVPWM ones, but with a significant reduction of hardware requirements. The proposed methodology can be generalized to other multilevel multiphase SVPWM techniques.

This paper investigates the effect of (voltage source) inverter's non-linearity on the space vector pulse width modulation (PWM) method and the discontinuous PWM methods, DPWM0, DPWM1, and DPWM2. The inverter's non-linearity of dead-time and minimum pulse-width are considered. These non-linearity's impose distortion regions where their effects cannot be properly compensated. The distortion regions are identified for the various PWM methods in space vector diagram format. A method to switch between DPWM methods to avoid the distortion regions while minimizing switching losses is proposed for the middle modulation indexes. At high modulation indexes, a method to modify the DPWM1 switching function is proposed which preserves the fundamental component while taking into consideration the inverter's non-linearity. The proposed methods are experimentally verified and shown to reduce the harmonics in the motor phase currents which would normally be induced due to the inverter non-linear effects. As a result, the proposed method allows for smoother torque production

The equivalence of space vector pulse width modulation (PWM) and carrier-based PWM through the injection of a common-mode voltage is already known for two-level (first min-max injection) and multilevel (double min-max injection) three-phase converters. However, under regular sampled phase voltage references, these injections do not produce the lowest total harmonic distortion (THD) of the load phase current throughout the linear modulation index range. This paper proposes the use of a similar common-mode injection, called the second min-max injection that achieves the lowest current THD in regions of the modulation index range where the double min-max injection fails to do so. A cascaded H-bridge (CHB) topology is analyzed, and comparison is made between different multicarrier modulation strategies, using simulation results, under different injections for the whole modulation index range. The level-shifted in-phase disposition modulation method is found to produce the lowest load phase current THD with second min-max offset voltage injection for modulation indices below unity. For modulation indices greater than one, the double min-max injection is still considered as optimal.