Leverage cache replacement policy in multicore processors

Abstract

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Computer hardware is currently moving towards heavily parallelized architectures with multiprocessors, multicore and chip multithreaded designs. Cache memory, the fastest component of the memory hierarchy, adapts to this new kind of parallel systems in order to provide the promised performance increase. Current cache designs have limitations that can be transformed into optimization opportunities both in hardware and software. This paper provides a detailed research of cache performance in multicore processors, considering critical hardware aspects. A new solution is proposed to improve the current performance: an optimized replacement policy for the shared cache level. From experiments run on four and eight core setups in a multicore simulator, the proposed enhancements achieve up to 30% execution speed increase over the default setup.