Lightweight PUF-based Continuous Authentication Protocol

Modern embedded electronic devices are gradually becoming an essential part of everyday lives, proving indispensable for daily activities. The growth of the Internet of things (IoT) technology fuels this phenomenon. IoT devices are found everywhere around us – smartphones, smartwatches, home automation, autonomous cars, and medical implants for human bodies. These devices find widespread use in medical imaging, video surveillance as embedded vision, cloud computing platforms, and military applications. Ensuring the reliability and safety of these devices is of prime importance, since these devices store sensitive data. A wide range of such embedded devices is a common target for intellectual property (IP) theft and reverse-engineering attacks by hackers to access confidential information and counterfeit integrated circuits. Physically unclonable functions (PUFs) are innovative hardware defense techniques that promise a fundamental change in our approach to many security problems. PUFs possess desirable properties like low cost, simple architectures, a light weight, versatility, and the valuable advantage of unclonability. This unclonable property is a consequence of intrinsic random variations at the micro- and nanoscale levels in the manufacturing processes and cannot be controlled or removed. This characteristic also serves as a unique fingerprint for the integrated circuit chips, similar to humans. The widespread usage of PUF techniques in security applications makes it imperative for hardware designers to appreciate its working and understand its uses in practice fully. This chapter aims to address these and other topics by presenting a detailed introduction of the concepts, evaluation parameters, and various ramifications of physically unclonable functions. PUF techniques also provide an economical alternative to ciphers and hash functions for secure cryptographic protocols. It is also necessary to provide security of IoT devices, have economic viability, and fit well with embedded devices’ heterogeneous nature. PUF circuits receive challenges as a sequence of bits and generate matching responses called a challenge-response pair, which can be thought of as a secret key or unique fingerprint. It also obviates the need for storing the keys in nonvolatile memories with dedicated protection, which is a costly affair. In this chapter, different PUFs, including optical PUF, delay-based PUFs, weak and strong PUFs, etc., the maturity of this technology, and their various applications are investigated. This chapter also emphasizes critical challenges toward PUF utilization in IoT and related fields and significant future development areas like critical public infrastructure, reconfigurability, and bit-specific reliability. The unique IoT domain protection criteria and how PUFs can be used to fulfill them are also examined. The chapter’s emphasis is on proven and well-understood strategies involving their benefits and shortcomings.

Lightweight implementation of security primitives, e.g., physical unclonable functions (PUFs) and true random number generator, in field programmable gate array (FPGA) is crucial replacement of the conventional decryption key stored in battery-backed random access memory or E-Fuses for the protection of field reconfigurable assets. A slice is the smallest reconfigurable logic block in an Xilinx FPGA. The entropy exploitable from each slice of an FPGA is an important factor for the design of security primitives. Previous research has shown that the locations of slices can impact the quality of delay-based PUF designs implemented on FPGAs. To investigate the effect of the placement of each single-bit PUF cell free from the routing resource constraint between slices, single-bit ring oscillator (RO) and identity-based PUF design (Pi-coPUF) cells that can each be fully fitted into a single slice are evaluated. To accurately evaluate their statistical performance, data from a large number of devices are required. To this end, 217 Xilinx Artix-7 FPGAs has been employed to provide a large-scale comprehensive analysis for the two designs. This is the first time single-slice disorder-based security entities have been investigated and compared on 28-nm Xilinx FPGA. Uniqueness, uniformity, correlation, reliability, bit-aliasing and min-entropy of each type of cell are evaluated for four different types of cell placement. Our experimental results corroborate that the location of both cell types in the FPGA affects their performances. For both cell types, the lower the correlation between devices, the higher the min-entropy and uniqueness. Overall, the min-entropy, correlation and uniqueness of PicoPUF are slightly higher than those of RO. Otherwise, the uniformity, bit-aliasing and reliability of the PicoPUF are slightly lower than those of the RO. Comparing the resource usage and metrics of the PicoPUF, ring oscillator PUF and some existing memory-based PUF implementations, PicoPUF stands out as a lightweight FPGA-based weak PUF design. The raw data for the PicoPUF design are made publicly available to enable the research community to use them for benchmarking and/or validation.

Communication security is essential for the proper functioning of the Internet of Things. Traditional approaches that rely on cryptographic keys are vulnerable to side-channel attacks. Physical Unclonable Functions (PUFs), leveraging unavoidable and irreproducible variations of integrated circuits to produce responses unique for individual PUF devices, are emerging as promising candidates as security primitives to provide keyless solutions. Before a PUF can be adopted for real applications, the PUF must be thoroughly examined to understand its various properties for its application feasibility. In this paper, we study XOR PUFs for broad ranges of values for circuit architecture parameters. XOR PUFs have been extensively studied, and have been shown to be unable to withstand machine learning attacks for 64-bit XOR PUFs with less than ten component PUFs. Attack methods employed in existing studies need a large number of challenge-response pairs (CRPs), which are obtainable only if the PUF has an open access interface. When PUF-embedded devices equipped with mutual authentication or response obfuscating techniques, it is difficult for attackers to accumulate large numbers of CRPs. With only a small number of accumulated CRPs available to attackers, small size PUFs, like XOR PUFs with a small number of component PUFs and stages, may become resistant to machine learning attacks. Since smaller sizes mean less resource-demanding, it is worthwhile to examine such PUFs which have usually been considered unsafe against attacks. Such are thoughts that have been motivating us in this paper to explore the PUF performances for a wide range of values of the PUF architecture parameters.

A Physical Unclonable Function (PUF) is a physical system that leverages manufacturing process variations to generate unclonable and inherent instance-specific measurements of physical objects. PUF is equivalent to human biometrics in many ways where each human has a unique fingerprint. PUF can securely generate unique and unclonable signatures that allow PUF to bootstrap the implementation of various physical security issues. In this thesis, we discuss PUFs, extend it to a novel SW-PUF, and explore some techniques to utilize it in security applications. We first present the "SW-PUF" - basic building block of this thesis, a novel PUF design that measures processor chip ALU silicon biometrics in a manner similar to all PUFs. Additionally, it composes the silicon measurement with the data-dependent delay of a particular program instruction in a way that is difficult to decompose through a mathematical model. We then implement the proposed PUF to solve various security issues for applications such as Software Protection and Trusted Computing. We prove that the SW-PUF can provide a more robust root of trust for measurement than the existing trusted platform module (TPM). Second, we present the "Reversible SW-PUF", a novel PUF design based on the SW-PUF that is capable of computing partial inputs given its outputs. Given the random output signature of specific instruction in a specific basic block of the program, only the computing platform that originally computed the instruction can accurately regenerate the inputs of the instruction correctly within a certain number of bits. We then implement the Reversible SW-PUF to provide a verifiable computation method. Our scheme links the outsourced software with the cloud-node hardware to provide proof of the computational integrity and the resultant correctness of the results with high probability. Finally, we employ the SW-PUF and the Reversible SW-PUF to provide a trust attribute for data on the Internet of Thing (IoT) systems by combining data provenance and privacy-preserving methods. In our scheme, an IoT server can ensure that the received data comes from the IoT device that owns it. In addition, the server can verify the integrity of the data by validating the provenance metadata for data creation and modification.

Physically unclonable functions (PUFs) have been explored as lightweight hardware primitives for the purpose of realizing robust security via strong authentication or secure key/ID generation. PUF harness manufacturing process variations for the purpose of generating binary keys or binary functions. An ideal strong PUF is a binary function that maps an m-bit input challenge to an uniquen-bit output response, making it attractive for authentication applications. Unfortunately, real strong PUF implementations suffer from reliability issues where the same challenge may produce different responses in the presence of noise. To overcome this problem, strong PUF leverages the availability of exponential number of challenge-response pairs (CRPs). A successful authentication event requires acquiring multiple CRPs and applying a threshold. In contrast, weak PUFs produce limited keys and are required to be highly reliable. Multiple techniques have been developed to achieve the necessary reliability. An additional prerequisite for strong PUFs is resilience against model-building attacks (cloning) by an adversary, who has observed a few CRPs, to prevent successful prediction of future CRPs. In this work, we first illustrate a strong PUF design that re-purposes a weightless neural network (WNN). Second, we showcase the robustness of WNN-based strong PUFs with respect to machine learning attacks, while providing desirable uniqueness and reliability metrics. Finally, we employ an initial entropy source of highly reliable weak PUF bits mapped to weightless neural networks (WNNs) for the purpose of creating a near-ideal strong PUF in terms of reliability. Our results show that it is possible to create highly reliable WNN–based strong PUFs with < 65 % ML accuracy by using as few as 32 initial reliable weak PUF bits.

Physical Unclonable Functions (PUFs) are promising security primitives for resource-constrained network nodes. The XOR Arbiter PUF (XOR PUF or XPUF) is an intensively studied PUF invented to improve the security of the Arbiter PUF, probably the most lightweight delay-based PUF. Recently, highly powerful machine learning attack methods were discovered and were able to easily break large-sized XPUFs, which were highly secure against earlier machine learning attack methods. Component-differentially-challenged XPUFs (CDC-XPUFs) are XPUFs with different component PUFs receiving different challenges. Studies showed they were much more secure against machine learning attacks than the conventional XPUFs, whose component PUFs receive the same challenge. But these studies were all based on earlier machine learning attack methods, and hence it is not clear if CDC-XPUFs can remain secure under the recently discovered powerful attack methods. In this paper, the two current most powerful two machine learning methods for attacking XPUFs are adapted by fine-tuning the parameters of the two methods for CDCXPUFs. Attack experiments using both simulated PUF data and silicon data generated from PUFs implemented on field-programmable gate array (FPGA) were carried out, and the experimental results showed that some previously secure CDC-XPUFs of certain circuit parameter values are no longer secure under the adapted new attack methods, while many more CDC-XPUFs of other circuit parameter values remain secure. Thus, our experimental attack study has re-defined the boundary between the secure region and the insecure region of the PUF circuit parameter space, providing PUF manufacturers and IoT security application developers with valuable information in choosing PUFs with secure parameter values.

Physical Unclonable Functions (PUF) are an emerging hardware security primitives proposed by various researchers in last one decade. PUFs are useful security architectures used for identification, authentication and cryptographic key generation. Many PUF topologies are proposed in the past targeting both ASIC and FPGA. It is nearly impossible to get two PUF circuits with same characteristics for the same design. PUFs make use of random process variation occurring during manufacturing of IC which is uncontrollable. The most versatile PUF is ring oscillator (RO) PUF, in which the frequencies of ring oscillators are compared to produce the PUF response. The conventional approach consumes large number of ring oscillators and requires all RO's to be mutually symmetric. In this paper, we have proposed a RO-PUF for FPGA devices, which is capable of generating multiple output bits from each ring oscillator with better security metrics in comparison with PUF designed with similar technique. The PUF is implemented on Xilinx Spartan 3E FPGA boards and the challenge-response pairs (CRP) are verified for statistical properties.

The Internet of things (IoT) ecosystem has grown exponentially with the convergence of various technologies such as deep learning, sensor systems, and advances in computing platforms. With such a highly pervasive nature of “smart” devices, the nature of data being collected and processed can be increasingly private and require safeguards to ensure the data’s integrity and security. Physically unclonable functions (PUFs) have emerged as a lightweight, viable security protocol in the Internet of Things (IoT) framework. Malicious modeling of PUF architectures has proven to be difficult due to the inherently stochastic nature of PUF architectures. In this work, we show that knowledge of the underlying PUF structure is unnecessary to clone a PUF. We tackle the problem of cloning PUF-based edge nodes in different settings such as unencrypted, encrypted, and obfuscated challenges in an IoT framework. We present a novel non-invasive, architecture-independent, machine learning attack for robust PUF designs and can handle encryption and obfuscation-based security measures on the transmitted challenge response pairs (CRPs). We show that the proposed framework can successfully clone different PUF architectures, including those encrypted using two (2) different encryption protocols in DES and AES and with varying degrees of obfuscation. We also show that the proposed approach outperforms a two-stage brute force attack model. Finally, we offer a machine learning-based countermeasure, a discriminator, which can distinguish cloned PUF devices and authentic PUFs with an average accuracy of 96%. The proposed discriminator can be used for rapidly authenticating millions of IoT nodes remotely from the cloud server.

A Physical Unclonable Function (PUF) is often used to uniquely identify an integrated circuit by extracting its internal random differences using so-called Challenge Response Pairs (CRPs). As CRPs include unique information about the underlying hardware variations, PUF design is a promising approach to provide authentication and IP-protection capabilities. In this paper, an XOR-gate-based configurable Ring Oscillator (RO) PUF (denoted as XCRO PUF) is presented. This XCRO PUF can generate more CRPs compared with state-of-the-art PUF designs by using the same number of configurable logic blocks (CLBs) in an FPGA implementation. This design is implemented in the Xilinx Spartan-6 XC6SLX9 FPGAs with fixed locations for the XCROs (placed within a ring to improve its uniqueness). The XCRO PUF shows better uniqueness and reliability than other PUF designs. Moreover, a XCRO PUF consumes only 12.5% of the hardware resources to generate a 1-bit response compared with other CRO PUFs implemented in FPGA.

A Physical Unclonable Function (PUF) is a promising security primitive for low cost security solutions. It is especially attractive for resource constrained platforms such as internet-of-things (IoT) devices. A novel Tristate Static Random Access Memory (TSRAM) PUF design consisting of two cross-coupled tristate inverter arrays is proposed in this paper. This new PUF structure is able to reconfigure the cross-coupled inverters so that it can produce effective challenge-response pairs (CRPs) without using any additional auxiliary processing, which is not available in previous memory based PUFs. The functionality and performance of the proposed TSRAM PUF is validated by both simulation with UMC 65nm technology and practical experimentation on a Xilinx Virtex-II FPGA. The proposed TSRAM PUF demonstrates good uniqueness and reliability and it uses the smallest number of gates to produce one response bit compared with previous works.

The demand for Internet of Things services is increasing exponentially, and consequently a large number of devices are being deployed. To efficiently authenticate these objects, the use of physical unclonable functions (PUFs) has been introduced as a promising solution for the resource-constrained nature of these devices. The use of machine learning PUF models has been recently proposed to authenticate the IoT objects while reducing the storage space requirement for each device. Nonetheless, the use of a mathematically clonable PUFs requires careful design of the enrollment process. Furthermore, the secrecy of the machine learning models used for PUFs and the scenario of leakage of sensitive information to an adversary due to an insider threat within the organization have not been discussed. In this paper, we review the state-of-the-art model-based PUF enrollment protocols. We identity two architectures of enrollment protocols based on the participating entities and the building blocks that are relevant to the security of the authentication procedure. In addition, we discuss their respective weaknesses with respect to insider and outsider threats. Our work serves as a comprehensive overview of the ML PUF-based methods and provides design guidelines for future enrollment protocol designers.

Several publications presented tamper-evident Physical Unclonable Functions (PUFs) for secure storage of cryptographic keys and tamper-detection. Unfortunately, previously published PUF-based key derivation schemes do not sufficiently take into account the specifics of the underlying application, i.e., an attacker that tampers with the physical parameters of the PUF outside of an idealized noise error model. This is a notable extension of existing schemes for PUF key derivation, as they are typically concerned about helper data leakage, i.e., by how much the PUF’s entropy is diminished when gaining access to its helper data. To address the specifics of tamper-evident PUFs, we formalize the aspect of tamper-sensitivity, thereby providing a new tool to rate by how much an attacker is allowed to tamper with the PUF. This complements existing criteria such as effective number of secret bits for entropy and failure rate for reliability. As a result, it provides a fair comparison among different schemes and independent of the PUF implementation, as its unit is based on the noise standard deviation of the underlying PUF measurement. To overcome the limitations of previous schemes, we then propose an Error-Correcting Code (ECC) based on the Lee metric, i.e., a distance metric well-suited to describe the distance between q-ary symbols as output from an equidistant quantization, i.e., a higher-order alphabet PUF. This novel approach is required, as the underlying symbols’ bits are not i.i.d. which hinders applying previous state-of-the-art approaches. We present the concept for our scheme and demonstrate its feasibility based on an empirical PUF distribution. The benefits of our approach are an increase by over 21% in effective secret bit compared to previous approaches based on equidistant quantization. At the same time, we improve tamper-sensitivity compared to an equiprobable quantization while ensuring similar reliability and entropy. Hence, this work opens up a new direction of how to interpret the PUF output and details a practically relevant scheme outperforming all previous constructions.

The lack of stability is one of the limitations that constrain physical unclonable function (PUF) from being put in widespread practical use. In this paper, we propose a weak PUF and a strong PUF that are both completely stable. These PUFs are called locally enhanced defectivity physical unclonable function (LEDPUF). An LEDPUF is a pure functional PUF that does not require any kinds of correction schemes as conventional parametric PUFs do. The source of randomness of an LEDPUF is extracted from locally enhance defectivity without affecting other parts of the chip. In this paper, we construct a weak LEDPUF by forming arrays of directed self-assembly random connections, and the strong LEDPUF is implemented by using the weak LEDPUF as the key of a keyed-hash message authentication code. Our simulation and statistical results show that the entropy of the weak LEDPUF bits is close to ideal, and the inter-chip Hamming distances of both weak and strong LEDPUFs are about 50%, which means that these LEDPUFs are not only stable but also unique. We develop a new unified framework for evaluating the security of PUFs, based on password security, by using information theoretic tools of guesswork. The guesswork model allows us to quantitatively compare, with a single unified metric, PUFs with varying levels of stability, bias, and available side information. In addition, it generalizes other measures to evaluate the security level, such as min-entropy and mutual information. We evaluate the guesswork-based security of some measured static random access memory and ring oscillator PUFs as an example and compare them with an LEDPUF to show that the stability has a more severe impact on the PUF security than biased responses. Furthermore, we find the guesswork of two new problems: guesswork under the probability of attack failure and the guesswork of strong PUFs that are used for authentication.

Recent fourth industrial revolution, industry4.0 results in lot of automation of industrial processes and brings intelligence in many home appliances in the form of IoT, enhances M2M / D2D communication where electronic devices play a prominent role. It is very much necessary to ensure security of those devices. To provide reliable authentication and identification of each device and to abort the counterfeiting from the unauthorized foundries Physical Unclonable Functions (PUFs) emerged as a one of the promising cryptographic hardware security solution. PUF is function, mathematically modeled by using uncontrollable/ unavoidable random variances of the fabrication process of the ICs. These variances can generate unpredictable, random responses can be used to overcome the difficulties such as storing the keys in non-volatile memories (NVMs) in the classical cryptography. A wide variety of PUF architectures such as Arbiter PUFs, Ring oscillator PUFs, SRAM PUFs proposed by authors. But due to its design complexity and low cost, Delay based Arbiter PUFs (D-PUFs) are considering to be a one of the security primitives in authentication applications such as low-cost IoT devices for secure key generation. This paper presents a review on the different types of Delay based PUF architectures proposed by the various authors, sources to exhibit the physical disorders in ICs, methods to estimate the Performance metrics and applications of PUF in different domains.

The introduction of Physical Unclonable Functions (PUFs) has been originally motivated by their ability to resist physical attacks, particularly in anti-counterfeiting scenarios. In these one-way functions, machine learning, cryptanalysis, and side-channel attacks are common attack vectors threatening the promised PUF's property of unclonability. These attacks often emulate a PUF by employing a large number of Challenge-Response Pairs (CRPs). Some solutions to defeat such attacks are based on a protocol, where a model of the underlying PUF primitives should be extracted during the enrollment phase. In this article, we introduce a novel physical cloning approach applicable to FPGA-based implementations, which allows extracting the PUF's unique physical characteristics with a few number of Challenge-Response Pairs (CRPs), that increases only linearly for a higher number of PUF components. Indeed, our proposed approach significantly accelerates the enrollment phase and makes complex enrollment protocols feasible. Our core idea relies on an on-chip delay sensor, which can be realized by ordinary FPGA components, measuring the unique characteristic of the PUF elements. We demonstrate the feasibility of our introduced technique by practical experiments on different FPGA platforms, cloning a couple of (complex) PUF constructions, i.e., XOR APUF, iPUF, composed of delay-based Arbiter PUFs.