Low cost RF MEMS switches using photodefinable mixed oxide dielectrics

This paper presents the design, fabrication and testing of capacitive copper RF MEMS switches with various hinge geometries, fabricated on high-resistivity silicon substrates. The switches were fabricated using a simple low-cost four-mask process and 0.6-1.0 /spl mu/m thick membranes were made out of sputtered copper. The capacitive airgap in between the membrane and the signal line is 1.5-2.0 /spl mu/m. The lowest actuation voltage measured on the fabricated switches is 9 V. The measured insertion loss of a fabricated switch and its associated transmission time was 0.9 dB (mainly contributed by the transmission line itself) and the isolation was measured to be 25 dB at 40 GHz.

In recent years, a high resistivity silicon (HR-Si) substrate is of interest as a substrate upon which integrated radio-frequency (RF) and millimeter wave circuits can be realized. Because the material have an inherent defect density, surface effect and resistivity degradation near the interface between an insulating oxide and a HR-Si substrate tend to overshadow the potentially low RF loss levels in HR-Si substrate. Fixed positive charges within the oxide attract free carriers near the substrate surface, leading to an accumulation or inversion layer on the silicon surface. Consequently, these free carriers act as the thin surface-channel at the Si/oxide interface, thus reducing the resistivity of the silicon surface and increasing the substrate loss. In fact, several surface passivation approaches have been used to overcome these shortcomings. For example, local resistivity can be enhanced by high-dose implantation (e.g, argon) to convert LR-Si substrate to HR-Si substrate [1], or a trap-rich passivation layer (e.g., polysilicon or amorphous silicon) between the oxide layer and the HR-Si substrate to prevent the carrier accumulation [2]. Polysilicon films deposited by LPCVD are the most widely used as a surface passivation layer on on HR-Si substrate and a thickness between 300nm and 400 nm were generally used. For HR-Si surface passivation application, the properties of LPCVD-deposited polysilicon (or amorphous silicon) are known to be significantly dependent on deposition conditions and annealing conditions [3].

Silicon has many advantages as a microwave substrate material including low cost and a mature technology. The aim of this paper is to evaluate the potential of using high-resistivity silicon as a low-cost low-loss microwave substrate through an experimental comparative study. Coplanar waveguides fabricated on Si, GaAs, and quartz substrates are tested and their characteristics are compared. Microwave spiral inductors and meander lines are also fabricated on various substrates, and their performance is also analyzed. The results demonstrate that the losses of a coplanar transmission line (CPW) realized on high-resistivity (3 k to 7 k /spl Omega/-cm) silicon substrates are comparable to the losses of a CPW realized on a GaAs substrate covered with insulators. Furthermore, measured unloaded Q's of microwave inductive structures on high-resistivity silicon substrates are comparable to the measured unloaded Q's of the same structures on GaAs and on quartz. This paper demonstrates that high-resistivity Si can be used as a microwave substrate.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Radio-Frequency (RF) losses on High-Resistivity Silicon (HRS) substrates were studied for several different surface passivation layers comprising thin-films of SiC, SiN and SiO 2 In many combinations, losses from conductive surface channels were reduced and increasing the number of interfaces between thin-films was found to be beneficial. In some cases the surface losses were completely eliminated. For example, with plasma-enhanced chemical-vapor deposition (PECVD) α-SiC layers up to a few tens of nm thick and exposed to nitridation or SiN growth at 850°C to form a SiC:N interface layer, values for the total losses of 1.6 dB/cm were achieved. Analysis of these layers was performed by using temperature dependent measurements of the RF losses on Coplanar Waveguides (CPWs), the capacitance-voltage characteristics and the sheet resistance along the Si surface. The overall results can be explained by assuming that the thin-films are so defected that they allow vertical current paths to highly-resistive interface layers where both fixed and mobile charge can be stored.

AlGaN/GaN high-electron-mobility-transistors (HEMTs) with 0.8-/spl mu/m- and 0.3 /spl mu/m-gate-length were successfully fabricated on high-resistivity (HR) silicon substrate. The cutoff frequency f/sub T/ values of 7 GHz, 22 GHz and maximum oscillation frequency f/sub max/ values of 23 GHz, 40 GHz were achieved for 0.8-/spl mu/m- and 0.3-/spl mu/m-gate-length device, respectively. A minimum noise figure (NF/sub min/) of 2.0 dB and an associate gain (G/sub ass/) of 10.3 dB were achieved at 10 GHz in 0.3-/spl mu/m-gate-length device. This shows the promising potential of AlGaN/GaN HEMTs on high-resistivity Si for cost effective low noise amplifiers.

In this paper, spiral inductors on high-resistivity silicon (HR-Si) substrates, which surfaces were passivated by different process methods, were fabricated and measured. The comparison of inductances and quality factors between these inductors shows that the inductances and quality factors of spiral inductors significantly depend on process method and thickness of surface passivation layer. The differently generated passivation layer results in different effective substrate resistivity and hence gives rise to different substrate loss. The experimental results show that using thicker nanocrystalline silicon (nc-Si) as a passivation layer will result in a smaller substrate loss and hence spiral inductors on the substrate have larger inductances and larger quality factors. In this study, the metal thickness of inductors is 1.2 µm and is about half that of the inductors provided by foundries. At higher frequencies, the thinner spiral inductors on the SiO2/nc-Si/HR-Si substrate have larger inductances and larger quality factors as compared with the inductors provided by foundries. With the same metal thickness as that adopted in standard processes of foundries, the identical-geometry inductors on the SiO2/nc-Si/HR-Si substrate probably exhibit superior quality factors.

RF MEMS capacitive switch on semi-suspended CPW using low-loss high-resistivity silicon substrate

We investigate the long-term performance of passive millimeterwave microstrip circuits on high resistivity silicon substrates. Three types of test structures were exposed to harsh environmental conditions such as thermal stress, humidity and organic vapors for 400 hours. Measured results at 38 GHz showed excellent long-term stability of the circuits. No significant difference between chips with and without SiO/sub 2/ passivation layer has been found though chips with passivation showed larger photosensitivity and higher loss.

Interface control in the laser MBE growth of hafnium oxide

This paper explores the usefulness of RF MEMS and reconfigurable antennas in the context of modern communication systems and other applications. Simulation studies on a fractal antennas with switches and phase shifters provide beam steering and beam scanning characteristics. A brief description of the design aspects of two MEMS based coplanar waveguide (CPW) phase shifters for microwave and millimeter wave antenna applications are also provided here. One phase shifter design consists of a unique bilateral interdigital structure on a silicon substrate deposited with a thin film of electrically tunable barium strontium titanate. The dielectric constant of the thin film, and hence the effective permittivity of the transmission line changes by the application of a bias voltage. The second device is a distributed microelectromechanical system (MEMS) phase shifter fabricated on a high resistivity silicon substrate using microstereolithography technique is presented here. The distributed MEMS phase shifter consists of a high-impedance CPW transmission line and several MEMS bridges of uniform height. By applying a voltage the height of these bridges can be adjusted. This results in a variation in the distributed capacitance of the segment of the transmission line, which manifests in the phase shift at the output terminal. The fabrication procedure described here shows significant promise for the use of microstereolithography techniques for RF MEMS devices.

RF MEMS switches provide a low-cost, high performance solution for many RF/microwave applications these switches will be important building blocks for designing phase shifters, switched filters reflector array antennas for military and commercial markets. In this paper, progress in characterizing of THALES capacitive MEMS devices under high RF power is presented. The design, fabrication and testing of capacitive RF MEMS switches for microwave/mm- wave applications on high-resistivity silicon substrate is presented. The switches tested demonstrated power handling capabilities of 1W (30 dBm) for continuous RF power. The reliability of these switches was tested at various power levels indicating that under continuous RF power. In addition a description of the power failures and their associated operating conditions is presented. The PC-based test stations to cycle switches and measure lifetime under DC and RF loads have been developed. Best-case lifetimes of 10¹⁰ cycles have been achieved in several switches from different lots under 30 dbm RF power.

In this paper, the circular polarization coherence, /spl rho//sub RRLL/, is investigated as a potential estimator of terrain surface roughness and small-scale slopes. The studies utilize microwave backscatter collected from 1) dielectric surfaces in an anechoic chamber and 2) a desert test site using P-, L-, and C-band NASA/JPL AIRSAR data. These experimental studies and supporting theory, indicate a sensitive decrease of |/spl rho//sub RRLL/| with increasing surface roughness ks over a range 0 /spl les/ ks /spl les/ 1. For the present studies this decrease is caused largely by the depolarizing effects of small-scale surface slopes in the azimuth direction rather than by volume, or multiple scatter. For cases when the scatter is reflection symmetric, the value of |/spl rho//sub RRLL/| depends on the surface roughness and on the local incidence angle. The dependence of |/spl rho//sub PRRLL/| on the local incidence angle is supported by theory and experimental results. For these same scattering cases, however, |/spl rho//sub PRRLL/| is independent of the surface dielectric constant. Estimation of the functional dependency of |/spl rho//sub PRRLL/| versus ks, for a mid-range incidence angle, has been carried out using roughness estimates derived from an empirical model.

Sputter-deposited low loss Mg2SiO4 thin films for multilayer hybrids

&amp;lt;p&amp;gt;One of the unique candidates to explore the evolution of physical surface processes on the Moon is Tycho, a dark haloed impact crater representing well-preserved bright ray pattern and intact crater morphology. Sampling of the central peak in such complex crater formation proves significant in terms of unraveling intriguing science of the lunar interior. With the current state-of-the-art radar technology, it is possible to evaluate the response of the geologic features constrained in the near surface and subsurface regolith environments. This can be achieved by modelling the dielectric constant of media, which is a physical parameter crucial for furthering our knowledge about the distribution of materials within different stratigraphic layers at multiple depths. Here, we used the applicability of Mini-RF S-band data augmented with a deep learning based inversion model to retrieve the dielectric variations over the central peak of the Tycho crater. A striking observation is made in certain regions of the central peak, wherein we observe anomalously high dielectric constant, not at all differentiated in the hyperspectral image and first Stokes parameter image, which usually is a representation of retrieved backscatter of the target. The results are also supported by comparing the variations in the scattering mechanisms. We found those particular regions to be associated with high degree of depolarization, thereby attributing to the presence of cm- to m- scale scatterers buried within a low dielectric layer that are not big enough to produce even-bounce geometry for the radar wave. Moreover, we also observe high rock concentration in the central peak slopes from DIVINER data and NAC images, indicating the exposure of clasts ranging in size from 10 meter to 100s of meter. Furthermore, from surface temperature data, these distinctive outcrops sense warmer temperature at night than the surrounding, which suggests the existence of thermal skin depth in such vicinities. Interestingly, we are able to quantify the pessimistic dielectric constant limit of the large boulder in the middle of the central peak, observable at the Mini-RF radar wavelength, as 4.54 + j0.077. Compared to the expected dielectric constant of rocks, this value is lowered significantly. One probable reason could be the emergence of small radar shadows due to the rugged surface of the boulder on the radar illuminated portion. From our analysis, we showcase the anomalous dielectric variability of Tycho central peak, thereby providing new insights into the evolution of the impact cratering process that could be important for both science and necessary for framing human or robotic exploration strategies.&amp;amp;#160;&amp;amp;#160;&amp;lt;/p&amp;gt;

Terahertz wire-grid polarizer with 500 nm grating period on high resistivity silicon (100) is fabricated using nanoimprinting lithography (NIL). Preliminary results show a good polarization characteristic ranging from 0.5 to 5 THz. The method is high throughput and low cost.