Low-Noise, High PSRR Programmable Low Drop-Out Regulator

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This paper presents the design of a programmable, low-noise, high power supply rejection ratio (PSRR) low drop-out (LDO) regulator. High PSRR is obtained using a method called feed forward ripple cancellation technique. Better noise performance is done by implementing unity feedback configuration to the error amplifier replacing the LDO feedback resistor network. Noise filtering is also done at the input of the error amplifier to lessen the noise contribution of the reference voltage to the total noise of the LDO. Programmability feature of the LDO output is achieved by making the reference voltage to the error amplifier programmable. The proposed LDO implementation will improve the noise performance of the LDO by making the noise less dependent to the output voltage of the LDO. The proposed LDO is designed using the full custom analog design flow and implemented in 180 nm CMOS process.