METHODS FOR DECOMPOSITION OF CONJUNCTIVE FORMULAS IN FINITE PREDICATE ALGEBRA

In this study the main endeavor is to model dependence structure between crude oil prices of West Texas Intermediate (WTI) and Brent - Europe. The main activity is on concentrating copula technique which is powerful technique in modeling dependence structures. Beside several well known Archimedean copulas, three new Archimedean families are used which have recently presented to the literature. Moreover, convex combination of these copulas also are investigated on modeling of the mentioned dependence structure. Modeling process is relied on 318 data which are average of the monthly prices from Jun-1992 to Oct-2018.

This paper presents the hardware implementation of a new method for message authentication based on elliptic curves. The proposed method makes use of the elliptic curve point multiplication unit already available in the system as a part of key exchange. The point multiplication unit is time shared for generating the authentication code resulting in reduced hardware complexity. Hence it is suitable for applications with limited resources like wireless sensor networks and smart grid. The security of the proposed MAC is vested in Elliptic Curve Discrete Logarithm Problem(ECDLP).KeywordsHash FunctionElliptic CurveElliptic CurfHardware ImplementationMessage Authentication CodeThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

A novel design and implementation technique for low complexity variable digital filters using multi-objective artificial bee colony optimization and a minimal spanning tree approach

This paper presents a new inference algorithm for active learning method (ALM). ALM is a pattern-based algorithm for soft computing, which uses the ink drop spread (IDS) algorithm as its main engine for feature extraction. In this paper, a fuzzy number is extracted from each IDS plane rather than from the narrow path and the spread, as in previous approaches. This leads to a significant reduction in the hardware required to implement the inference part of the algorithm and real-time computation of the implemented hardware. A modified version of the memristor crossbar structure is used to solve the problem of varying shapes of the ink drops, as reported in previous studies. In order to compare performance of the algorithm and the proposed hardware with the one proposed in our previous work, two functions that are widely used in literature are modeled as the benchmark. Simulation results show that the proposed algorithm is as effective as the previous one in modeling with reduced hardware complexity.

The paper presents the concept and initial tests from the hardware implementation of a low-power, high-speed reconfigurable sensor fusion processor. The Extended Logic Intelligent Processing System (ELIPS) processor is developed to seamlessly combine rule-based systems, fuzzy logic, and neural networks to achieve parallel fusion of sensor in compact low power VLSI. The first demonstration of the ELIPS concept targets interceptor functionality; other applications, mainly in robotics and autonomous systems are considered for the future. The main assumption behind ELIPS is that fuzzy, rule-based and neural forms of computation can serve as the main primitives of an intelligent processor. Thus, in the same way classic processors are designed to optimize the hardware implementation of a set of fundamental operations, ELIPS is developed as an efficient implementation of computational intelligence primitives, and relies on a set of fuzzy set, fuzzy inference and neural modules, built in programmable analog hardware. The hardware programmability allows the processor to reconfigure into different machines, taking the most efficient hardware implementation during each phase of information processing. Following software demonstrations on several interceptor data, three important ELIPS building blocks (a fuzzy set preprocessor, a rule-based fuzzy system and a neural network) have been fabricated in analog VLSI hardware and demonstrated microsecond-processing times.

Automation and robots are frequently mentioned as solutions to industrywide problems of increasing costs, declining productivity, skilled‐labor short‐ages, safety, and quality control. Despite numerous attempts to develop automation and robotics for construction field operations, few practical applications can be found on construction sites today. The promises of robotics remain unfulfilled, and attempts to transfer automation technology from manufacturing have not been optimal. Identification of opportunities for automation requires analysis of construction work at the appropriate level. This paper presents a hierarchical taxonomy that divides construction field operations into several levels. The basic‐task level is the appropriate level for construction automation. The paper presents a set of basic tasks that describe construction field work. Construction is compared to highly repetitive manufacturing operations to gain insight into the relationships among product design, process design, and fabrication. In manufacturing, product and process design are closely interrelated. In construction, process design is completely separate from product design, but is intimately related to fabrication. Until construction product and process design become more highly integrated, automation must occur at the basic‐task level. Advances in construction automation will continue to be characterized by a machine performing physically intensive basic tasks, operated by a human craftsperson performing the information‐intensive basic tasks.

Research of Companding Transform Combines with Improving PTS

This paper presents the application of Pulse Stream Techniques (PSTs) to the hardware implementation of a Cellular Neural Network (CNN). The time differential equations of this network suggest that the dynamic of one neuron status can be emulated by adding discretized packets of charge to a capacitor. This task can be carried out by driving a current source with a pulse stream signal. The stochastic representation of internal signals reduces hardware complexity.

Gaussian mixture models (GMM)-based classifiers have shown increased attention in many pattern recognition applications. Improved performances have been demonstrated in many applications, but using such classifiers can require large storage and complex processing units due to exponential calculations and a large number of coefficients involved. This poses a serious problem for portable real-time pattern recognition applications. In this paper, first the performance of GMM and its hardware complexity are analyzed and compared with a number of benchmark algorithms. Next, an efficient digital hardware implementation is proposed. A number of design strategies are proposed in order to achieve the best possible tradeoffs between circuit complexity and real-time processing. First, a serial-parallel vector-matrix multiplier combined with an efficient pipelining technique is used. A novel exponential calculation circuit based on a linear piecewise approximation is proposed to reduce hardware complexity. The precision requirement of the GMM parameters in our classifier are also studied for various classification problems. The proposed hardware implementation features programmability and flexibility offering the possibility to use the proposed architecture for different applications with different topologies and precision requirements. To validate the proposed approach, a prototype was implemented in 0.25-mum CMOS technology and its operation was successfully tested for gas identification application

Power efficient ultra-wideband based wireless communication for wireless body area network applications

The random logic portion of a chip Implementing a set of Boolean functions and sequential circuits usually represents a major contribution to chip area. Obviously, there are many circuits which realize the same Boolean function. Unfortunately, at present there is no general theory that provides designers (and design automation programs) with lower bounds for total area, for gate oxide area, and for delay time of logic Implementations in Integrated systems. Therefore, the main task for the computer optimization program appears In choice of the circuit with the most convenient layout.DIADES is a design automation system with register-transfer level description on its Input and CIF file on output [5]. The digital circuit can be described in both behavioral and structural mode. A set of successive compilations and hardware implementing and optimizing transformations create the description of the network on the level of logic gates and pass transistors. As the output of hardware compilation from the higher level, this description is usually nonoptimal and thus is next optimized by recursive technology independent transformations based on Boolean algebra (like A*O = O, A*A = A, etc.). Inverters are also inserted into long chains of AND or OR gates, being the results of iterative circuits' compilation [4].The next stages are: technology dependant optimization of the logic network, and network's layout. It is assumed that the resultant network is multilevel, consists of complex negative gates, and is realized in semiregular Weinberger-style gate matrix layout. The logic minimization method intended for layout minimization is described in this paper.It is assumed in our silicon compiler, that logic is constructed of n-channel, polysilicon gate MOSFET ratioless complex gates, performing any negative function. By negative function we understand negation of positive function, while positive function is any combination of AND and OR functors [1]. Functions for evaluation of circuit's performance parameters such as total area, area of gate oxide, and gate delay time are used. These functions are defined in terms of basic technology and selected topology parameters. The method can be adapted to other technologies.

This article, written by Senior Technology Editor Dennis Denney, contains highlights of paper SPE 127761, ’Probabilistic Modeling for Decision Support in Integrated Operations,’ by Martin Giese, University of Oslo, and Reidar B. Bratvold, SPE, University of Stavanger, prepared for the 2010 SPE Intelligent Energy Conference and Exhibition, Utrecht, Netherlands, 23-25 March. The paper has not been peer reviewed. A system was designed to assist operational decisions on the basis of real-time sensor readings in a typical scenario: While drilling close to the transition to a high-pressure formation, gas influx is observed. The technology used Bayesian networks and influence diagrams (IDs) to apply the method of decision analysis. The resulting ID was tested with a simulation. Introduction An assumption of integrated operations is that all information provided by the technology will help to make better decisions faster. But for this to happen, information must be presented in an accessible, useful, and decision-relevant format. Decision-analysis tools provide decision makers with logical and consistent recommendations based on the available data. This decision-analysis method was applied to a real case, representative of a typical scenario in drilling operations. The tool enabled good decisions consistently. However, effort is required and challenges exist in the modeling process along with problems regarding the way decision making is treated in the industry. Modeling and Solving A decision tree provides a graphical illustration of all the uncertainties, decisions, and payoffs associated with a decision situation. Although application of decision trees is intuitive for simple problems, the method loses its appeal for complex decisions. A symmetric decision tree grows exponentially with the number of variables in the decision domain, which often makes its use impractical. For complex decisions, the ID can provide a level of insight and transparency that cannot be achieved with the equivalent decision tree. The ID is a compact graphical-model representation for reasoning under uncertainty and was developed to assist structuring and analysis of complex decisions. The ID has two advantages—structuring and probabilistic evaluation. The structuring provides a graphical representation of the inter-relationships among the decision-basis elements (i.e., alternatives, information, and preferences), while the evaluation appraises the resulting decision structure and provides an assessment of its expected utility given the quantified decision basis. The representational framework of an ID captures the probabilistic relationships among decisions (alternatives), key uncertainties (information), and utilities (values or preferences). The ID model comprises four types of nodes. Decision nodes specify a set of alternatives. Chance nodes represent the key uncertainties in the decision domain. Deterministic nodes represent either constants or intermediate calculations. Value nodes represent the criteria used to make the decisions.

Abstract

A new approach is introduced in this paper to deal with the problems of real-time machine vision and pattern recognition for robotic manipulations. This approach emphasizes three directions: (1) the developed algorithm has to be compact enough for embedded intelligent control implementation (2) the computational scheme should be highly efficient for on-line robot reasoning and manipulations and (3) the resulting system has to be sufficiently flexible to accommodate various working environments and to cope with some system shortcomings. The vertical integration of related vision hardware image analysis software and analytical techniques (e. g. fuzzy logic and neural networks) together with the novel algorithms for robot eye-brain-hand coordination constitutes a unique robot vision system. The potential of more extensive hardware implementation is discussed and a wider spectrum of applications of the proposed robot vision system is envisioned.

Biochemical bone fracture healing process model