MODELING TECHNIQUES IN A PARALLELIZING COMPILER FOR THE B-HIVE MULTIPROCESSOR SYSTEM

Rockburst disaster is one of the prominent problems faced by deep underground engineering. In this study, rockburst in four elliptical holes with different axial ratios in sandstone under biaxial loading is studied as an analogue for underground roadways. Video and acoustic emission (AE) equipment is used to monitor the biaxial loading tests. Experimental results indicate that each of the elliptical holes goes through four stages: quiet period, small particle ejection, spalling, and rockburst. The duration of quiet and spalling periods increased with increasing axial ratio of ellipse. The duration of the ejection and rockburst periods remains unchanged. All the four elliptical holes have V-shaped pits after rockburst occurs. The fragments produced during rockburst are divided into coarse, medium, fine, and micro grains. The quantity of coarse and medium grains increases with increasing axial ratio. The mass ratio of coarse and medium grains increases and that of fine and micro grains decreases. The depth, angle, and area of the V-shaped pits decrease with increasing axis ratio. Tensile cracks play an important role in rockburst failure. Tensile cracks are the dominant crack types formed during rockburst and account for over 70% of all cracks in the samples. The number of tensile cracks increased and the number of shear cracks decreased. This paper has some reference value for practical engineering design and prevention of rockburst.

In this paper we study the parallel solution of the discrete-time Lyapunov equation. Two parallel fine and medium grain algorithms for solving dense and large order equations [Formula: see text] on a shared memory multiprocessor are presented. They are based on Hammarling’s method and directly obtain the Cholesky factor of the solution. The parallel algorithms work following an antidiagonal wavefront. In order to improve the performance, column-block-oriented and wrap-around algorithms are used. Finally, combined fine and medium grain parallel algorithms are presented.

This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applications where coarse or medium grain scheduling techniques can be used, DSP applications integrate several thousand of tasks and hence necessitate fine grain considerations. Moreover finding an effective mapping imperatively require to take into account both architectural resources constraints and real time constraints. The main contribution of this paper is to show how it is possible to handle and to solve data partitioning, and fine-grain scheduling under the above operational constraints using concurrent constraints logic programming languages (CCLP). Our concurrent resolution technique undertaking linear and nonlinear constraints takes advantage of the special features of signal processing applications and provides a solution equivalent to a manual solution for the representative panoramic analysis (PA) application.

Grain characteristics of rolled 1235 aluminum alloy were studied by EBSD. The effects of hot rolling, cold rolling and rolling deformation on grain boundaries and grain size of the metal were studied as well. The content of high-angle boundaries was low by 16.48 % in 50 % hot-rolled 1235 aluminum alloy. The complete dynamic recrystallization occurred, and grains were coarse. During 90 % hot rolling, the low-angle boundaries turned into high-angle boundaries constantly. The content of high-angle boundaries was higher by 40.16 %. Coarse grains broke into fine grains, and grew into medium grains. In the 90 % cold-rolled alloy, the trace shape of high-angle boundary was irregular. The lattice distortion was large, providing the energy needed in recrystallization during recrystallization annealing.

Two important characteristics for pots used in melting optical glasses are those of durability against molten glass and of spalling. Present paper deals with the latter property and its bearing on the composition, especially the influence of the grain size distribution of chamotte. Grains of chamotte studied may be classfied as to their sizes as coarse, medium, fine, and very fine. (ratio of their diameters is roughly 14:5:2.5:1). State of dense packing can be obtained for mixtures plenty of grobe and very fine grains and meagre of medium or fine grains in mixtures of three kinds of grains, coarse-medium-very fine and coarse-fine-very fine. Casting slip made of these mixtures with clay have features as follows:i. The fluidity of casting slip is best when the grain size distribution of the slips do not incline toward coarse or very fine.ii. Drying characteristics of bodies run parallel with surface factor calculated after Jackson and Purdy, and are influenced by the state of chamotte packing.iii. Spalling characteristics at temperatures of 850°C (at this temperature, pot is sprayed with water after melting) and 1350°C (at this temperatures batch is poured in) are good by bodies not inclined toward coarse or very fine.iv. Firing characteristics of bodies run parallel with surface factor but are not affected from the state of chamotte packing.

Effects of tempering condition, prior-austenite grain-size, and shape of test specimen on the behavior of hydrogen-induced delayed fracture have been investigated for several low alloysteels for high strength bolt. The main results are as follows;(1) The tempering at temperatures above 500°C improves the resistance to delayed fracture, except for secondary hardenable steels. This resistance depends on the strength level and the strain hardening behavior.(2) Both steels with fine (ASTM 9-10) and coarse (ASTM 0-3) grains of prior-austenite have a tendency to be more susceptible to delayed fracture than these with medium grain size (ASTM 4-5).(3) The thinning of specimen width results in decreasing of the susceptibility to delayed fracture owing to the change of stress condition, from plain strain to plain stress.

In this paper, an acceleration method for hardware platforms for embedded systems is presented. The target system is a Xilinx Virtex II Protrade with an embedded PowerPCtrade. The PowerPCtrade operates as a general purpose processor, while the reconfigurable FPGA fabric is used as a reconfigurable co-processor. A comparison experiment of HW acceleration using different grain levels is done, and results are shown using an MPEG audio decoding algorithm example. A HW/SW interface to communicate the processor with a custom hardware which is synthesized in the reconfigurable fabric is shown. Algorithm analysis is done by profiling and a partitioning decision is based on a fine-medium grain philosophy, which allows more hardware reusability, and simpler and faster reconfiguration. Repetitive functional blocks in the algorithm were detected and implemented in the FPGA logic, and corresponding generic software functionally for writing/reading data in the co-processor unit was developed.

The paper presents a study of medium and coarse grain numerical computations in a new cluster-based shared memory parallel architecture oriented into implementation in "Systems on Chip" (SoC) technology. The assumed architecture is based on dynamic processor clusters, organized around shared memory modules. Fast shared data transfers between processors from different clusters are performed through communication on the fly, which is a synergy of processor switching between clusters and intra-cluster data reads on the fly. Dynamic processor clusters are implemented inside SoC modules additionally connected by a global inter-cluster network. The paper discusses speedup and parallelization efficiency of parallel matrix multiplication estimated by symbolic execution of program graphs. Simulation results are presented for algorithms with two kinds of data decomposition: recursive division of matrices into quadrants and division of matrices into stripes. In the quadrant-based method, elementary square sub-matrix multiplications are performed using the serial Strassen method and the communication on the fly is applied. The experiments reveal much higher efficiency of the proposed quadrant-based matrix multiplication method than that of the "stripe" method, considered very efficient in conventional parallel shared memory systems

Multicore processors, or chip multiprocessors, which allow us to realize low power consumption, high effective performance, good cost performance and short hardware/software development period, are attracting much attention. In order to achieve full potential of multicore processors, cooperation with a parallelizing compiler is very important. The latest compiler extracts multilevel parallelism, such as coarse grain task parallelism, loop parallelism and near fine grain parallelism, to keep parallel execution efficiency high. It also controls voltage and clock frequency of processors carefully to reduce energy consumption during execution of an application program. This paper evaluates performance of compiler controlled power saving scheme which has been implemented in OSCAR multigrain parallelizing compiler. The developed power saving scheme realizes voltage/ frequency control and power shutdown of each processor core during coarse grain task parallel processing. In performance evaluation, when static power is assumed as one-tenth of dynamic power, OSCAR compiler with the power saving scheme achieved 61.2 percent energy reduction for SPEC CFP95 applu without performance degradation on 4 processors and 87.4 percent energy reduction for mpeg2encode, 88.1 percent energy reduction for SPEC CFP95 tomcatv and 84.6 percent energy reduction for applu with real-time deadline constraint on 4 processors.

Fragmentation characteristics analysis of sandstone fragments based on impact rockburst test

In a previous letter on internal friction of 17Cr ferritic stainless steel [1], wires with fine grains (d = 40/xm) had constant internal friction during steady-state creep, but wires with medium (150/~m) and coarse (600/xm) grain had an increase in internal friction during steady-state creep at 988 and 1023 K in a certain stress of 15.10 MPa. The purpose of this study was to obtain more-concrete information on the change in dislocation morphology than the increase in pL 4 (p being the dislocation density and L the average loop length) in this steel during steady-state creep. Electrolytic iron and chromium were melted in a vacuum high-frequency induction melting furnace and case as an ingot. The cast ingot was homogeneously annealed at 1223 K for 6 h. The chemical composition of the ingot was (wt %): 16.70 Cr, 0.008 C, 0.006 S, 0.003 P, 0.01 Si and 0.02 Mn. Hot forging and hot cross-section rolling were performed at 1123 K. Bars were then drawn at room temperature to 2.0 mm diameter. The drawn wire was cut to 50 mm length and annealed. The grain size of the wire was controlled by the recrystallization method and measured by the grain intercept method [2]. The gauge length of the creep specimens was 45 mm. Internal friction was obtained by the natural decay of torsion resonance vibration at a vibration frequency of 0.8-2.0 Hz during tensile creep at high temperature. The internal friction was measured increasing torsion strain amplitude after a certain time during creep deformation at a high temperature. The amplitude dependence of the internal friction is interpreted on the vibrating string model as resulting from a breakaway of dislocations from weak pinning points as the stress amplitude is increased, as shown in Fig. 1. Here it is assumed that dislocations are pinned by the nodes of the dislocation network points and by impurities. LN denotes the average length of a dislocation loop between two

Archean and Proterozoic stromatolites are sparry or fine-grained and finely laminated; coarse-grained stromatolites, such as many found in modern marine systems, do not appear until quite late in the fossil record. The cause of this textural change and its relevance to understanding the evolutionary history of stromatolites is unclear. Cyanobacteria are typically considered the dominant stromatolite builders through time, but studies demonstrating the trapping and binding abilities of cyanobacterial mats are limited. With this in mind, we conducted experiments to test the grain trapping and binding capabilities of filamentous cyanobacterial mats and trapping in larger filamentous algal mats in order to better understand grain size trends in stromatolites. Mats were cut into squares, inclined in saltwater tanks at angles from 0 to 75° (approximating the angle of lamina in typical stromatolites), and grains of various sizes (fine sand, coarse sand, and fine pebbles) were delivered to their surface. Trapping of grains by the cyanobacterial mats depended strongly on (i) how far filaments protruded from the sediment surface, (ii) grain size, and (iii) the mat's incline angle. The cyanobacterial mats were much more effective at trapping fine grains beyond the abiotic slide angle than larger grains. In addition, the cyanobacterial mats actively bound grains of all sizes over time. In contrast, the much larger algal mats trapped medium and coarse grains at all angles. Our experiments suggest that (i) the presence of detrital grains beyond the abiotic slide angle can be considered a biosignature in ancient stromatolites where biogenicity is in question, and, (ii) where coarse grains are present within stromatolite laminae at angles beyond the abiotic angle of slide (e.g., most modern marine stromatolites), typical cyanobacterial-type mats are probably not solely responsible for the construction, giving insight into the evolution of stromatolite microfabrics through time.

Internet of Things (IoT) is growing as an attractive system paradigm. There is a lot of hype around the internet of things (IoT) and it continues to evolve as we move beyond humans talking to machines. IoT has interconnections through the physical, cyber and social spaces. Things used in IoT are sensors and actuators, mechanical devices and networking includes gateways, wireless infrastructure. Most of devices among them are resource constrained. During the interaction between devices, IoT gets suffered from severe security challenges. Complicated network produces potential vulnerabilities referred to heterogeneous devices, sensors and backend systems. So to realize the dream of internet of things secured device to device communication is expected. Security of resource constrained networks becomes prime important. Many existing mechanisms gives security and protection to networks and systems but they are unable to give fine grain access control. In this work, we focused on CoAP based framework to give service level access control on resource constrained devices. It gives fine grain access control on a per service basis. ECDSA is used to improve privacy of the system. Performance of CoAP based framework is compared and analyzed with existing security solutions. Test results are presented which shows that communication overhead and authentication delay are less than the existing system. Hence security performance of system gets improved. The goal is to present comprehensive security framework for low power networks consist of resource constrained devices.

In this paper, we are interested in improving the data processing of storage and computing separated Big Data systems. We propose an Field Programmable Gate Array (FPGA) based Network Interface Card with Query Filter (NIC-QF) to accelerate the data query efficiency of storage nodes and reduce the workloads of computing nodes and the communication overheads between them. NIC-QF designed with PCIe core, query filter and NIC communication can filter the original data on storage nodes as an implicit coprocessor and directly send the filtered data to computing nodes of Big Data systems. Filter units in query filter can perform multiple SQL tasks in parallel, and each filter unit is internally pipelined, which can further speed up the data processing. Filter units can be designed to support general SQL queries on different data formats and we implement two schemes for TextFile and RCFile separately. Based on TPC-H benchmark and Tencent data set, we conduct extensive experiments to evaluate our design, which can achieve averagely up to 46.91% faster than the traditional approach.

Currently the set of scientific applications suitable for running on GPUs has increased due to the computational power of GPUs and the availability of programming languages that make more approachable writing scientific applications for GPUs. However, as the size of the problems increases, the global memory of GPUs becomes a limitation for running applications.Multi-GPU systems can potentially make memory limited problems tractable by dividing the data and computation among several GPUs. Parallel execution is seriously limited by the (i) application data dependencies, and (ii) data transfers among GPUs.In this paper we analyze the potential for parallelization of unstructured grid applications based on the data dependencies of the algorithm and the amount of data communication required. Due to data dependencies and the required communication, data and task parallelization techniques present different communication overheads and computing devices utilization. Based on this analysis we propose a scheme that takes advantage of data and task parallelism and reduces the communication overhead through computation-communication overlap. Our OpenCL implementation reduces the communication overhead by 38%, and, for comparison purposes, a two GPU implementation provides almost a five-fold increase in performance as compared to a CPU implementation.