Modified SVPWM Algorithm for Three Level VSI With Synchronized and Symmetrical Waveforms

This research compared the performance of PWM (Pulse Width Modulation) inverter and multilevel inverter in terms of their output voltage and current total harmonic distortion (THD). The inverters were designed to have the output voltage of 220 V at 50 Hz. The input voltage for both inverters are 400 VDC. For PWM inverter, the PWM technique utilized was sinusoidal PWM (SPWM) and for multilevel converter, the number of voltage level is five with diode-clamped topology. The study included circuit implementation, analysis, and THD calculation, all of which were carried out through simulation using PSpice software. In controlling the SPWM inverter output, the adjusted parameters included amplitude modulation ratio, frequency modulation ratio, and filter components’ parameters. On the other hand, the firing angles of the switching components were designated as controlling parameters in multilevel inverter. From the study, it was found that the best THD values of the designed SPWM inverter are 4.2% (voltage) and 1.7% (current), while those of multilevel inverter are 27% and 11%, for voltage and current, respectively. Thus, it can be concluded that SPWM inverter is better than 5-level inverter for the application in solar panel due to its lower THD. In our study, 5-level inverter did not satisfy the THD requirement specified in IEEE 512-1992, i.e. 5%.

Multi-level inverter used in applications that require high power. The important factor in multi-level inverter is Total Harmonic Distortion (THD). This study discuss nine level cascaded H-bridge multilevel inverter. Also, proposed the effects of using filter on waveform and Total Harmonic Distortion (THD) of output voltage and current. Discussed LC low pass filter and sinusoidal pulse width modulation as control technique of switches. Comparison THD of nine level cascaded H-bridge multilevel inverter with and without filter. The proposed level and filter are design and simulate by MATLAB 2010 Version 7.11.0. The simulation results show the effects of using filter on THD and waveform of output voltage and current. Different methods for choosing filter value are used to illustrate the filter effect.

Three level inverters have certain advantages over the two level inverters and hence they find applications especially in medium voltage high power applications. Three level inverters can synthesize double the voltage levels using the devices of similar voltage rating. Hence, the power handling capacity can be doubled. For a given switching frequency, three level voltage can have double the bandwidth. Three level inverters have improved total harmonic distortion (THD) compared to two level inverters. In high power inverters the switching frequency is limited to low values in order to reduce the switching power losses. In the field of high performance applications, the three-level inverter is the most promising alternative. In this work a simplified space-vector PWM method for three-level inverter is proposed and described in detail. The proposed SVPWM method has the following features. The switching sequence is determined without a look-up table, so the memory of the controller can be saved. The dwelling times of voltage vectors are calculated in the same manner as two-level inverter SVPWM. Thus the proposed method reduces the excution time of three-level SVPWM. The theory of space vector based synchronized PWM method with half-wave symmetry and three phase symmetry for three-level VSI is explained. The proposed algorithm is implemented using TMS320F2812 DSP processor. The experimental results are also presented. The experimental wave-forms show HWS and TPS for any integer value of number of samples per sector. The absence of triplen harmonics from the line voltage shows that the inverter output voltages have three-phase symmetry. The theory about TMS320F2812 DSP processor is also presented.

Background: Previous works on total harmonic distortion (THD) minimization for multilevel inverters (MLI’s) has made a symmetrical approach that imposes Quarter Wave Symmetry (QWS) and Half Wave Symmetry (HWS) with the aim to restrict the computational difficulties to solve the finalized non-linear expressions. Objective: However, QWS constraint can be abolished, which leads to more generalized formulations and multiple solutions corresponding to minimum THD for complete modulation index-range. Methods: A systematic search approach using MATLAB in-build function is adopted to investigate ideal angles of switching related to three-level, three-phase inverter restricted to only HWS as a constraint for two and three (i.e., N= 2 and 3) switching transitions per quarter cycle. Results: On account of the effective minimization of the dominant low-order odd line voltage harmonics, the proposed pulse-width-modulation (PWM) scheme proved its superiority based on minimum THD% performance compared to the previously reported PWM techniques with both HWS and QWS being retained. Conclusion: The simulation, as well as experimental results to confirm the efficacy of the proposed non-symmetrical PWM scheme over the traditional PWM method restricted to QWS and HWS symmetries over the entire modulation-index range with added advantage of general formulation and multiple solutions.

Asymmetric Cascaded H-bridge (ACHB) level inverters can output more voltage waveforms with fewer cascaded units while ensuring the quality of output voltage waveforms, so they have attracted more and more attention. Taking the topology of Type-III asymmetric CHB multilevel inverters as the research object, a Modified Hybrid Frequency Pulse Width Modulation (MHF-PWM) strategy is proposed in this paper. This modulation strategy overcomes the local overshoot of low-voltage unit in the presence of traditional Hybrid Frequency Pulse Width Modulation (HF-PWM), thus completely eliminating the low frequency harmonics in the output voltage waveform of Type-III ACHB nine-level inverters, and the Total Harmonic Distortion (THD) of output line voltage of the modulation strategy is lower than that of PS-PWM strategy in the whole modulation degree, which effectively improves the quality waveform of the output line voltage. At the same time, the strategy can also improve the problems of current backflow and energy feedback caused by the high-voltage unit pouring current to the low-voltage unit, thereby reducing the imbalance of the output power of the high-voltage and low-voltage units. Finally, the Matlab/Simulink simulation model and experimental platform are established to verify the validity and practicality of the modulation strategy.

This work presents the development and implementation of four control configurations for photovoltaic inverter. These configurations are: Proportional Integral plus Resonant controller, Proportional Integral plus Repetitive controller, Proportional Integral-Proportional plus Resonant Controller and Two Degrees of Freedom plus Repetitive control with the aim of reducing the Total Harmonic Distortion in Voltage. These techniques are useful in island mode operation of an inverter when it is working as a voltage source in microgrid. In this operation mode, these control techniques are successfully applied when the inverter feeds linear and nonlinear loads. The purpose is to keep the output voltage waveform, frequency and amplitude according to the standard IEEE 519. It is use is justified because currently most of the loads have nonlinear characteristics which increase considerably the Total Harmonic Distortion in voltage. A comparative analysis derived from inverter simulations with nonlinear loads has been performed in order to validate those control techniques, considering that its application to feed line loads proves to be effective.

For medium- and high-power electronic application technologies, the three-level neutral-point-clamped (3L-NPC) inverter is an effective solution and modulation method is one of its research focuses. There are many modulation strategies for the 3L-NPC inverter, among them, the selective harmonic elimination pulse width modulation (SHEPWM) and selective harmonic mitigation pulse width modulation (SHMPWM) techniques are very useful technologies since they have the characteristics of selective harmonics reduction or elimination. In this paper, simulation models of the 3L-NPC inverter with 10kV grid based on total harmonic distortion (THD) using the SHEPWM and SHMPWM techniques are built in MATLAB/SIMULINK. Here, both the SHEPWM and SHMPWM techniques use fifteen switching angles to generate the switching pattern and the solutions of the nonlinear transcendental equations for these two kinds of PWM techniques are obtained by using the fmincon function with THD-based objective function in MATLAB. Finally, the comparative analysis of the SHEPWM and SHMPWM techniques for the 3L-NPC inverter with 10kV grid based on the THD of voltage and current up to the 50th and the 100th is proposed to verify the respective advantages of the SHEPWM and SHMPWM techniques in different harmonic suppression cases.

The pulse width modulation (PWM) strategy employed in the voltage source inverter (VSI) not only control the magnitude of the output voltage but also the quality. Performance evaluations of such strategies are done in terms of fundamental voltage, total harmonic distortion (THD), switching losses etc. (primary indices) and also in terms of acoustic noise, electromagnetic interference (EMI), harmonic spread factor, distribution of harmonic power etc. (secondary indices). Multilevel inverter (MLI) has become unanimous choice in medium and high power applications due to their superior performance compared to three level inverters. The conventional Sub-Harmonic PWM (SHPWM) scheme and its variations offer the output voltage spectrum with high intensity harmonic components around the switching frequency; it will end with cluster harmonic with high acoustic noise. The first objective of this paper is to investigate harmonic spreading effects of existing multilevel inverter (MLI) strategies. Secondly the developing innovative PWM strategies for MLIs based on modified reference and carrier functions, which were proved for superior the primary indices at three-level VSI. Thorough simulation study of Pulse width modulation strategies such as SHPWM, inverted sine carrier PWM, MWM PWM, third harmonic injection PWM, triplen harmonic injection PWM, analog space vector PWM, trapezoidal PWM and discontinuous PWM for a cascaded multilevel inverter, are presented with results of primary and secondary indices. Hence, the PWM strategies of MLI are evaluated for harmonic spreading effect first time and a guide line for a beginner to select the PWM scheme for MLI fed drive systems is stenciled.

Abstract: The conventional two-level inverter is most commonly used for AC drive systems. The inverter produces harmonics, which will cause heating of the power electronic devices as well as load and deteriorate the life of it. Thus, anyhow harmonics should be suppressed or removed, the most common or well-known method to filter out harmonics are introduction of various filters between inverter and load according to requirements. The filters are mainly designed with L and C connection in different ways, the use of filters become more bulky and costly. To design accurate desired response filters are complex. These issues of filters for the high voltage ratings and higher power applications can be solved by multilevel (ML) inverters topology. In this paper cascaded 5-level and 7-level single phase inverter is being compared with conventional 2-level single phase inverter through proposed simulation model. MLI using cascaded H-Bridge is more advantageous than conventional 2-level such as reduced dv/dt stress improves the EMC problem. Multilevel inverters are more reliable than two-level inverters at lower speed. Voltage rating of each cell in cascaded H-Bridge inverter topology are of low values to obtain 230 AC output MLI is mostly used for stored power in batteries and fuel cell. The inverter can generate different level stepped staircase output voltages at load side to produce more sinusoidal voltage signals and to reduce the THD value. THD value of MLI using cascaded H-Bridge topology reduces on increasing number of levels. Keywords: Total harmonic distortion (THD), electromagnetic compatibility (EMC), and multilevel inverter (MLI) Cite this Article Vijay Shankar, Ankur Kumar, A.N. Tiwari. Harmonics Analysis of Single Phase VSI with 5-level and 7-level Inverter. Recent Trends in Electronics & Communication Systems. 2019; 6(1): 16–23p.

Recently, great attention has been addressed for multilevel inverters, as they exhibit low total harmonic distortion (THD) in the output voltage and low electromagnetic interference (EMI). This paper proposes a single-phase five-level pulse width modulation (PWM) inverter for grid connection. The proposed PWM technique has some switches operated at fundamental line frequency and the others operate at inverter switching frequency. The proposed inverter has advantages of less number of components and low THD compared with the conventional multilevel inverter. The inverter operational principles and the switching functions are analyzed in this paper. Moreover, a proportional integral (PI) current control algorithm is designed and implemented in DSPACE DS1103 to keep the current injected into the grid sinusoidal and in-phase with the grid voltage for unity power factor. Simulation and experimental results prove the powerful merits of the proposed multi-level inverter and the capabilities of the proposed PWM technique.

This paper analyzes the Total Harmonic Distortion (THD) performance of a single phase 5-level CHB MLI. The multi level inverter is simulated using the carrier overlapping APOD Pulse Width Modulation (PWM) switching control technique. The total harmonic distortion (THD) of the output voltage is observed for the PWM control technique at varying modulation index of 0.7-1.0. The performance of a 5-level CHB MLI is simulated using MATLAB/SIMULINK. It is observed that the carrier overlapping APODPWM provides output with relatively low THD.

Bus-clamping Pulse Width Modulation (PWM) is an effective method to reduce the switching loss in a three-phase voltage source inverter (VSI). In bus-clamping PWM scheme, the phase legs are switched using high frequency PWM signals for two-third of the line cycle, while for the remaining duration of cycle, the pole voltage is clamped to either positive or negative rail of the DC bus. In PWM operation of a half bridge, a dead-time is applied between the gate signals of complementary switches to ensure safe and reliable operation. However, introduction of dead-time leads to poor power quality, increased Total Harmonic Distortion (THD) and variation in actual voltage compared to the intended pole voltage. Moreover, when the bus-clamping technique is used, the PWM has both high frequency switching region and clamped region in a line cycle, and consequently, the undesired effects of dead-time are further aggravated. Therefore, in order to enhance the quality of output voltage, this paper presents a dead-time compensation strategy for a VSI operating with bus-clamping PWM. The proposed method calculates the required compensation term to be added on the modulation signal considering wide range of operating conditions. Additionally, the compensation includes a new strategy for low current conditions near zero-crossing to avoid distortion. The proposed method is verified by simulation and experiments in a three-phase VSI with a switching frequency of 100 kHz and a fundamental frequency of 60Hz.

The structural-algorithmic synthesis (SAS) of single-phase voltage source inverter (SPVSI) with pulse-width modulation (PWM) in this area of application is determined for the solar power system with small distortion level of output voltage. To solve this problem in this paper consider the possibility as the SAS of using the principle of multi-channel conversion (MCC) of the energy flow. At that each of the M channels uses single-phase voltage source inverter (SPVSI) with pulse-width modulation (PWM) of the output voltage. Today they are often referred to as multichannel SPVSI. When all channels are fed from a common power supply source, the outputs of the M channels are connected in parallel through transfilters, which sum up the currents of the channels and partially perform the function of voltage filtering. This concept is characterized by significantly smaller difference in neighboring quantization levels both in the output voltages of SPVSIs and the resulting output voltage of SPVSIs with MCC. Feature of multichannel conversion by PWM in these solutions is the use of voltage levels optimized for minimum total harmonic distortion (THD) of output voltage and as well as modified solutions of transfilters. This reduces the installed capacity of the equipments. The results and recommendations obtained in the basis of computer simulation are presented for their comparative assessment and design.

This paper presents a Genetic Algorithm-based approach for optimal placement and sizing of passive power filters to mitigate harmonics in radial distribution systems with linear and nonlinear loads. The problem is formulated as a nonlinear multi-objective optimisation problem with equality and inequality constraints. For solving this problem, the Genetic Algorithm’s performances are analysed and evaluated using the standard IEEE 18- and 33-bus test systems. The optimal solutions are obtained based on the following four optimisation criteria: (1) minimisation of the maximum level of the total harmonic distortion in voltage, (2) minimisation of the initial investment costs of the filters, (3) minimisation of total active power losses in distribution lines and (4) a simultaneous minimisation of the maximum total harmonic distortion in voltage, initial investment costs of filters and total active power losses. The system harmonic levels are estimated using the Decoupled Harmonic Power Flow algorithm. Simulation results, obtained using the proposed Genetic Algorithm-based approach, are compared with those obtained using other optimisation algorithms and verified using the Harmonic Analysis module of the Electrical Transient Analysis Program. It is shown that the Genetic Algorithm-based approach provides effective, robust and high-quality solutions.

This paper brings an advanced class of hybrid SVPWM techniques for medium voltage drive applications with two-level inverter which employs multiple division of active vector time (MDAVT) switching sequences to reduce total harmonic distortion (THD) and switching loss. The proposed hybrid SVPWM techniques are categorised based on the principle of bus-clamping strategies. Multiple division active vector time (MDAVT) switching sequences are used in the proposed strategies. The newly developed MDAVT switching strategies produce PWM waveform for all odd and even pulse number and maintain the symmetry of the voltage waveform. This work compares different MDAVT switching sequences based on modulation index and location of the clamping position (zero vector changing angle) of a phase in a line cycle. The proposed techniques lead to the reduction in weighted total harmonic distortion of line voltage (Vwthd) as well as switching loss. The results point to the superior order of performance of the developed MDAVT sequences in the various ranges of operation of modulation index and power factor values. The superior harmonic performance and switching loss characteristics of the MDAVT PWM techniques over the conventional SVPWM is experimentally verifiedona415 V, 2 hp induction motor drive.