Modulation linearity analysis of depletion-type Si ring modulator (Conference Presentation)

Over the past ten years, DARPA has made significant investments toward advancing the field of microwave photonics. This paper reviews DARPA-funded progress in this subject over the past decade. DARPA-funded research has advanced the state-of-the-art for microwave-photonic components, including low noise laser diodes, electrooptic modulators and high power photodiodes, as well as microwave photonic link configurations, including photonic downconversion, reconfigurable optical filters and optical phase-locked loops. These investments have yielded dramatic improvements in spurious-free dynamic range (SFDR). Measured performance includes SFDRs exceeding 115 dB · Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2/3</sup> at 16 GHz using broadband externally modulated links; exceeding 120 dB · Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2/3</sup> at 10 GHz using sub-octave electrooptic modulators; near 135 dB · Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2/3</sup> at 100 MHz using optical phased-locked loops as linear phase demodulators; and exceeding 125 dB · Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2/3</sup> at 5 GHz using optical filtering, downconversion and predistortion compensation.

We demonstrate U-shaped silicon PN junctions for energy efficient Mach-Zehnder modulators and ring modulators in the O-band. This type of junction has an improved modulation efficiency compared to existing PN junction geometries, has low losses, and supports high-speed operation. The U-shaped junctions were fabricated in an 8" silicon photonics platform, and they were incorporated in travelling-wave Mach-Zehnder modulators and microring modulators. For the high-bandwidth Mach-Zehnder modulator, the DC VπL at -0.5 V bias was 4.6 V·mm. It exhibited a 3dB bandwidth of 13 GHz, and eye patterns at up to 24 Gb/s were observed. A VπL as low as ~2.6 V·mm at a -0.5 V bias was measured in another device. The ring modulator tuning efficiency was 40 pm·V-1 between 0 V and -0.5 V bias. It had a 3-dB bandwidth of 13.5 GHz and open eye patterns at up to 13 Gb/s were measured. This type of PN junctions can be easily fabricated without extra masks and can be incorporated into generic silicon photonics platforms.

By limiting the optical input launch power, stimulated Brillouin scattering imposes detrimental effects on long haul analog optical links. Utilizing Kerr combs generated from an integrated Silicon Nitride microring resonator, we mitigate Brillouin scattering in a 25 Km sampled analog optical link. Such combs offer reduced footprint, high repetition rates and low power consumption, rendering them attractive for next generation integrated analog photonic links. The distribution of the optical carrier power over multiple spectral lines allows launching higher total average powers, significantly improving the link performance. Operating the link in an externally intensity-modulated direct-detection architecture, we compare link metrics using a soliton or a dark pulse as the sampling frequency comb source. An advantageous aspect of the dark pulse is its high pump conversion efficiency. We find that the Kerr comb pump conversion efficiency has a direct effect on the relative intensity noise and the link noise figure. We show that the spurious free dynamic range using Kerr combs can match that of the well-established electro-optic combs.

A 10-bit 10MS/s low power consumption successive approximation register (SAR) analog-to-digital converter (ADC) using a straightforward capacitive digital-to-analog converter (DAC) is presented in this paper. In the proposed capacitive DAC, switching is always straightforward, and its value is half of the peak-to-peak voltage in each step. Also the most significant bit (MSB) is decided without any switching power consumption. The application of the straightforward switching causes lower power consumption in the structure. The input is sampled at the bottom plate of the capacitor digital-to-analog converter (CDAC) as it provides better linearity and a higher effective number of bits. The comparator applies adaptive power control, which reduces the overall power consumption. The differential prototype SAR ADC was implemented with 0.18μm complementary metal-oxide semiconductor (CMOS) technology and achieves an effective number of bits (ENOB) of 9.49 at a sampling frequency of 10MS/s. The structure consumes 0.522mW from a 1.8V supply. Signal to noise-plus-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 59.5 dB and 67.1 dB and the figure of merit (FOM) is 95 fJ/conversion-step.

Combining power-over-fiber (PoF) with microwave photonics (MWP) is a promising solution to supply remote sensors while transmitting and processing RF signals. In this work, we introduce a bidirectional radio-over-fiber (RoF) system with PoF capabilities. A Raman laser provides the power transmitted over a 10 km single-mode fiber (SMF) to the low consumption driving electronics of a remote RF receiver. The 1480 nm optical power simultaneously works as a pump to the copropagating 1550 nm optical carrier and to the counterpropagating optical signal, over the same fiber. We present the frequency response characterization of the proposed link, in the range from 2 to 8 GHz, relying on the classical figures of merit from MWP analysis. RF gain, noise figure, and spurious-free dynamic range are presented, under the effects of stimulated Raman scattering (SRS) and amplified spontaneous emission (ASE) in both directions. An optical power up to 1 W (30 dBm) is available to be converted into electrical power at the remote site.

A new open-loop sample and hold (S/H) circuit is proposed for high-speed sampled data applications. The open-loop S/H circuit uses the source-follower configuration, for its high speed, low power consumption, small area and low circuit complexity. In order to achieve high linearity, a body effect cancellation technique is proposed which is based on proper modulation of the bias current of the source-follower transistor. Simulated by HSPICE with a standard BSIM3v3 0.18 μm CMOS technology, the pseudo-differential open-loop S/H achieves over 76 dB spurious free dynamic range (SFDR) for a 1.6 V ppd output at 200 MHz sampling frequency. The S/H dissipates 12.5 mW power from a 1.8 V supply.

A novel design is presented about ROM-less direct digital frequency synthesizer (DDFS) using phase to sinusoid amplitude conversion blocks based on the two segment fourth-order parabolic approximation. The mathematical maximum error analysis shows that the resolution is up to 14 bits. In order to reduce the hardware complexity without sacrificing speed, the squarer and constant multipliers have been decomposed and optimized. The whole architecture has been split into twenty pipelining stages with a 200 MHz clock rate and a single phase output up to 50 MHz. Meanwhile, because the sine and cosine phase to amplitude modules share the same hardware, reduction of hardware complexity and power consumption can be achieved. Spectral purity analysis shows that the worst case spurious free dynamic range (SFDR) is about -90 dBc. The implementation demonstrates that the proposed DDFS architecture can be realized with a smaller hardware scale and lower power consumption than many other existing approaches.

Microwave photonic filters are fundamental parts in microwave frequency signal processing. The possibility of microwave photonic filters to be integrated in a monolithic chip is highly appealing due to more compact size, weight and lower power consumption. We demonstrate a highly-integrated microwave photonic bandpass filter with wide-frequency tunable range. Both active and passive components including a phase modulator, four cascaded microring resonators and a photodetector, are integrated on a silicon photonic chip. The integrated filter has a wide tunable range from 6.08 GHz to 35.92 GHz and a reconfigurable bandwidth from 0.22 GHz to 0.54 GHz. Spurious-free dynamic range is also measured to examine the link performance. This work is a solid step towards the implementation of an on-chip miniaturized microwave signal processing system.

In this paper, a low power 4-bit 400 MS/s standard cell based flash Analog-to-Digital Converter (ADC) is presented. The proposed flash ADC uses comparators based on the logic gates. Relationship between the input voltage and comparator reference voltage defines the output of comparator to be '1' or '0'. The comparator is followed by the gain booster and encoder. Low power consumption is achieved by effectively switching the comparators from active mode to standby mode. This switching activity is defined by the control signal. The proposed ADC is implemented at the transistor level in 180 nm CMOS, N-well technology with 1.8 V supply voltage and was simulated using Cadence Spectre simulator. Simulation results show the power reduction upto 66% when compared to conventional architecture. The measured spurious-free dynamic range (SFDR) is 30.202 dB and Effective Number of Bits (ENOB) is 3.71 bits with a 1.71 MHz input at a sampling rate of 400 MS/s. The proposed ADC consumes about 3.9 mW of power with figures of merit (FOM) of 0.745 pJ/conversion-step.

A low-power RF mixer with harmonic cancellation for IEEE 802.15.4 portable, wearable wireless applications

A spectrum-sliced microwave photonic filter with an improved spurious-free dynamic range (SFDR) is proposed and experimentally demonstrated. The basic principle is based on the polarization-sensitive modulation in a phase modulator and the dispersion-induced linear/nonlinear phase-to-intensity conversion. A simultaneous noise and nonlinearity reduction is further achieved via polarization diversity and balanced detection, giving rise to an improved SFDR. In the experiments, the SFDR is measured to be 90 for the novel scheme, in contrast to 75 for the traditional configuration.

This paper describes the design of a 10-bit, 25MS/s analogue-to-digital converter (ADC) suitable for digital video broadcasting over terrestrial (DVB-T) and handheld (DVB-H) systems. The ADC is based on a 4-3-3-stage pipeline architecture and employs dynamic comparators and Miller-hold sample-and-hold amplifiers for high-speed operation and low-power consumption. Simulated results in a 0.35/spl mu/m CMOS process show that the converter achieves 56dB signal-to-noise ratio(SNR) and 57dB spurious-free dynamic range (SFDR). The converter input range is 2V peak-to-peak differential and the total power consumption is 27mW from a 2.8V power supply.

High-power, high-linearity photodiodes are essential components for photonic microwave applications since they have the potential to improve many aspects of the link performance such as link gain, noise figure, and spurious free dynamic range. This talk will describe photodiode structures that we have developed to achieve RF output power levels as high as 0.75 W at 15 GHz and high linearity, as measured by the output third-order intercept point (OIP3), > 55 dBm. Recent work has focused on extending operation to higher frequencies and heterogeneous integration with Si photonic circuits.

We present a kind of depletion-mode silicon modulators based on cascade interleaved PN junctions, which simultaneously provide high modulation efficiency and large modulation bandwidth. The interfaces of the PN junctions are vertical to the waveguide's propagation direction and tolerant with ± 150nm junction misalignment on the cost of little degradation on the modulation efficiency. The device was fabricated with standard 0.18μm CMOS process, and provides a VπLπ < 1V • cm and an intrinsic bandwidth 39GHz. Over 10GHz electro-optical modulation bandwidth of the device was experimentally obtained. High speed non-return-zero modulation with a bit rate up to 25Gbit/s was finally demonstrated.

Wideband photonic microwave channelization and image-reject down-conversion