Monte-Carlo Regret Minimization for Adversarial Team Games

A tournament T = (V , A) is a directed graph in which there is exactly one arc between every pair of distinct vertices. Given a digraph on n vertices and an integer parameter k, the Feedback Arc Set problem asks whether the given digraph has a set of k arcs whose removal results in an acyclic digraph. The Feedback Arc Set problem restricted to tournaments is known as the k-Feedback Arc Set in Tournaments (k-FAST) problem. In this paper we obtain a linear vertex kernel for k-FAST. That is, we give a polynomial time algorithm which given an input instance T to k-FAST obtains an equivalent instance T ′ on O(k) vertices. In fact, given any fixed ϵ > 0, the kernelized instance has at most (2 + ϵ)k vertices. Our result improves the previous known bound of O(k2 ) on the kernel size for k-FAST. Our kernelization algorithm solves the problem on a subclass of tournaments in polynomial time and uses a known polynomial time approximation scheme for k- FAST.

Increasing threat of password leakage from compromised password hashes demands a resource consuming password-hashing algorithm to prevent the precomputation of the password hashes. A class of password-hashing schemes (PHS) provides such a defense by making the design Memory hard. This ensures that any reduction in the memory consumed by the algorithm leads to an exponential increase in its runtime. The security offered by a memory-hard PHS design is measured in terms of its time–memory trade-off (TMTO) defense. Another important measure for a good PHS is its efficiency in utilizing all the available memory as quickly as possible, and fast running time when more than the required memory is available. In this work, we present a simple technique to analyze TMTO for a password-hashing scheme which can be represented as a directed acyclic graph (DAG). The nodes of the DAG correspond to the storage required by the algorithm and the edges correspond to the flow of the execution. Our proposed technique provides expected runtimes at varied levels of available storage utilizing the DAG representation of the algorithm. We show the effectiveness of our proposed technique by applying it on three designs from the “Password Hashing Competition" (PHC)—Argon2-Version 1.2.1 (the PHC winner), Catena-Version 3.2 and Rig-Version 2. Our analysis shows that Argon2i is not providing expected memory hardness which is also highlighted in a recent work by Corrigan-Gibbs et al. We analyze these PHS for performance under various settings of time and memory complexities. Our experimental results show (i) simple DAGs for PHS are efficient but not memory hard, (ii) complex DAGs for PHS are memory hard but less efficient, and (iii) combination of two simple graphs in the representation of a DAG for PHS achieves both memory hardness and efficiency.

Approximating the longest path length of a stochastic DAG by a normal distribution in linear time

Previous chapter Next chapter Full AccessProceedings Proceedings of the 2022 Annual ACM-SIAM Symposium on Discrete Algorithms (SODA)Sparsifying, Shrinking and Splicing for Minimum Path Cover in Parameterized Linear TimeManuel Cáceres, Massimo Cairo, Brendan Mumey, Romeo Rizzi, and Alexandru I. TomescuManuel Cáceres, Massimo Cairo, Brendan Mumey, Romeo Rizzi, and Alexandru I. Tomescupp.359 - 376Chapter DOI:https://doi.org/10.1137/1.9781611977073.18PDFBibTexSections ToolsAdd to favoritesExport CitationTrack CitationsEmail SectionsAboutAbstract A minimum path cover (MPC) of a directed acyclic graph (DAG) G = (V, E) is a minimum-size set of paths that together cover all the vertices of the DAG. Computing an MPC is a basic polynomial problem, dating back to Dilworth's and Fulkerson's results in the 1950s. Since the size k of an MPC (also known as the width) can be small in practical applications, research has also studied algorithms whose running time is parameterized on k. We obtain two new MPC parameterized algorithms for DAGs running in time O(k2|V| log |V| + |E|) and O(k3|V| + |E|). We also obtain a parallel algorithm running in O(k2|V| + |E|) parallel steps and using O(log |V|) processors (in the PRAM model). Our latter two algorithms are the first solving the problem in parameterized linear time. Finally, we show that we can transform (in O(k2|V|) time) a given MPC into another MPC that uses less than 2|V| distinct edges, which we prove to be asymptotically tight. As such, we also obtain edge sparsification algorithms preserving the width of the DAG with the same running time as our MPC algorithms. At the core of all our algorithms we interleave the usage of three techniques: transitive sparsification, shrinking of a path cover, and the splicing of a set of paths along a given path. Previous chapter Next chapter RelatedDetails Published:2022eISBN:978-1-61197-707-3 https://doi.org/10.1137/1.9781611977073Book Series Name:ProceedingsBook Code:PRDA22Book Pages:xvii + 3771

Planarity, bipartiteness and (directed) acyclicity are basic graph properties with classic linear time recognition algorithms. However, the problems of testing whether a given (di)graph has k vertices whose deletion makes it planar, bipartite or a directed acyclic graph (DAG) are all fundamental NP-complete problems when k is part of the input. As a result, a significant amount of research has been devoted to understanding whether, for every fixed k, these problems admit a polynomial time algorithm (where the exponent in the polynomial is independent of k) and in particular, whether they admit linear time algorithms. While we now know that for any fixed k, we can test in linear time whether a graph is k vertices away from being planar [FOCS 2009, SODA 2014] or bipartite [SODA 2014, SICOMP 2016], the best known algorithms in the case of directed acyclicity are the algorithm of Garey and Tarjan [IPL 78] which runs in time O(nk–1m) and the algorithm of Chen, Liu, Lu, O'Sullivan and Razgon [JACM 2008] which runs in time O(k!4kk4nm). In other words, it has remained open whether it is possible to recognize in linear time, a graph which is 2 vertices away from being acyclic! In this paper, we settle this question by giving an algorithm that decides whether a given graph is k vertices away from being acyclic, in time O(k!4kk5(n + m)). That is, for every fixed k, our algorithm runs in time O(m + n), thus mirroring the case for planarity and bipartiteness. Our algorithm is designed via a general methodology that shaves off a factor of n from some algorithms that use the powerful technique of iterative compression. The two main features of our methodology are: (i) This is the first generic technique for designing linear time algorithms for directed cut-problems and (ii) it can be used in combination with future improvements in algorithms for the compression version of other well-studied cut-problems such as Multicut and Directed Subset Feedback Vertex Set.

A composite object represented as a directed graph is an important data structure which requires efficient support in CAD/CAM, CASE, office systems, software management, Web databases and document databases. It is cumbersome to handle such an object in relational database systems when it involves recursive relationships. In this chapter, we present a new encoding method to support the efficient computation of recursion. In addition, we devise a linear time algorithm to identify a sequence of reachable trees (w.r.t.) a directed acyclic graph (DAG), which covers all the edges of the graph. Together with the new encoding method, this algorithm enables us to compute recursion w.r.t, a DAG in time O(e), where e represents the number of edges of the DAG. More importantly, this method is especially suitable for a relational environment.

We present DAGSENS, a new theory for parametric transient sensitivity analysis of Differential Algebraic Equation systems (DAEs), such as SPICE-level circuits. The key ideas behind DAGSENS are, (1) to represent the entire sequence of computations, starting from DAE parameters, all the way up to the objective function whose sensitivity is needed, as a Directed Acyclic Graph (DAG) called the "sensitivity DAG", and (2) to compute the required sensitivities efficiently (with time complexity linear in the size of the sensitivity DAG) by leveraging dynamic programming techniques to traverse the DAG. DAGSENS is simple, elegant, and easy-to-understand compared to existing sensitivity analysis approaches; for example, in DAGSENS, one can switch between direct and adjoint transient sensitivities just by changing the direction of DAG traversal (i.e., topological order vs. reverse topological order). Also, DAGSENS is significantly more powerful than existing sensitivity analysis approaches because it allows one to compute the sensitivities of a much more general class of objective functions, including those defined based on "events" that occur during a transient simulation (e.g., a node voltage crossing a particular threshold, a phase-locked loop (PLL) achieving lock, a signal reaching its maximum/minimum value during a transient run, etc.). In this paper, we apply DAGSENS to compute the sensitivities of important event-driven performance metrics in several real-world electronic and biological applications, including high-speed communication (featuring sub-systems such as I/0 links and PLLs), statistical cell library characterization, and gene expression in Drosophila embryos.

Dynamic programming (DP) is a fundamental tool used to obtain exact, optimal solutions for many combinatorial optimization problems. Among these problems, important ones including the knapsack problems and the computation of edit distances between string pairs can be solved with a kind of DP that corresponds to solving the shortest path problem on a directed acyclic graph (DAG). These problems can be solved efficiently with DP, however, in practical situations, we want to solve the customized problems made by adding logical constraints to the original problems. Developing an algorithm specifically for each combination of a problem and a constraint set is unrealistic. The proposed method, BDD-Constrained Search (BCS), exploits a Binary Decision Diagram (BDD) that represents the logical constraints in combination with the DAG that represents the problem. The BCS runs DP on the DAG while using the BDD to check the equivalence and the validity of intermediate solutions to efficiently solve the problem. The important feature of BCS is that it can be applied to problems with various types of logical constraints in a unified way once we represent the constraints as a BDD. We give a theoretical analysis on the time complexity of BCS and also conduct experiments to compare its performance to that of a state-of-the-art integer linear programming solver.

Coarse-grained reconfigurable architectures (CGRAs) are increasingly employed as domain-specific accelerators due to their efficiency and flexibility. However, the existing CGRA architectures suffer from low hardware resource utilization and performance due to the limitations of the scheduling scheme. In this article, an adaptive scheduler (denoted as DPTM) for concurrent and multi-task interleaved pipelining-oriented CGRA is introduced, which exploits timeslot matching and release methods to avoid the pipeline conflicts and improve the scheduling performance. The characteristics of task scheduling based on directed acyclic graph (DAG) are analyzed, and several performance-influencing factors are extracted to build a scheduling performance model for reducing the time cost of scheduling and guiding the design of scheduling schemes. Moreover, the scoreboard method of dynamic instruction schedulers is optimized to control the entry time of multiple tasks into the pipeline, and then a timeslot matching method is proposed to provide non-conflict pipelining for the multiple tasks. Further, a timeslot release method is presented to release the timeslots for unscheduled sub-tasks dynamically, which can adapt the parallel processing of multiple tasks and decrease the scheduling time. Then, an adaptive scheduling scheme combines the dynamic priority-based task assignment method, timeslot matching method, and timeslot release method to schedule massive tasks for CGRA. Finally, the overall architecture of DPTM is introduced and designed to validate the efficacy of the proposed scheduling scheme. Experimental results show that the proposed timeslot matching/release approach reduces 84% total scheduling time and decreases 40% average scheduling time at most compared to the non-timeslot-matching scheduling schemes, the proposed task assignment approach decreases 8% total scheduling time and lowers 3% average scheduling time compared to the existing approaches, and the proposed scheduler decreases 51% critical path delay, lowers 35% area overhead, and reduces 12% power consumption at most compared with the existing schedulers.

Clustering is an effective technique for improving both the network lifetime and the robustness of a WSN (Wireless Sensor Network). We investigate the problem of constructing a set of clusters and a routing DAG (Directed Acyclic Graph) for inter-cluster communication for a WSN such that the network lifetime is maximized, and propose a novel efficient approach. Our approach consists of a polynomial-time clustering algorithm and a polynomial-time routing DAG construction algorithm. The clustering algorithm constructs clusters based on a precise energy model for each sensor node. The routing DAG construction algorithm formulates the DAG construction problem into an LP (Linear Programming) problem. We have performed extensive simulations on 155 network instances with 100, 200, 300, 400 and 500 sensor nodes with uniform distribution and random distribution, and compared our approach with three previous approaches, namely EEUC, ACT and UCCGRA. The average network lifetime improvements of our approach over EEUC, ACT and UCCGRA are 170%, 76% and 105%, respectively. Furthermore, we show the precise correlation between the cluster sizes and the network lifetime by performing analysis and simulations.

Task scheduling is a well-known NP-complete problem. It is one of the research areas in parallel computing. Task scheduling consists of an application program and a set of processors for allocating the various tasks. An application program is represented using a directed acyclic graph(DAG) and a set of processors that are homogenous and fully connected. In this paper, we study different task duplication-based (TDB) scheduling algorithms and their priority attributes and time complexity. Also, we will discuss different types of performance metrics in task scheduling algorithms. These performance metrics help to analyze different task scheduling algorithms.

Finding an optimal solution to the problem of scheduling an application modeled by a directed acyclic graph (DAG) onto a set of heterogeneous machines is known to be an NP-hard problem. In this study, we present a duplication based scheduling algorithm, namely the levelized duplication based scheduling (LDBS) algorithm, which solves this problem efficiently. The primary goal of LDBS is to minimize the schedule length of applications. LDBS can accommodate different duplication heuristics, thanks to its modular design. Specifically, we have designed two different duplication heuristics with different time complexities. The simulation studies confirm that LDBS is a very competitive scheduling algorithm in terms of minimizing the schedule length of applications.

In this paper, we define a new problem called the Maximum Connectivity Improvement (MCI) problem: given a directed graph \(G = (V,E)\), a weight function \(w:V \rightarrow \mathbb {N}_{\ge 0}\), a profit function \(p:V \rightarrow \mathbb {N}_{\ge 0}\), and an integer B, find a set S of at most B edges not in E that maximises \(f(S)=\sum _{v\in V}w_v\cdot p(R(v,S))\), where p(R(v, S)) is the sum of the profits of the nodes reachable from node v when the edges in S are added to G. We first show that we can focus on Directed Acyclic Graphs (DAG) without loss of generality. We prove that the MCI problem on DAG is \( NP \)-Hard to approximate to within a factor greater than \(1-1/e\) even if we restrict to graphs with a single source or a single sink, and MCI remains \( NP \)-Complete if we further restrict to unitary weights. We devise a polynomial time algorithm based on dynamic programming to solve the MCI problem on trees with a single source. We propose a polynomial time greedy algorithm that guarantees \((1-1/e)\)-approximation ratio on DAGs with a single source or a single sink.

Preface

Counterfactual Regret Minimization (CFR) is proposed to be an effective method to find approximate Nash Equilibrium for large zero-sum imperfect information games. Deep neural networks make it possible for CFR to be applied in large games by extending tabular CFR to Deep CFR. While there is little research on applying CFR to board games, in this paper, we propose a variant of Deep CFR for board games and apply it to the game Geister. We show that our proposed method can train agents with an appropriate strategy.