Multi-bit Stuck-at Fault Recovery System With Error Correction Pointer

Abstract

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Repetitive writes in resistive memory(ReRAM) cells may limit the cell life time causing stuck-at faults. Malicious attack increases the probability of failures at multi-bit positions of a memory block designed by this technology. A scalable fault tolerant design is required for sustainability with increased number of faults. This work proposes a fault diagnosis (identification of the position of the faulty cell's) scheme to mitigate the impact of faulty data recordings mainly on large word-sized resistive memory blocks. Theory of cellular automata(CA) is used to check the presence of single/multiple faulty cells within a memory block at run time. Uniform/non-uniform CA is used to test the faulty/non-faulty(NF) memory blocks. Two distinct classes of CA, one single length cycle attractor CA(SACA) and two single length cycle attractor CA(TACA) are found suitable for fault detection purpose. Further, the error correction pointer(ECP) is used to diagnose the faulty cell position within a memory block. Error Correction pointers are distributed to capture the faults at run time according to the demand of memory blocks. This design named Cellular Automata based error correction pointer(CECP ) doesn't put any restriction to the number of faults. Therefore it ensures 100% fault tolerance against multi-bit stuck at faults in a resistive memory and also assures correct retrieval of data efficiently.