15- https://doi.org/10.1145/123465.123504
On reconfigurable on-chip data caches
- Jan 1, 1991
- Fredrik Dahlgren +1 more
Article Free Access Share on On reconfigurable on-chip data caches Authors: Fredrik Dahlgren Department of Computer Engineering, Lund University, P.O. Box 118, S-22100 Lund, Sweden Department of Computer Engineering, Lund University, P.O. Box 118, S-22100 Lund, SwedenView Profile , Per Stenström Department of Computer Engineering, Lund University, P.O. Box 118, S-22100 Lund, Sweden Department of Computer Engineering, Lund University, P.O. Box 118, S-22100 Lund, SwedenView Profile Authors Info & Claims MICRO 24: Proceedings of the 24th annual international symposium on MicroarchitectureSeptember 1991Pages 189–198https://doi.org/10.1145/123465.123504Published:01 September 1991Publication History 12citation358DownloadsMetricsTotal Citations12Total Downloads358Last 12 Months12Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
- # Cache Architectures
- # Memory Access Time
- # Superscalar Processors
- # Cache Memory
- # Processor Speed
- # RISC Processors
- # On-chip Caches
- # Small Data
- # On-chip Data Caches
- # Array Data Structures
