3- https://doi.org/10.1109/jsac.1985.1146206
On the Design of a High-Performance LSI Circuit Digital Signal Processor for Communication
- Jan 1, 1985
- IEEE Journal on Selected Areas in Communications
- H Gambe +4 more
Abstract
This paper describes the design of a highly efficient CMOS LSI circuit digital signal processor (FDSP3). To realize an operating cycle rate of 10 MHz and a throughput rate of 0.6 μs per second-order filter section, considerable care has been paid to the design of software structures and hardware circuitry. Basic program routines and some application examples are also shown. These examples illustrate the high efficiency of the developed DSP device.
- # Second-order Filter Section
- # Hardware Circuitry
- # Design Of Digital Signal Processor
- # High-Performance Digital Signal Processor
- # Considerable Care
- # Design Of Signal Processor
- # High-Performance Digital Signal
- # Design Of Circuitry
- # Application Examples
- # Basic Routines
