Surface-Emitting-Laser-based optical functional devices have promising features for photonic switching and optical data processing. All photonic switching networks need control signals to be sent into the nodes to allow for appropriate routing of traffic.') Control injection, thus, must be taken into consideration more in photonic switches. An optical self-routing switch has been proposed where a node consists of pnpn-Vertical to Surface Transmission ElectroPhotonic Devices with Vertical Cavities (VC-VSTEPS).~) The routing for optical data signals are controlled by an optical pilot signal placed at the head of the optical data signals. However, this switch still needs electric timing signals to be applied to the VC-VSTEPs, which might cause electromagnetic interferences among a large number of internal electric lines, and a delay in the timing signals due to parasitic capacitances. Therefore, it is desirable that the timing signals are further injected optically. This paper reports on VSTEP-based pixels aiming for optically controllable nodes. The pixel consists of a VSTEP using a four-terminal pnpn structure with two distributed Bragg reflectors (DBRs) (Fig. 1). The fabrication process includes two-step mesa etching: 1) to the n-doped gate layer, and 2) to the n-doped DBR layer. The n- and p-gate electrodes are formed on the second mesa with Zn diffusion for the p-gate. In comparison to twoterminal VC-VSTEPs3), the structure provides variable switching voltage characteristics and gate turn-off operation by means of carrier injectiodextraction through the gate terminals. Also, this structure allows the formation of a hetero-junction bipolar transistor (HBT), or a hetero-junction photo-transistor (HPT) together with the pnpn-structure. These two features, in combination, expand flexibility in device configuration to meet the demands of photonic switching and processing systems. As an example, a pixel has been demonstrated for an optical self-routing switch with optical gating and optical reset operations. Figure shows an equivalent circuit of the pixel. When the optical gate pulse is incident on the HFT1, current is injected to the pnpn device, resulting in a reduction of switching voltage, and allowing turn-on by the input optical pulse. Applying the gate pulses to the pixels with proper time delays, the pilot signal can select one pixel in which the pilot signal coincides with the gate signal. 2 is used for the optical reset. The optical reset pulse incident on the HPT2 removes the stored charge in the pnpn-device through the ngate. Figure 3 shows voltage-current and light-current characteristics of the fabricated device with various current injections from the n-gate. The switching voltage without n-gate injection is 3.8 V and the threshold current is 35 mA. A common-emitter current gain of 180 is obtained for the npn-HPT using an n-gate as a collector and a cathode as an emitter. Figure 4(a) shows the optical gating operation. A bias voltage of 3V was applied to the anode. The reset is also achieved as shown in Fig. 4(b). Optical energies obtained for the input, gate and reset are 8.0 pJ, 0.5 pJ and 10 pJ, respectively. Reduction in these values will be achieved by a decrease in device size.
