Optimal Programming of Critical Sections in Modern Network Processors under Performance Requirements

Abstract

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Modern network processors deliver a set of methods for implementing critical sections. A number of them rely on specific hardware support and capabilities, while software techniques are still available when hardware support is not flexible enough. Network processors are dedicated to packet processing and their main goal is to achieve the best possible packet processing performance. Therefore, when choosing the implementation method for a particular problem that will be protected by a critical section, the aim must me for the method to influence the overall system performance A wrongly implemented critical section can very easily degrade the level of parallelism and in consequence the performance of the whole system. Sometimes even correctly implemented critical sections can negatively impact the speed of paths that do not need to be protected with a critical section.