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  • Optimization of Patterned Surfaces for Improved Superhydrophobicity through Cost-Effective Large-Scale Computations.
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Optimization of Patterned Surfaces for Improved Superhydrophobicity through Cost-Effective Large-Scale Computations.

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Abstract

The pattern design of superhydrophobic surfaces can be significantly aided by computations that predict the Cassie-Baxter (CB) to Wenzel (W) transition, which is responsible for the break-down of superhydrophobic behavior. We present a computational framework for the optimization of patterned surfaces based on the energy barriers of the CB-W transitions which comprises the following elements: (a) design of structured surface patterns, for example, arrays of pillars, with parameterized geometric features such as size, pitch, slope, and roundness. (b) Computation of the wetting states with a modified Young-Laplace equation that facilitates the introduction of solid/liquid interactions for complex surface patterns and has significantly lower computational cost than other commonly used methods, such as the volume-of-fluid, phase-field, and so forth. (c) Incorporation of the modified Young-Laplace in the simplified string method, allowing the calculation of the minimum energy paths of wetting transitions which, apart from the energy barriers, also reveal the transition mechanisms (CB failure modes). (d) Accommodation of large-scale problems with good parallel performance and scalability on multicore-distributed memory systems using fast iterative solvers and the Message Passing Interface communication protocol. We demonstrate the computational framework with a shape optimization study of inverted conical frustum pillars. The optimization objective function is the resistance to the CB-W transition, which is quantified by the energy barrier-a relatively large energy barrier suggests improved superhydrophobicity. We also report the parallel performance, in terms of parallel speedup for problems ranging from three hundred thousands to 12 million degrees of freedom, solved using up to 40 processing cores.

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