Parallel Optimization Strategy of Heap Sort Algorithm under Multi-core Environment

It proposes a variant of insertion sort algorithm, it's added the function to build a heap from the heap sort algorithm. It's str ategic, first, build a heap on the array that is going to sort because the array's information tends to be pseudo descending order, then inverting the array's information tends to be pseudo ascending order, saving work of the insertio n algorithm. The tests show a saving of over 50% of the time consumed by t he original algoritm.

In this paper we propose a new parallel sorting algorithm which is based upon an operation which sorts three elements. This algorithm is similar to the parallel odd-even merge sorting algorithm proposed by Batcher, except in the latter, the basic operation sorts only two elements. The correctness of our algorithm is also proved.

Sorting and merging are two problems that commonly arise in Computer Science especially in data processing tasks. To solve these problems, several algorithms have been developed. Similarly, existing merge and sorting algorithms have been improved to provide more efficient and accurate results. In this paper, selection and merging algorithms were developed on an octa-core processing machine using System.nanoTime methods in Java in order to compare their running times. The results obtained show that Merge Sort performs far better than selection sort with careful implementations by taking advantage of multiple processing cores in the test machine and some concurrency utility in Java. It was concluded that implementing algorithms using a machine with multiple numbers of cores in their Central Processing Unit (CPU) will result in a significant improvement in the performance of both algorithms.

This paper presents the study of implementation and performance in sorting process, using two different algorithms, namely Insertion Sort and Merge Sort. In the first stage, the two algorithms were implemented in C++ language to sort several numbers typed by a user. In the second stage, the source codes for those algorithms were modified to enable sorting randomly generated numbers with the amount as requested by the user. To find out how well they performed in sorting out the data, therefore in the last stage the two algorithms were tested to sort random numbers with predetermined amount ranges and the results were compared. From the experiments performed, merge sort algorithm had shown a better performance, particularly in a large number of data (> 10000). Insertion sort algorithm has the advantage in lower complexity algorithm, notably in the best case condition and since it does not use recursion routines in sorting process, hence it does not require as much storage space or memory as needed by merge sort algorithm.

Sorting Networks on Maxeler Dataflow Supercomputing Systems

Sorting appears the most attention among all computational tasks over the past years because sorted data is at the heart of many computations. Sorting is of additional importance to parallel computing because of its close relation to the task of routing data among processes, which is an essential part of many parallel algorithms. Many parallel sorting algorithms have been investigated for a variety of parallel computer architectures. In this paper, three parallel sorting algorithms have been implemented and compared in terms of their overall execution time. The algorithms implemented are the odd-even transposition sort, parallel merge sort and parallel shell sort. Cluster of Workstations or Windows Compute Cluster has been used to compare the algorithms implemented. The C# programming language is used to develop the sorting algorithms. The MPI library has been selected to establish the communication and synchronization between processors. The time complexity for each parallel sorting algorithm will also be mentioned and analyzed.

Electronic circuits: by E. J. Angelo, Jr. 450 pages, diagrams, 6 × 9 in. New York, McGraw-Hill Book Co. Inc., 1958.Price, $9.00.

Selim Akl has been a ground breaking pioneer in the field of parallel sorting algorithms. His ‘Parallel Sorting Algorithms’ book [12], published in 1985, has been a standard text for researchers and students. Here we discuss recent advances in parallel sorting methods for many-core GPUs. We demonstrate that parallel deterministic sample sort for GPUs (GPU Bucket Sort) is not only considerably faster than the best comparison-based sorting algorithm for GPUs (Thrust Merge) but also as fast as randomized sample sort for GPUs (GPU Sample Sort). However, deterministic sample sort has the advantage that bucket sizes are guaranteed and therefore its running time does not have the input data dependent fluctuations that can occur for randomized sample sort.

In this paper, we present a new parameterized parallel sort algorithm, called Round-Robin Partitioned (or RRP), for the message passing (shared-nothing) architecture. This is a parameterized sort algorithm because a parameter is provided which can be used to determine the amount of memory used and to allocate differing amounts of work to different sets of sites. We utilize pipelining to hide disk I/O time, exploit high degrees of parallelism at all phases, apply sampling to determine the partition key values and use less memory than previous known methods while repairing the minimum number of physical I/Os. The basic version of the RRP algorithm is simple in terms of coding and complexity. It does not require disk I/O parallelism or data prefetch within a single process. We develop an analytical model for our algorithm and compare our sort algorithm with four other classes of external parallel sort algorithms. The RRP algorithm are shown to be superior to the other algorithms for almost all configurations.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Sorting is an important component of many applications, and parallel sorting algorithms have been studied extensively in the last three decades. One of the earliest parallel sorting algorithms is bitonic sort, which is represented by a sorting network consisting of multiple butterfly stages. The paper studies bitonic sort on modern parallel machines which are relatively coarse grained and consist of only a modest number of nodes, thus requiring the mapping of many data elements to each processor. Under such a setting optimizing the bitonic sort algorithm becomes a question of mapping the data elements to processing nodes (data layout) such that communication is minimized. The authors developed a bitonic sort algorithm which minimizes the number of communication steps and optimizes the local computation. The resulting algorithm is faster than previous implementations, as experimental results collected on a 64 node Meiko CS-2 show.

In this paper, we consider a parallel algorithm for the patience sorting. The problem is not known to be in the class NC or P-complete. We propose two algorithms for the patience sorting of n distinct integers. The first algorithm runs in [Formula: see text] time using p processors on the EREW PRAM, where m is the number of decreasing subsequences in a solution of the patience sorting. The second algorithm runs in [Formula: see text] time using p processors on the EREW PRAM. If [Formula: see text] is satisfied, the second algorithm becomes cost optimal.

A parallel sorting algorithm is presented for general purpose internal sorting on MIMD machines. The algorithm initially sorts the elements within each node using a serial sorting algorithm, then proceeds with a two-phase parallel merge. The algorithm is comparison-based and requires additional storage of order the square root of the number of elements in each node. Performance of the algorithm on the Fujitsu AP1000 MIMD supercomputer is discussed.

Some ant species are known to gather and sort corpses in an auto-organized way. In this contribution, we propose a new cellular ant colony algorithm for sorting and clustering. This algorithm mimics the behavior of real ants. The cellular automata nature of our algorithm implies a straightforward parallelization. The rule consists of a pick-up, a deposition and a diffusion. Our probabilistic pick-up rule is based on some spatial neighborhood information. We observe that probabilistic pick-up yields compact clusters and also speeds up the clustering process. In the long run, a single cluster emerges. Moreover, in the presence of several corpse species, our algorithm sorts the corpses into distinct clusters. Thus our model reproduces realistic results, but however we do not observe any collective effect.KeywordsCellular AutomatonCluster ProcessSingle ClusterAlgorithm SortDeterministic CaseThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

The Parallel Priority Queue (PPQ) data structure supports parallel operations for manipulating data items with keys, such as inserting n new items, deleting n items with the first n smallest keys, creating a new PPQ that contains a set of items, and melding two PPQ’s into one. In this paper, we present fast and efficient parallel algorithms for performing operations on the PPQ’s that maintain data items with real-valued keys. The data structures that we use for implementing the PPQ’s are the unmeldable and meldable parallel heaps. Our algorithms have considerably less time and/or work bounds than the previously best known algorithms, and use a less powerful parallel computational model (EREW PRAM). The new ideas that make our improvement possible are two partition schemes dynamically maintained on the parallel heap structures: the minimal- path partition and the right-path partition. These partition schemes could be of interest in their own right. Our results also lead to optimal parallel algorithms for implementing sequential operations on several commonly-used heap structures.

Various benchmarks exist for assessing performance characteristics of commodity hardware utilized in high performance computing (HPC) cluster environments. An additional assessment of bandwidth for Intel's 44-core processors considers network saturation via message passing focused on indirectly connected cores. The benchmark developed in this work provides a means of measuring bandwidth of two Broadwell nodes when communicating inter-chassis with all cores of each node utilized. This benchmark was developed in three phases using Message Passing Interface (MPI). First, the bandwidth measure was tested for MPI_Send operations in point-to-point communication. Second, the merge sort algorithm was implemented as a means of assessing bandwidth and a tree-structured communication algorithm was developed and implemented to maximize internode communication and minimize intra-node communication. Third, the benchmark was tuned to the configuration of the Distributed Environment for Academic Computing (DEAC) Cluster. A second benchmark removing local computation from the merge sort algorithm effectively performs a gather operation in a tree-structure. These benchmarks were tested and compared with relevant Intel MPI Benchmarks (IMB) tests. In the developed benchmarks, the nodes requested significantly more bandwidth than in the existing MPI_Gather operation and IMB benchmarks due to the large size of the messages simultaneously placed on the network.