Parallel reconfiguration algorithms for mesh-connected processor arrays

We propose a new restructuring method for mesh-connected processor arrays (PAs) using single track shift with spare processing elements (PEs) on the orthogonal two or four sides. First, a method called “ROT method” for mesh-connected PAs with spare PEs on the orthogonal sides is described. Next, the method is applied to mesh-conected PAs with spare PEs on the four sides. The effect of the method is evaluated by computer simulation and it is shown that ROT method makes array reliabilites fairly higher than those of the existing methods for mesh-connected PAs with the same number of spare PEs and the same network structure. The hardware realization of ROT method is also discussed and it is seen that the method can be realized as a simple built-in circuit. The circuit can be embedded in a target PA to reconstruct the PA with faulty PEs very quickly. This implies that the proposed method is especially effective in enhancing the run-time reliability of a PA in mission critical systems where first self-reconfiguration is required without an external host computer or manual maintenance operations.KeywordsFault-toleranceMesh arraySingle track shiftSelf-restructuringBuilt-in circuit

ABSTRACTThe mean shift image segmentation algorithm is very computation-intensive. To address the need to deal with a large number of remote sensing (RS) image segmentations in real-world applications, this study has investigated the parallelization of the mean shift algorithm on a single graphics processing unit (GPU) and a task-scheduling method with message passing interface (MPI)+OpenCL programming model on a GPU cluster platform. This paper presents the test results of the parallel mean shift image segmentation algorithm on Shelob, a GPU cluster platform at Louisiana State University, with different datasets and parameters. The experimental results show that the proposed parallel algorithm can achieve good speedups with different configurations and RS data and can provide an effective solution for RS image processing on a GPU cluster.

Three parallel algorithms for solving the 3D problem with nonlocal boundary condition are considered. The forward and backward Euler finite-difference schemes, and LOD scheme are typical representatives of three general classes of parallel algorithms used to solve multidimensional parabolic initial-boundary value problems. All algorithms are modified to take into account additional nonlocal boundary condition. The algorithms are implemented using the parallel array object tool ParSol, then a parallel algorithm follows semi-automatically from the serial one. Results of computational experiments are presented and the accuracy and efficiency of the presented parallel algorithms are tested.

: The objective of this study was to investigate the applicability of a Reconfigurable Array of Flexible Processors, with enhanced word processing capabilities, to the problem of document retrieval. The work performed during the study falls into three categories. First, the intelligence information retrieval application at AFSC Foreign Technology Division (FTD), Wright-Patterson AFB OH was analyzed for characteristics which might serve as system design and performance evaluation measures. The analysis was conducted by reviewing the data base and system usage characteristics at FTD and by synthesizing and analyzing a small experimental data base. From this, several areas in which the Reconfigurable Array with an associative processing unit might be used to advantage were identified, and a number of system sizing parameters were found. The second category of work included the design modification and fabrication of an exploratory model of an associative unit, and its integration with a laboratory Reconfigurable Array. The third category of effort included the development and exercising of a demonstration document retrieval system using a Reconfigurable Array of Flexible Processors, the Exploratory Development Model Associative Unit, and the experimental data base. The results of the evaluations performed during the study indicate that a Reconfigurable Array with a fully populated Associative Unit should perform searches about 200 times faster than the current system.

Efficient implementation of global computations on a linear array of processors is complicated due to the small communication bandwidth and the large communication diameter of the array. This paper presents efficient parallel techniques for partitioning, movement, and reduction of data on linear arrays. Also, efficient data structures are used to enable fast sequential access of query points within each processor. This combination of serial and parallel techniques is used to derive an optimal parallel algorithm for computing the convex hull of each connected region in an n×n image. The algorithm takes O(n 2/p) time on a linear array with p processors, where 1≤p≤n/log n. This result is processor-time optimal since an optimal sequential algorithm takes O(n 2) to solve the problem. Thus, a linear array with n/log n processors can solve the above problem in O(n log n) time. In comparison, a two dimensional mesh-connected array of processors can solve this problem in O(n) time using n 2 processors. The processor-time product for the mesh is O(n 3), which is not optimal.KeywordsConvex HullExtreme PointLinear ArrayLocal MemoryQuery PointThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

An O(n) algorithm to sort n2elements on an Illiac IV-like n × n mesh-connected processor array is presented. This algorithm sorts the n2elements into row-major order and is an adaptation of Batcher's bitonic sort. A slight modification of our algorithm yields an O(n) algorithm to sort n2elements into snake-like row-major order. Extensions to the case of a j-dimensional processor array are discussed.

Segmenting cells reliably and correctly in a microscopic image is a pretty difficult task. We have developed a set of cell segmentation algorithms in parallel and a decision fusion algorithm to make the detection more robust. The distance and watershed transforms have also been used to separate the connected cells. Experimental results have proved that these algorithms are pretty robust to variable microscopy image data, and variable cell densities, and with the proposed fusion and false removal algorithms, the cell detection rate has increased significantly to above 97% with the false detection rate about 7%.

The support of range, segment and rectangle queries are fundamental problems in computational geometry, and have extensive applications in many domains. Despite significant theoretical work on these problems, efficient implementations can be complicated, and most implementations do not have useful theoretical bounds. In this paper, we focus on simple and efficient parallel algorithms and implementations for range, segment and rectangle queries, which have worst-case bounds in theory and good performance in practice, both sequentially and in parallel. We propose to use a framework based on the abstract data type augmented map, to model the problems. Based on the augmented map interface, we develop both multi-level tree structures and sweepline algorithms supporting range, segment and rectangle queries in two dimensions. For the sweepline algorithms, we also propose a parallel paradigm and show corresponding cost bounds. Theoretically, the construction algorithms of all of our data structures are work-efficient and highly parallelized.We have implemented all the data structures described in the paper, ten in all, using a parallel augmented map library. Based on the library, each data structure only requires about 100 lines of C++ code. We test their performance on large data sets (up to 108 elements) and a machine with 72-cores (144 hyperthreads). The parallel construction achieves 32-68x speedup, and the speedup numbers for queries are up to 126-fold. Sequentially, each of our implementations outperforms the CGAL library by at least 2x in both construction and queries. Our sequential implementation has approximately the same construction time as the R-tree in the Boost library, but has significantly better query performance (1.6-1200x). We believe this paper provides the most comprehensive experimental study of data structures on range, segment and rectangle queries, both in parallel and sequential setting.

A parallel reconfiguration algorithm for WSI/VLSI processor arrays

We show how to off-line route any permutation of an n×n mesh-connected processor array in 2.5n steps with at most two packets per processor per time step and in 2.25n+3 steps with at most four packets per processor per time step.

The main purpose in this paper is to lay a theoretical foundation for the design of mesh-connected processor arrays for the transitive closure problem. Using a simple path-algebraic formulation of the problem and observing its similarity to certain well-known smoothing problems that occur in digital signal processing, we show how to draw upon existing techniques from the signal processing literature to derive regular iterative algorithms for determining the transitive closure of the graph. The regular iterative algorithms that are derived using these considerations, are then analyzed and synthesized on mesh-connected processor arrays. Among the vast number of mesh-connected processor arrays that can be designed using this unified approach, the systolic arrays reported in the literature for this problem are shown to be special cases.

We prove that (1+√6/2)n ≈ 2.22n is a time lower bound independent of indexing schemes for sorting n2 items on an n × n mesh-connected processor array. We distinguish between indexing schemes by showing that there exists an indexing scheme which is provably worse than the snake-like row-major indexing for sorting. We also derive lower bounds for various indexing schemes. All these results are obtained by using the chain argument which we provide in this paper.

In this work we consider parallel variational algorithms for solution of linear systems. Theoretical analysis explains the superlinear convergence rate for two step gradient descent method. A new modification of the algorithm is proposed. Results of computational experiments are given for a linear system of equations approximating 3D elliptic boundary value problem. All algorithms are implemented using parallel array object tool ParSol, then a parallel algorithm follows semi‐automatically from the serial one. Results of the scalability analysis are presented and the efficiency of the presented parallel algorithm is investigated experimentally.

Coordinated checkpointing is an effective fault tolerant technique in distributed system as it avoids the domino effect and require minimum storage requirement. Most of the earlier coordinated checkpoint algorithms block their computation during checkpointing and forces minimum-process or non-blocking but forces all nodes to takes checkpoint even though many of them may not be necessary or non-blocking minimum-process but takes useless checkpoints or reduced useless checkpoint but has higher synchronization message overhead or has high checkpoint request propagation time. Hence in mobile distributed systems there is a great need of minimizing the number of communication message and checkpointing overhead as it raise new issues such as mobility, low bandwidth of wireless channels, frequently disconnections, limited battery power and lack of reliable stable storage on mobile nodes. In this paper, we propose a minimum-process coordinated checkpointing algorithm for mobile distributed system where no useless checkpoints are taken, no blocking of processes takes place and enforces a minimum-number of processes to take checkpoints. Our algorithm imposes low memory and computation overheads on MH's and low communication overheads on wireless channels. It avoids awakening of an MH if it is not required to take its checkpoint and has reduced latency time as each process involved in a global checkpoint can forward its own decision directly to the checkpoint initiator.

High Performance Computing (HPC) systems are employed to solve hard problems and rely on parallel algorithms which present very long execution times - up to several days. These systems are expensive in terms of the computational resources required, including energy consumption. Thus, after failures occur it is highly desirable to loose as little of the work that has already been done as possible. In this work we present an Algorithm-Based Fault Tolerance (ABFT) strategy that can be applied to make a robust version of any hypercube-based parallel algorithm. Note that we do not assume a physical hypercube: after nodes crash, fault-free nodes autonomously adapt themselves according to a logical topology called VCube, preserving several logarithmic properties. The proposed strategy guarantees that the algorithm does not halt even after up to (N - 1) nodes crash, in a system of N nodes. We use parallel sorting as a case study, describing how to make a fault-tolerant version of the Bitonic Sort parallel algorithm. The algorithm was implemented in MPI using ULMF to handle faults. Experimental results are presented showing the performance and robustness of the proposed solution.