Performance analysis of parallel hash join algorithms on a distributed shared memory machine implementation and evaluation on HP exemplar SPP 1600

Distributed shared memory (DSM) systems allow programmers to use a shared memory programming model on distributed systems. However, DSM systems present new challenges to performance evaluation and debugging. While programmers write programs with a shared memory model using shared variables and shared memory synchronization primitives to coordinate processes, most performance problems arise from the implementation of these abstractions with messages. Because the DSM abstraction hides the underlying message passing, it is difficult to identify the sources of performance problems. We have developed an instrumentation system and performance evaluation techniques for DSM systems that correlate message passing behavior in the lower levels of a DSM system with the higher-level shared memory programming abstractions. We have developed a prototype tool called Xunify to demonstrate the feasibility of such an approach. Xunify provides graphical animations of DSM programs at three distinct levels and offers a powerful event filtering facility capable to help show system behavior corresponding to specific DSM constructs.

High speed networks and rapidly improving microprocessor performance make the network of workstations an extremely important tool for parallel computing in order to speedup the execution of scientific applications. Shared memory is an attractive programming model for designing parallel and distributed applications, where the programmer can focus on algorithmic development rather than data partition and communication. Based on this important characteristic, the design of systems to provide the shared memory abstraction on physically distributed memory machines has been developed, known as Distributed Shared Memory (DSM). DSM is built using specific software to combine a number of computer hardware resources into one computing environment. Such an environment not only provides an easy way to execute parallel applications, but also combines available computational resources with the purpose of speeding up execution of these applications. DSM systems need to maintain data consistency in memory, which usually leads to communication overhead. Therefore, there exists a number of strategies that can be used to overcome this overhead issue and improve overall performance. Strategies as prefetching have been proven to show great performance in DSM systems, since they can reduce data access communication latencies from remote nodes. On the other hand, these strategies also transfer unnecessary prefetching pages to remote nodes. In this research paper, we focus on the access pattern during execution of a parallel application, and then analyze the data type and behavior of parallel applications. We propose an adaptive data classification scheme to improve prefetching strategy with the goal to improve overall performance. Adaptive data classification scheme classifies data according to the accessing sequence of pages, so that the home node uses past history access patterns of remote nodes to decide whether it needs to transfer related pages to remote nodes. From experimental results, we can observe that our proposed method can increase the accuracy of data access in effective prefetch strategy by reducing the number of page faults and misprefetching. Experimental results using our proposed classification scheme show a performance improvement of about 9---25% over the same benchmark applications running on top of an original JIAJIA DSM system.

Coordinating mobile robots are widely used in commercial and industrial settings to fulfill various tasks. However, to program the coordination among mobile robots is challenging. A coordination framework is needed to shield the programmer from handling low-level details of robot control and communication, while supporting flexible and cost-effective coordination at the same time. The coordination framework should also be able to well coexist with the underlying robot control. To this end, we propose the Coordination-enabled Behavior-Based Robotics (CBBR) framework. CBBR employs Distributed Shared Memory (DSM) to support coordination. The shared memory illusion built by the DSM greatly simplifies the coordination logic. Moreover, the flexible access patterns of the DSM and the rich consistency semantics of the DSM reads and writes enable flexible and cost-effective coordination. With the coordination support from the DSM, CBBR naturally extends the classical Behavior-Based Robotics (BBR) for robot control. From the perspective of robot control using BBR, the shared variables in the DSM act as the logical sensors capturing the status of coordination. The coordination algorithms are encapsulated into coordination behaviors. Thus, the physical environment status and the coordination status may trigger the physical and the coordination behaviors. The scheduling of both types of behaviors integrates coordination into robot control. We conduct a case study to demonstrate the use of CBBR. The performance measurements show the cost-effectiveness of coordinating mobile robots based on CBBR, in terms of time, space, and energy consumption.

Shared memory is widely used for inter-process communication. The shared memory abstraction allows computation to be decoupled from communication, which offers benefits, including portability and ease of programming. To enable shared memory access by processes that are on different machines, distributed shared memory (DSM) can be employed. However, DSM systems can suffer from thrashing: while different processes update certain hot data items, the largest amount of effort is spent on data synchronization, and little progress is made by each process. To avoid interference between processes during data updating while providing shared memory at page granularity, more time is reserved for a writer to hold a page in a traditional manner. In this paper, we report on complex thrashing, which can explain why extending the time of holding a page might not be sufficient to control thrashing. To increase the throughput, we propose a thrashing control mechanism that allows each process to update a set of pages during a period of time, where the pages compose a logical area. Because of the isolation of areas, updates on different areas can be performed concurrently. To allow the areas to be fairly well used, each process is assigned with a random priority for thrashing control. The thrashing control mechanism is implemented on a Linux-based DSM system. Performance results show that the execution time of the applications that are apt to cause system thrashing can be significantly reduced by our approach.

The emergence of chip multiprocessors is leading to rapid advances in hardware and software systems to provide distributed shared memory (DSM) programming models, so-called DSM systems. A DSM system provides programming advantages within a scalable and cost-effective hardware solution. This benefit derives from the fact that a DSM system creates a shared-memory abstraction on top of a distributed-memory machine by caching data replicas locally. In this respect, a coherence protocol is a vital component responsible for assuring data consistency across all replicas. The design of coherence protocols impacts a DSM system in terms of both performance and accuracy. Performance is often measured via simulation and various verification techniques have been proposed to deal with protocol accuracy. Nevertheless, integrating accuracy verification into a DSM cluster simulation to ensure correct simulation results is still an open issue. In this paper, we address three properties of a coherence protocol (safety, liveness, and inclusion) without which errors may occur in the simulation results. We propose a specification-based parameter—model interaction (SPMI) technique to detect these cases in a particular DSM cluster simulator called DSiMCluster. Our experimental results demonstrate that with SPMI, DSiMCluster can ensure the coherence protocol properties and provides a correct reflection of memory characteristics in shared-memory and DSM multiprocessors.

Nowadays clusters are one of the most used platforms in High Performance Computing and most programmers use the Message Passing Interface (MPI) library to program their applications in these distributed platforms getting their maximum performance, although it is a complex task. On the other side, OpenMP has been established as the de facto standard to program applications on shared memory platforms because it is easy to use and obtains good performance without too much effort. So, could it be possible to join both worlds? Could programmers use the easiness of OpenMP in distributed platforms? A lot of researchers think so. And one of the developed ideas is the distributed shared memory (DSM), a software layer on top of a distributed platform giving an abstract shared memory view to the applications. Even though it seems a good solution it also has some inconveniences. The memory coherence between the nodes in the platform is difficult to maintain (complex management, scalability issues, high overhead and others) and the latency of the remote-memory accesses which can be orders of magnitude greater than on a shared bus due to the interconnection network. Therefore this research improves the performance of OpenMP applications being executed on distributed memory platforms using a DSM with sequential consistency evaluating thoroughly the results from the NAS parallel benchmarks. The vast majority of designed DSMs use a relaxed consistency model because it avoids some major problems in the area. In contrast, we use a sequential consistency model because we think that showing these potential problems that otherwise are hidden may allow the finding of some solutions and, therefore, apply them to both models. The main idea behind this work is that both runtimes, the OpenMP and the DSM layer, should cooperate to achieve good performance, otherwise they interfere one each other trashing the final performance of applications. We develop three different contributions to improve the performance of these applications: (a) a technique to avoid false sharing at runtime, (b) a technique to mimic the MPI behaviour, where produced data is forwarded to their consumers and, finally, (c) a mechanism to avoid the network congestion due to the DSM coherence messages. The NAS Parallel Benchmarks are used to test the contributions. The results of this work shows that the false-sharing problem is a relative problem depending on each application. Another result is the importance to move the data flow outside of the critical path and to use techniques that forwards data as early as possible, similar to MPI, benefits the final application performance. Additionally, this data movement is usually concentrated at single points and affects the application performance due to the limited bandwidth of the network. Therefore it is necessary to provide mechanisms that allows the distribution of this data through the computation time using an otherwise idle network. Finally, results shows that the proposed contributions improve the performance of OpenMP applications on this kind of environments.

In this paper, we describe an implementation of a software Distributed Shared Memory (DSM) over Virtual Interface Architecture (VIA) for a Linux-based cluster of PCs and evaluate its performance. VIA is a user-level memory-mapped communication model that provides zero-copy communication and low-overhead by excluding the operating system kernel from the communication path. To our best knowledge, our implementation is the first software DSM protocol on VIA. The DSM protocol we have implemented on VIA is Home-based Lazy Release Consistency (HLRC) that previous studies have shown to exhibit good scalability by reducing the number of messages and memory overhead compared to the homeless counterpart. The experimental results obtained on seven Splash-2 applications show that VIA can be successfully used to support software shared memory on clusters of PCs. The paper is accompanied by a source-code distribution of the software DSM protocol for Linux/VIA clusters.

Distributed Shared Memory (DSM) systems have gained popular acceptance by combining the scalability and low cost of distributed system with the ease of use of single address space. Many new hardware DSM and software DSM systems have been proposed in recent years. In general, benchmarking is widely used to demonstrate the performance advantages of new systems. However, the common method used to summarize the measured results is the arithmetic mean of ratios, which is incorrect in some cases. Furthermore, many published papers list a lot of data only, and do not summarize them effectively, which confuse users greatly. In fact, many users want to get a single number as conclusion, which is not provided in old summarizing techniques. Therefore, a new data-summarizing technique based on confidence interval is proposed in this paper. The new technique includes two data-summarizing methods: (1) paired confidence interval method; (2) unpaired confidence interval method. With this new technique, it is concluded that at some confidence one system is better than others. Four examples are shown to demonstrate the advantages of this new technique. Furthermore, with the help of confidence level, it is proposed to standardize the benchmarks used for evaluating DSM systems so that a convincing result can be got. In addition, the new summarizing technique fits not only for evaluating DSM systems, but also for evaluating other systems, such as memory system and communication systems.

Summary form only given. Many researchers use a home-based lazy release consistent protocol (HLRC) to provide a simple, effective, and scalable way to build software distributed shared memory (DSM) systems. However, the performance of HLRC is notoriously sensitive to the initial page distribution among home nodes. We propose an adaptive HLRC protocol in which the home page designation is able to change according to the observed application sharing pattern. Our system differs from HLRC and other adaptive derivatives in the following respects. First, the number of home nodes for each shared page can be varied, as opposed to having only a single home node. Second, we use prediction in a novel way to dynamically change the the location of home nodes according to different memory access patterns. The home node of each shared page is able to propagate, perish, and migrate. An online home predictor determine whether or not the current node should remain a home node or drop from the current set of home nodes for a given page. Finally, all decisions concerning home node group membership are made locally, eliminating the costly global decision-making communication present in many other systems. Performance evaluations using six well-known DSM benchmarks show that our adaptive protocol outperforms conventional HLRC by up to 60%.

Message Passing (MP) and Distributed Shared Memory (DSM) are the two most common approaches to distributed parallel computing. MP is difficult to use, whereas DSM is not scalable. Performance scalability and ease of programming can be achieved at the same time by using navigational programming (NavP). This approach combines the advantages of MP and DSM, and it balances convenience and flexibility. Similar to MP, NavP suggests to its programmers the principle of pivot-computes and hence is efficient and scalable. Like DSM, NavP supports incremental parallelization and shared variable programming and is therefore easy to use. The implementation and performance analysis of real-world algorithms, namely parallel Jacobi iteration and parallel Cholesky factorization, presented in this paper supports the claim that the NavP approach is better suited for general-purpose parallel distributed programming than either MP or DSM.

The management of memory coherence is an important problem in distributed shared memory (DSM) system. In a cache-based coherence DSM system using linked list structure, the key to maintaining the coherence and improving system performance is how to manage the owner in the linked list. This paper presents the design of a new management protocol—NONH (New-Owner New-Head) and its performance evaluation. The analysis results show that this protocol can improve the scalability and performence of a coherent DSM system using linked list It is also suitable for managing the cache coherency in tree-like hierarchical architecture.

Some aspects of research into distributed shared memory (DSM) systems which concern reliability are presented. The research is concerned with applications that use shared memory in single-site systems, and their extension to operation in a distributed environment. A DSM system consists of a shared address space that is accessed by logical operations. In the author's model processes create shared memory by using a segment; the segment's size, name, and access protection are defined when the memory is created. Processes locate and attach the segment into their virtual memory address space by name. When a process is finished with the segment, it may be detached. The last detach of a segment destroys the data. The shared portion of a process's address space is partitioned into data pages, which are replicated. System implementation, distributed architecture, and issues affecting DSM reliability are discussed. >

It is well known that contention is one of the factors that limit the performance of high performance parallel computing systems that implement distributed shared memory (DSM). On cache-coherent DSM multiprocessors, one of the most intrusive forms of contention is the one that occurs at the network interface of a node, due to simultaneous requests for remote memory accesses. This thesis focuses on the issue of resolving remote memory access contention on hardware DSM systems, and on the performance impact of implementing contention resolution algorithms. The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth, fiber-optic interconnection network supporting DSM with a unique feature that every processor is connected to the other processor through a dedicated output channel. The thesis presents simple but effective contention resolution algorithms that rely on the information of average channel utilization, average channel waiting time, number of messages in the channel queue or short-term average channel waiting time reported by each node, and uses simulation to examine the performance of the algorithms on the SOMEBus multiprocessor. The algorithms detect potential hot spots and resolve contention using dynamic block migration, which is a novel approach for migrating home nodes on a block-level basis and balancing remote memory accesses across the nodes of the system. The algorithms require minimal support from the operating system and all the necessary message transactions happen on the hardware level. Experiments with eight parallel codes on a 64-processor SOME-Bus show that algorithms yield significant performance improvements such as reduction in the execution times, number of remote memory accesses, average channel waiting times and average network latencies. Modified contention resolution algorithms are developed with the addition of data acknowledge message multicasting. Application of the modified algorithms yields more performance improvements in some codes. Architectural enhancements to the network interface and directory of the SOME-Bus multiprocessor to support the contention resolution algorithms are also presented.

Two most commonly used classifications of reference locality are: temporal locality and spatial locality. This paper introduces a new class of reference locality, called Regional Locality, which is the program behavior that a set of addresses which are accessed in one critical or non-critical region will be very likely accessed as a whole in the same critical region or other non-critical regions. We proposed three updates propagation protocols based on Regional Locality in Distributed Shared Memory systems. These protocols include: Selective Lazy/Eager Updates Propagation protocol, First Hit Updates Propagation protocol, and Second Hit Updates Propagation protocol. Our experimental results indicate that Regional Locality exists in executions of many Distributed Shared Memory concurrent programs. We have shown that the proposed protocols outperform the existing updates propagation protocols based on temporal locality. Exploring Regional Locality in other shared memory systems would be an interesting future research direction

Investigates the distributed shared virtual memory (DSVM) technique in a distributed diskless PC cluster system environment. By integrating distributed shared memory (DSM) and virtual memory functions, the DSVM model not only supports the sharing of process space but also provides the sharing of system-supported space (e.g. swapping area). DSVM controllers are handlers in a diskless PC cluster system whose responsibility is to control the operations of DSM and to handle the sharing when the local physical memory needs to do page/process swap-in and out. This paper presents the model, describes the requirements and how the model supports the diskless PC in a diskless PC cluster system, discusses several design issues, and narrates prototype implementation details and considerations. The developed primitives of this prototype are the base of a complete DSVM mechanism and process migration. Integrating the two mechanisms will promote the system to be a powerful group computing platform.