Performance and granularity control in the SPaDES parallel simulation system

Fine-Grained Parallel and Distributed Spatial Stochastic Simulation of Biological Reactions

One of the major overheads that prohibits the wide spread deployment of parallel discrete event simulation (PDES) is the need to synchronize the distributed processes in the simulation. Considerable investigations have been conducted to analyze and optimize the two widely used synchronization strategies, namely the conservative and the optimistic simulation paradigms. However, little attention has been focussed on the definition and strictness of causality. Does causality need to be preserved in all types of simulations? Previously, we had suggested an answer to this question. We had argued that significant performance gains can be achieved by reconsidering this definition to decide if the parallel simulation really needs to subscribe to the preservation of causality. In this paper, we investigate this issue even more closely. An in depth analysis using several example simulation models is presented in this paper. In addition, a comparative analysis between unsynchronized and Time Warp simulation is presented.

As network simulations scale to hundreds of thousands of nodes, parallel discrete event simulation (PDES) has become indispensable for sustaining performance—yet its efficacy hinges on frequent time synchronization steps. Existing synchronization algorithms suffer from the inter-machine communication overhead in distributed environments, eroding the benefits of parallelism. We observe that time synchronization in PDES often involves frequent allreduce operations, and that in-network computing has the potential to substantially accelerate such collectives. In this work, we present SINA (Synchronization using In-Network Allreduce)—the first integration of in-network computing into time synchronization to address the demands of large-scale simulations. We implemented SINA in a testbed with Mellanox SHArP-enabled switches and ConnectX-5 network cards, offloading allreduce to the network hardware while preserving software‑level correctness. Our evaluation shows that SINA achieves up to 88.6% acceleration compared to state‑of‑the‑art methods and achieves up to 67.5% optimization in topologies of tens of thousands of nodes, demonstrating its suitability for high‑performance, large‑scale parallel simulations.

Cycle-based simulation at register-transfer- and gate level realized by a Levelized Compiled Code (LCC) technique represents a well established method for functional verification in processor design. Due to rapidly increasing design sizes, simulation acceleration is an important issue. We present a parallel LCC simulation system that has been developed to run on loosely-coupled systems. It comprises three parallel simulators and a complex model partitioning environment. An essential idea of our parallelization approach is to valuate circuit model partitions with respect to the expected parallel simulation run-time and to integrate corresponding cost functions into partitioning algorithms. This is done on the basis of a formal model of parallel LCC simulation. In this paper, we focus on the strong relation between model partitioning and the parallel simulation technique chosen. The components of the simulation system are outlined and experimental results with respect to simulation acceleration are given for IBM processor models of different size.

In recent years, transaction level modeling (TLM) has enabled designers to simulate complex embedded systems and SoCs, orders of magnitude faster than simulation at the RTL. The increasing complexity of the systems on one hand, and availability of low cost parallel processing resources on the other hand have motivated the development of parallel simulation environments for TLMs. The existing simulation environments used for parallel simulation of TLMs are intended for general discrete event models and do not take advantage of the specific properties of TLMs. The fine-grain synchronization and communication between simulators in these environments can become a major impediment to the efficiency of the simulation environment. In this work, we exploit the properties of temporally decoupled TLMs to increase the efficiency of parallel simulation. Our approach does not require a special simulation kernel. We have implemented a parallel TLM simulation framework based on the publicly available OSCI SystemC simulator. The framework is based on the communication interfaces proposed in the recent OSCI TLM 2 standard. Our experimental results show the reduced synchronization overhead and improved simulation performance.

Discrete Event Simulation (DES) is a widely used technique in which the state of the simulator is updated by events happening at discrete points in time (hence the name). DES is used to model and analyze many kinds of systems, including computer architectures, communication networks, street traffic, and others. Parallel and Distributed Simulation (PADS) aims at improving the efficiency of DES by partitioning the simulation model across multiple processing elements, in order to enabling larger and/or more detailed studies to be carried out. The interest on PADS is increasing since the widespread availability of multicore processors and affordable high performance computing clusters. However, designing parallel simulation models requires considerable expertise, the result being that PADS techniques are not as widespread as they could be. In this paper we describe ErlangTW, a parallel simulation middleware based on the Time Warp synchronization protocol. ErlangTW is entirely written in Erlang, a concurrent, functional programming language specifically targeted at building distributed systems. We argue that writing parallel simulation models in Erlang is considerably easier than using conventional programming languages. Moreover, ErlangTW allows simulation models to be executed either on single-core, multicore and distributed computing architectures. We describe the design and prototype implementation of ErlangTW, and report some preliminary performance results on multicore and distributed architectures using the well known PHOLD benchmark.

Research in parallel simulation has been around for more than two decades. However, the number of papers reporting on its application to real world problems is limited. At the 2002 PADS conference, researchers discussed the need to go beyond synchronization and performance issues, and, in particular, to demonstrate that parallel simulation could be used in real world applications outside military and network simulations. Since then, we have seen an increase in the number of papers on the parallel simulation applications in areas such as operations management and the physical sciences. This paper advocates the application of parallel simulation in population dynamics which is often used as the basis for policy planning and analysis. In this paper, we show how the simulation model is implemented using the μsik parallel simulation library. We conduct some experiments to measure the simulation performance. The result shows that good event parallelism can be achieved. 1

Null message algorithm (NMA) is one of the efficient conservative time management algorithms that use null messages to provide synchronization between the logical processes (LPs) in a parallel discrete event simulation (PDES) system. However, the performance of a PDES system could be severely degraded if a large number of null messages need to be generated by LPs to avoid deadlock. In this paper, we present a mathematical model based on the quantitative criteria specified in (Rizvi et al., 2006) to optimize the performance of NMA by reducing the null message traffic. Moreover, the proposed mathematical model can be used to approximate the optimal values of some critical parameters such as frequency of transmission, Lookahead (L) values, and the variance of null message elimination. In addition, the performance analysis of the proposed mathematical model incorporates both uniform and non-uniform distribution of L values across multiple output lines of an LP. Our simulation and numerical analysis suggest that an optimal NMA offers better scalability in PDES system if it is used with the proper selection of critical parameters.

To develop a parallel discrete-event simulation from scratch requires in-depth knowledge of the mapping process from the physical model to the simulation model, and also a substantial effort in coping with the numerous issues concerning the underlying synchronization protocols in use. Languages and libraries could reduce the devel opment effort significantly by providing the user with a pre-built parallel simulation kernel as well as application development tools. This pa per contains a survey of the existing languages and libraries for parallel discrete-event simula tion. It is divided into two major sections: one on the languages, the other on the libraries. The discussions are mainly focused on the following aspects: user model, programming framework and language features, library API, protocols, and system support and environment. The re ported performances of some packages are also summarized.

Parallel Discrete Event simulation (PDEs) is an important technology for studying large-scale complex systems[1]. And there are some problems in the present PDEs modeling, such as poor intuitiveness, low efficiency, difficulty in expansion and reuse, insufficient support of modeling environment for model checking, difficulty in model checking and so on. For these problems, a parallel discrete event simulation modeling method, named Object Class Interaction Graph(OCIG), based on basic event graph and object-oriented thinking is proposed. It has the natural and simple advantages of event graph modeling for discrete event simulation, and it can well meet the requirements of scalable, easy assembly, and layered parallelism for parallel discrete event simulation applications. The article also uses the set theory to formally define it, laying the foundation for the subsequent formal checking of the model [2].

Parallel discrete event simulation (PDES) is an important application in use in many DoD projects; for example, PDES is used in large-scale war-gaming, and in complex system design, analysis and verification. Improving PDES performance and capacity allows faster simulation times and more extensive analysis of more detailed models. These benefits are not application-specific: they should reflect to any application that uses the improved simulation kernel. In this work, we overview our efforts for optimizing PDES in a heterogeneous high performance computing (HHPC) environment. We profile the SPEEDES simulator and identify several opportunities. We report on our experiences on two fronts: (1) optimizing the communication subsystem - a critical system for PDES since it is a fine-grained application and (2) exploring the use of augmented FPGA boards to accelerate simulation. While such approaches have been attempted for sequential and data path intensive applications, we believe that their use in clustered environments is novel. Both efforts are works in progress; we present our designs and some preliminary analysis results. For example, removing the centralized communication server from event message exchange path with a number of other small improvements to the simulation cycle, improved performance by an average of 20% performance improvement for one of our large benchmarks.

Parallel discrete event simulation (PDES) decreases a simulation's runtime by splitting the simulation's work between multiple processors. Many users avoid PDES because it is difficult to specify a large and complicated model using existing PDES tools. In this paper we describe how the PARASOL PDES system uses migrating user level threads to support the process interaction world view. The process interaction world view is popular in sequential simulation languages and is a major departure from the logical process view supported by most PDES systems.

In this paper, the relationship between the computational models of object-oriented rewriting and parallel discrete-event simulation models is explored. A discrete-event simulation program in which several objects interact with each other by exchanging messages may have a high degree of concurrency (which can be exploited using optimistic or conservative parallel simulation methods). We report on some observations on using rewriting logic in the field of parallel discrete event simulations, and investigate how parallel simulation applications can be expressed using object-oriented rewriting.

Parallel simulation has been an active research area for more than a decade, and several parallel simulation algorithms have been proposed. To evaluate parallel simulation environments, there is a need for a common benchmark suite. Such benchmarks should allow the designer of simulation kernels to: (i) evaluate how efficiently the simulation kernel runs on specific architectures; and (ii) evaluate how simulation problems scale on the kernel. A vast majority of benchmarks suggested in the literature focus on the latter problem. The first requirement is however equally important, as such benchmarks are needed to implement efficient simulation systems. In this report, we advocate an incremental benchmark methodology which is primarily intended for performance tuning. The benchmark suite is based on a small set of ping models with which it is possible to effectively isolate and estimate various overheads, contention and latencies encountered in simulation kernels. The use of the benchmark suite is illustrated by its application to performance tuning and evaluation of a time warp kernel.

The large size and complexity of the modern digital hardware impose great challenges to design and validation. Hardware Description Languages (HDLs) and System-Level Description Languages (SLDLs) rely on sequential discrete event semantics. Parallel Discrete Event Simulation (PDES) has recently gained extensive attention for parallelizing these languages due to the ever-increasing complexity of embedded and cyber physical systems. However, PDES application has not yet reached acceptable maturity and pervasiveness for accelerating computer architecture problems. This is due to inherent complexity of hardware components that require using different advanced PDES techniques. In this paper, we look at the main problem from a radically different angle. First, we suppose there is only a single universal discrete event model of computation for simulation purely defined by distributed optimistic PDES, i.e., logical-process-based event scheduling worldview. Second, we construct a new parallel system-level simulation language called OSML for ESL. Third, we propose a unified Cloud-based CAD tool called Troodon to automatically parallelize existing hardware languages atop OSML. To the best of our knowledge, OSML is the first work on optimistic synchronization applied to hardware-specific SLDLs and hardware models at different levels of abstraction in ESL, which contain complex data structures by proposing a hybrid checkpointing scheme.