Photolithography simulation on nonplanar substrate using the finite-element method with absorbing boundary conditions

Improvements in the final uniformity of masks can be shrouded by error contributions from many sources. The final Global CD Uniformity (GCDU) of a mask is degraded by individual contributions of the writing tool, the Post Applied Bake (PAB), the Post Exposure Bake (PEB), the Develop sequence and the Etch step. Final global uniformity will improve by isolating and minimizing the variability of the PEB and Develop. We achieved this decoupling of the PEB and Develop process from the whole process stream by using “dark loss” which is the loss of unexposed resist during the develop process. We confirmed a correspondence between Angstroms of dark loss and nanometer sized deviations in the chrome CD. A plate with a distinctive dark loss pattern was related to a nearly identical pattern in the chrome CD. This pattern was verified to have originated during the PEB process and displayed a (Final CD)/ (Dark Loss) ratio of 6 for TOK REAP200 resist. Previous papers have reported a sensitive linkage between Angstroms of dark loss and nanometers in the final uniformity of the written plate. These initial studies reported using this method to improve the PAB of resists for greater uniformity of sensitivity and contrast. Similarly, this paper demonstrates an outstanding optimization of PEB and Develop processes.

Real-time control is the trend for photoresist processing in the advanced lithography. In this paper we develop an in-situ ellipsometer integrated with a programmable thermal heating system, which could perform real-time monitoring and control for critical dimension (CD) latent image through the entire post-exposure bake (PEB) process. The inline ellipsometry measurements are fitted into an electromagnetic wave model built on the rigorous coupled-wave analysis (RCWA) theory for CD latent image characterization. Thereafter a real-time control scheme is proposed by applying the programmable thermal bake-plate. The experimental outcome demonstrates a significant improvement on the final CD result comparing to the conventional baking method.

Modeling has become indespensable tool for chemically amplified resist (CAR) evaluations. It has been used extensively to study acid diffusion and its effects on resist image formation. Several commercial and academic simulators have been developed for CAR process simulation. For commercial simulators such as PROLITH (Finle Technologies) and Solid-C (Sigma-C), the user is allowed to choose between an empirical model or a concentration dependant diffusion model. The empirical model is faster but not very accurate for 2-dimension resist simulations. In this case there is a trade off between the speed of the simulator and the accuracy of the results. An academic simulator such as STORM (U.C. Berkeley) gives the user a choice of different algorithms including Fast Imaging 2nd order finite difference algorithm and Moving Boundary finite element algorithm. A user interested in simulating the volume shrinkage and polymer stress effects during post exposure bake will need the Moving Boundary algorithm whereas a user interested in the latent image formation without polymer deformations will find the Fast Imaging algorithm more appropriate. The Fast Imaging algorithm is generally faster and requires less computer memory. This choice of algorithm presents a trade off between speed and level of detail in resist profile prediction. This paper surveys the different models and simulator algorithms available in the literature. Contributions in the field of CAR modeling including contributions to characterization of CAR exposure and post exposure bake (PEB) processes for different resist systems. Several numerical algorithms and their performances will also be discussed in this paper.

Characterization for the photomask fabrication based on a high-resolution technique with a non-chemically amplified resist and a post-exposure bake

Recent studies on dynamic temperature profiling and lithographic performance modeling of the post-exposure bake (PEB) process have demonstrated that the rate of heating and cooling may have an important influence on resist lithographic response. Measuring the transient surface temperature during the heating or cooling process with such accuracy can only be assured if the sensors embedded in or attached to the test wafer do not affect the temperature distribution in the bare wafer. In this paper we report on an experimental and analytical study to compare the transient response of embedded platinum resistance thermometer (PRT) sensors with surface-deposited, thin-film thermocouples (TFTC). The TFTCs on silicon wafers have been developed at NIST to measure wafer temperatures in other semiconductor thermal processes. Experiments are performed on a test bed built from a commercial, fab-qualified module with hot and chill plates using wafers that have been instrumented with calibrated type-E (NiCr/CuNi) TFTCs and commercial PRTs. Time constants were determined from an energy-balance analysis fitting the temperature-time derivative to the wafer temperature during the heating and cooling processes. The time constants for instrumented wafers ranged from 4.6 s to 5.1 s on heating for both the TFTC and PRT sensors, with an average difference less than 0.1 s between the TFTCs and PRTs and slightly greater differences on cooling.

Physically-based photoresist models, such as those in PROLITH, have been very successful in describing photolithography from a continuum standpoint. These models allow engineers to accurately predict the final resist CD on the wafer and to analyze process robustness, such as calculation of focus-exposure process windows. However, as feature sizes continue to shrink, we are beginning to see yield-limiting phenomena that are due to the molecular nature of photoresist materials. One example of this is line-edge roughness (LER). LER is believed to be due to fluctuations during the exposure process (shot noise) and post-exposure bake (thermal diffusion and reaction). We present a model that explicitly takes into account the molecular nature of the photoresist during the exposure and post-exposure bake processes. We do this by writing a master equation that describes the probability that acid molecules are generated during exposure, and then describes the evolution of the acid, quencher, and blocking-group probability distributions during the bake process. We show how all the parameters in this model can be simply derived from the parameters in a calibrated PROLITH continuum model. Finally, we demonstrate prediction of LER from an accurately tuned PROLITH continuum model and compare the LER predictions with experimental results.

We simulated the process parameters of a pattern formation reaction that included during-the-exposure and post exposure bake (PEB) processes using an originally developed simulator. From the simulation results, the relationship between process parameters of pattern formation reaction and quencher concentration has been clarified. Moreover, we simulated the present target process parameters of extreme ultraviolet (EUV) resist for breaking the RLS trade-off. In this simulation, the process parameters were calculated from lithographic results (sensitivity, LWR, and CD) using real SEM images. This methodology was used to determine the process parameters required to break the RLS trade-off to obtain the required lithographic target of the EUV resist. We simulated the present lithography performance target using the process parameters of pattern formation reactions. These simulation results showed that a large reaction radius is necessary to break the RLS trade-off. Furthermore, we confirmed that increasing the PEB temperature leads to an improvement in the reaction radius. However, there is a discrepancy between the target radius and the controllable range of reaction radius that can be obtained by varying the PEB temperature.

Post exposure bake (PEB) Diffusion effect is one of the most difficult issues in modeling chemically amplified resists. These model equations result in a system of nonlinear partial differential equations describing the time rate of change reaction and diffusion. Verifying such models are difficult, so numerical simulations are needed to solve the model equations. In this paper, we propose a high speed 3D resist image simulation algorithm based on a novel method to solve the PEB Diffusion equation. Our major discovery is that the matrix formulation of the diffusion equation under the Crank– Nicolson scheme can be derived into a special form, AX+XB=C, where the X matrix is a 3D resist image after diffusion effect, A and B matrices contain the diffusion coefficients and the space relationship between directions x, y and z. These matrices are sparse, symmetric and diagonal dominant. The C matrix is the last time-step resist image. The Sylvester equation can be reduced to another form as (<i>I</i>&otimes;<i>A</i> + <i>B</i>^<i>T</i>&otimes;<i>I</i>) X =C, in which the operator &otimes; is the Kronecker product notation. Compared with a traditional convolution method, our method is more useful in a way that boundary conditions can be more flexible. From our experimental results, we see that the error of the convolution method can be as high as 30% at borders of the design pattern. Furthermore, since the PEB temperature may not be uniform at multi-zone PEB, the convolution method might not be directly applicable in this scenario. Our method is about 20 times faster than the convolution method for a single time step (2 seconds) as illustrated in the attached figure. To simulate 50 seconds of the flexible PEB diffusion process, our method only takes 210 seconds with a convolution set up for a 1240&times;1240 working area. We use the typical 45nm immersion lithography in our work. The exposure wavelength is set to 193nm; the NA is 1.3775; and the diffusion coefficient is 1.455×10^-17m²/s at PEB temperature 150&deg;C along with PEB time 50 seconds with image resolution setup to be 1240&times;1240.

Nanoimprint lithography (NIL) is the preferred technique for next-generation nanometer-scale patterning because of its cost effectiveness and simplicity when compared to conventional technology. The replicated pattern depends on the mold pattern, hence efficient methods for fabricating the fine mold are critically required and have recently become intensive subjects of research. This study reports a new method for the fabrication of a fine mold: this method uses low-acceleration-voltage (4kV) electron beam lithography with spin on glass (SOG), which is used as a positive-tone inorganic resist. Although our SOG process does not contain chemically amplified material, postexposure bake (PEB) was characteristically used in the authors’ process. The PEB process caused the annealing effect for the SOG and also suppressed the proximity effect. Consequently, a line-and-space pattern nanoimprint mold with a sub-50nm spacing was fabricated at 4kV using their process, and ultraviolet NIL was successfully carried out using the fabricated mold.

Extreme ultra-violet lithography (EUVL) has been prepared for next generation lithography for several years. We could get sub-22 nm line and space (L/S) pattern using EUVL, but there are still some problems such as roughness, sensitivity, and resolution. According to 2007 ITRS roadmap, line edge roughness (LER) has to be below 1.9 nm to get a 22 nm node, but it is too difficult to control line width roughness (LWR) because line width is determined by not only the post exposure bake (PEB) time, temperature and acid diffusion length, but also the component and size of the resist. A new method is suggested to reduce the roughness. The surface roughness can be smoothed by applying the resist reflow process (RRP) for the developed resist. We made resist profile which has surface roughness by applying exposure, PEB and development process for line and space pattern. The surface roughness is calculated by changing parameters such as the protected ratio of resin. The PEB time is also varied. We compared difference between 1:1 L/S and 1:3 L/S pattern for 22 nm. Developed resist baked above the glass transition temperature will flow and the surface will be smoothed. As a result, LER and LWR will be much smaller after RRP. The result shows that the decreasing ratio of LER due to RRP is larger when initial LER is large. We believe that current ~ 5 nm LWR can be smoothed to ~ 1 nm by using RRP after develop.

. Pattern design transfer is the most crucial step in fabrication. Even a small mistake in fabrication can result in device damage or poor performance. To ensure the device performs perfectly, exact design and dimension pattern should be perfectly transferred onto wafer substrate. In this paper, optimization of conventional photolithography process of 0.98μm gap design for micro gap biosensor application is presented. The micro gap pattern on chrome mask is used and the effect of coating profile, UV light, and Post Exposure Bake (PEB) process are investigated. The conventional photolithography process (using a micro gap mask) starts after the silicon oxide, polysilicon and aluminium have been deposited on top of the substrate. Each set of experiment conducted by pairing the element investigated coating profile, UV light, and PEB, with the normal specification of photolithography process. It was observed that 0.98μm gap size can be achieved by choosing suitable process parameters i.e. thickness of coating profile, time and temperature used for UV light and PEB.

A next reticle format is considered from a view point of photomask fabrication process. In order to determine optimal reticle thickness corresponding to 230 mm size, processes feasibility for the thickness are examined. Cr dry etching is studied in terms of plasma condition and patterning accuracy. It is found that Cr dry etching with accurate critical dimension (CD) control is possible with substrate as thick as 12.7 mm. Post exposure bake (PEB) process for chemically amplified (CA) resists is also examined in terms of CD uniformity on substrates. Relationship of substrate thickness and CD uniformity is estimated with PEB controllability and CA resists characteristics. In addition to this, it is demonstrated that actual temperature uniformity for substrate with a thickness of 9 mm is equivalent to that for a present thickness of 6.35 mm. From these results in overall, it is proposed that substrate thickness of 9 mm is feasible for actual photomask production.

Progress towards 65 nm next-generation lithography requires unprecedented global CD uniformity, with the actual ITRS 2002 roadmap proposing 4.2 nm 3/spl sigma/ (dense lines) for 65 nm binary masks. Since resolution requirements are satisfied only by using chemically amplified resists (CARs), exposure and post-exposure bake (PEB) are key processes to successful mask making, both introducing global CD errors. Develop and etch processes potentially contribute further global CD errors. The global CD uniformity can be improved significantly by adaptive PEB, especially for CARs showing moderate to strong PEB sensitivity, like NEB22. With the 25-zone hotplate of the APB5500 bake system, facilitated through a novel calibration mask with 25 equidistant temperature sensors within the resist plane, an appropriate temperature profile can be applied during PEB. This temperature profile is automatically calculated by an adaptive optimization algorithm, based on 2-dimensional spline fitting of a CD measurement. A CD-uniformity improvement (dense lines) from 4.8 nm 3/spl sigma/ to 3.9 nm 3/spl sigma/ (/spl cong/20%) on a state-of-the-art production mask is achieved for the chrome layer (ASI, after strip inspection).

Iii previous work by Sturtevant et al [1994] it was shown how the use of scatterometry data obtained in real time during the post-expose bake (PEB) step of the photolithography process can improve critical dimension (CD) control. However, it is not obvious that the ad hoc methodology utilized during these experiments conducted at IBM, is the best way to use this valuable information. This paper focuses on the development of more rigorous methods that can incorporate scatterometry data in on-line prediction of the bake time necessary to achieve the target CD. First, a brief description of the system and required tools is given. Then, a model that can relate the measured intensity and the time the wafer has been baked (referred to hereafter as the bake time) is introduced. Then, two theoretical methods that can utilize this model to calculate the bake end point are described. Finally, these two methods are applied to the analysis ofadditional data collected at IBM and operation oftbe complete end point control system is emulated to the extent that is possible. Keywords: end-point detection, process control, deep-UV lithography, scatterometry, post-exposure bake process

The second level exposure of Alternating Phase Shift Mask has to be accomplished by e-beam lithography. However, e-beam writing on structured open chrome layers may induce severe charging and yields to deteriorate overlay accuracy. In case of charging problems, applying of conductive top coats on resists help to reduce the distortion of the second layer. ESPACER makes the conductive layer on the e-beam resist and prevent a positioning error during e-beam writing by its shield effect. However, ESPACER required removal of its topcoat before post-exposure bake (PEB) because of the undesirable effect to the resist, due to the acid diffusion from the ESPACER film to high sensitive Chemical Amplified Resists (CARs). Our investigations were focused on the combination of the representative positive tone CAR: FUJIFILM ELECTRONIC MATERIALS CO., LTD and the new-type ESPACER called ESPACER 300F. ESPACER 300F was possible to use the PEB process before its removal, improved by exchanging a lower mobility surfactant than before. This material also had a good wettability, a low resist-thickness losses and kept good pattern shapes of the resist. Additionally, ESPACER 300F have little influence in both overlay accuracy at the variety of pattern density and sensitivity of the resist, therefore it would be the good material for making reticles for 65nm node and beyond.