Polymers in RF and millimeter-wave applications

This chapter presents an overview of silicon-on-insulator (SOI) technology for radio-frequency (RF) and millimeter-wave telecommunication applications. The SOI technology took the RF world by storm in the past decade. The partially depleted (PD) 45 nm RF-SOI process from GlobalFoundries has demonstrated its strong potential for RF and millimeter-wave circuits. The high-volume production capabilities offered by the silicon industry have motivated the development of RF PD-SOI and fully depleted-SOI nodes, which are demonstrating their potential for all kinds of RF and millimeter-wave functional blocks toward full SOI finite element method (FEM) integration. The increased complexity and technological trends of FEMs are discussed. Finally, a review is performed to reveal the position of SOI for key RF and millimeter-wave circuits. The PD-SOI transistor is then a four-terminal device. The trap rich-SOI wafer technology was developed to tackle this particular parasitic surface conduction problem and has been widely adopted for high-quality RF-SOI applications.

Solid-state complexes of flexible polymers with surfactants (surf) exhibit mesomorphic phase and microphase-separated lamellar morphology. Because the surf molecules are strongly associated with the polymer backbone, the ordered packing of the alkyl tails should be cooperative with the chain packing in the polymer layers which is influenced by chain topology. In this study, the supramolecular structure and thermal properties of the complexes of a highly branched poly(ethylenimine) (PEI) with dodecylbenzenesulfonic acid (DBSA) were investigated. Polarized optical microscopy and small-angle X-ray scattering (SAXS) revealed the presences of mesomorphic phases and microphase-separated lamellar morphology in the complexes. The ordered supramolecular structure was observed not only for the stoichiometric composition but over a wide composition range. The thicknesses of polymer and surf layers were determined from the one-dimensional correlation function. The surf layer thickness varied with complex composition. The glass transition temperature of polymer layers was raised by complexation because of the stiffening of polymer chains. Complexation with DBSA also enhanced the thermal stability of PEI, where the thermal decomposition temperature can be raised by as much as 50 °C.

Preparation and characterization of thin polymer bilayer films by neutron reflection

As semiconductor technology advances, the exploration of novel materials and device architectures becomes imperative to meet the growing demands of integrated circuits for analog and radio-frequency (RF) applications. In this paper, various advanced technologies have been amalgamated such as integration of ferroelectric layer in multigate FinFET along with the adaptation of SOI technology. Further strain technology is also used which employs a tri-layered strained-silicon channel system with the help of SiGe to form Vertically Stacked Heterostructure on Insulator Ferroelectric based FinFET (VS-HOI-FeFinFET) and on comparison with baseline FeFinFET, it is found to show remarkable improvements in terms of various measured parameters such as drain current, switching ratio, threshold voltage and subthreshold swing. Subsequently, gate stacking architecture is incorporated in VS-HOI-FeFinFET to further optimize the device performance. The four different configurations C1 to C4 are taken in terms of four different combinations of gate stack materials considered for gate oxide such as C1(SiO2+Al2O3), C2(SiO2+HfO2), C3(Al2O3), and C4(Al2O3+HfO2). It is found that the static and analog performance of VS-HOI-GS-FeFinFET enhance sequentially from configuration C1 to C4 such as switching ratio is enhanced upto around 5 times, DIBL and quality factor are improved by around 41% and 58% respectively along with significant improvement in device efficiency, early voltage, intrinsic gain, output conductance and output resistance. Subsequently performance optimization of VS-HOI-GS-FeFinFET with variation in mole fraction of germanium is also explored for various analog metrics. Further, several RF parameters are also explored and it is observed that the gain frequency product (GFP) and gain transconductance frequency product (GTFP) are augmented by around three times in magnitude along with 16% reduction in the unity gain cut off frequency in C4 configuration, exhibiting its ability of high frequency amplification with minimized noise distortion thus makes the device suitable for various high performance Analog and RF applications.

Summary form only given. Integrating high-performance III-V devices on the mature silicon platform has been a long pursuit over the past few decades. Approaching the end of scaling in silicon-based ICs, along with impressive performance demonstrated by III-V based devices for RF and logic applications, the quest for III-V-IV integration is timelier than ever. Although wafer bonding has been successfully demonstrated for integrating various III-V devices including lasers on Si, direct epitaxial growth is a desirable alternative, particularly from the manufacturing perspective. Depending on applications, devices have diverse requirements and somewhat different tolerance of various kinds of defects. Furthermore, in optimizing for certain device performance, delicate balancing of the device and material structural designs and requirements are of paramount importance. One has to navigate through the complex matrices of growth parameters, material characteristics, and device performance that can result in quality devices integrable on silicon. We have demonstrated metamorphic growth of high performance III-V transistors on Si for low-power logic and RF applications, as well as high-speed photodetectors. In this talk, the key issues of growing highly-mismatched III-V devices on silicon will be discussed. Compact and Low-power-consumption light sources and associated integration technologies are being developed for the advancement of silicon photonics. Quantum dot (QD) active medium grown on native III-V substrates have demonstrated their benefits for lasers with low-thresholds, less temperature-dependence, and high speed operation. Furthermore, the reduced sensitivity of QD to defects resulted from hetero-epitaxy make them the ideal candidate as the gain medium for monolithically integrated III-V on Si optical sources by direct growth. The strain fields associated with QDs are also effective in filtering dislocations in heteroepitaxy. High performance 1.3 μm QD lasers directly gown on silicon substrates have been reported by a few groups in recent years, with excellent performance and lifetimes. In this talk, I will discuss the optimization of multi-stack InAs/InAlGaAs/InP QDs growth on compliant III-V/Si substrates by MOCVD. Another approach involves nano-ridge lasers with embedded quantum wells grown on stripe patterned on-axis Si substrates or SOI. Room temperature lasing inside nano-cavities at telecom bands is challenging and has only been demonstrated up to the E band. In this talk, I will describe the fabrication of optically-pumped InP/InGaAs nano-ridge lasers resulting in emission wavelengths ranging from the O-, E-, S- to C-band operating at room temperature with ultra-low lasing thresholds. Electrically-pumped whispering-gallery-mode (WGM) micro-lasers, and conventional Fabry Parot lasers using the grown epitaxial structures will also be discussed. This is the first 1.5 μm InP-based QD lasers directly grown on on-axis (001) Si, extending the operation of Si-based on-chip lasers to the fiber communication compatible wavelength range.

Low-loss waveguides integrated on a silicon substrate are essential components in the design and fabrication of photonic circuits. For this application, a wide operational bandwidth - from visible to infrared wavelengths - is critical. Previous research has yielded waveguides made with various materials and geometries. Several of these devices have achieved low, <0.1dB/cm loss in either the visible or the near-IR. However, to obtain effective confinement of light from the visible through the near-IR, it is necessary to develop waveguides which have near-constant loss and minimal non-linear effects across the entire wavelength range. To overcome this challenge, we have developed novel silica on silicon waveguides fabricated using conventional lithographic techniques and CO2 laser reflow. The entire waveguide is elevated above the higher refractive index silicon substrate, creating an isolated, air-clad waveguide. The cylindrical waveguide's loss was determined by coupling light from 658nm, 980nm, and 1550nm lasers into the waveguide using lensed optical fibers. Due to the inherently low material loss of silica and the isolation from the silicon substrate, the device has low optical loss (0.7-0.9dB/cm) and linear behavior across the entire wavelength, polarization, and input power ranges studied. These on-chip waveguides will benefit many applications, including biodetection and integrated photonics.

Summary form only given. Thin polymer layers (TPL) on solid substrates are widely used in science and technology. Fields of application cover microelectronics (polymer resists in lithographic process, dielectric, protective and other functional layers), sensor technologies and nonlinear optics. Polymerization of monomer directly on a surface of substrates is a new, perspective method of TPL formation. Process of electron beam vapour deposition polymerization (E-VDP) is considered at beam energy 1-100keV. Technological features of this method are: a) absence of organic solvents; b) an opportunity of selective deposition of a polymeric layer, only on those sites of a surface, which were irradiated by an initiating electron beam; c) wide opportunities of electron beam parameter control and, accordingly, control of the speed of deposition, topology and properties of formed polymeric layers.

In this paper, technological solutions based on the use of thick low-k polymer layers on low-resistivity (LR) silicon substrate have been investigated. These thick organic layers provide an insulation of interconnects and passives circuits from the lossy silicon substrate and thus minimize its dramatic impact on the performances. Different thicknesses of polymer layer have been tested. Both EM-simulations and high-frequency characterizations have shown an important benefit in coplanar waveguide performances by employing a large polymer thickness (30 /spl mu/ in our case). A noticeable increase of the Q-factor close to 16% has been achieved with burying the realized CPW lines into a quasi-homogeneous polymer medium.

In this chapter a thorough description of the initiated chemical vapor deposition (iCVD) process will be given, concentrating on molecular weight and deposition rate of the deposited polymer, which are essential for largescale application in hybrid gas barriers. Practical applications of coatings by iCVD are addressed, and it will be shown that iCVD single layers can be used individually as gas barriers. However, so far the intrinsic moisture barrier function of polymers is too low to meet the strict requirements that are needed for organic light emitting diodes (OLEDs) and organic solar cells. Ultra-high gas barriers, with a WVTR « 103 g/m2/day, are an interesting area for the application of iCVD layers as well; thin polymer layers can be used as defect decoupling layers in multilayer hybrid organic/inorganic gas barriers. Although thin inorganic layers can be very impermeable, they inevitably contain defect or pinholes, through which moisture can permeate. Since these defects tend to propagate through the entire inorganic layer, an intermediate layer is necessary to decouple defects in consecutive inorganic layers. To be able to optimally fulfill their function in such a hybrid multilayer, there are certain required properties for the iCVD layers concerning their smoothness, stability, glass transition temperature and adhesion, which will be discussed. Actual multilayers containing polymer layers by iCVD developed in the groups of Prof. Gleason at MIT and Prof. Schropp at Utrecht University will be addressed, as well as scaling up of the iCVD process, and consequently commercialization.

In this paper, spiral inductors on high-resistivity silicon (HR-Si) substrates, which surfaces were passivated by different process methods, were fabricated and measured. The comparison of inductances and quality factors between these inductors shows that the inductances and quality factors of spiral inductors significantly depend on process method and thickness of surface passivation layer. The differently generated passivation layer results in different effective substrate resistivity and hence gives rise to different substrate loss. The experimental results show that using thicker nanocrystalline silicon (nc-Si) as a passivation layer will result in a smaller substrate loss and hence spiral inductors on the substrate have larger inductances and larger quality factors. In this study, the metal thickness of inductors is 1.2 µm and is about half that of the inductors provided by foundries. At higher frequencies, the thinner spiral inductors on the SiO2/nc-Si/HR-Si substrate have larger inductances and larger quality factors as compared with the inductors provided by foundries. With the same metal thickness as that adopted in standard processes of foundries, the identical-geometry inductors on the SiO2/nc-Si/HR-Si substrate probably exhibit superior quality factors.

In this paper, an embedded passive and active package is developed by using silicon substrates. Embedded passives are integrated on the silicon substrate or laminated organic using thin-film processes, and active devices are embedded in the silicon using cavity structures. Organic lamination processes are used for filling the gap between IC and silicon and also, it is possible to realize thick insulation layers. Due to thick laminated organics, it is possible to improve Q factors of spiral inductors. To demonstrate the process technology, two active ICs, a SPDT switch and LNA, are embedded in the silicon cavity depth of 160 μm and thin film MIM capacitors for DC blocking or impedance matching are integrated in the substrate. The size of implemented switch LNA module is 2.3 × 1.75 × 0.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> . The measured insertion loss of the switch was 0.58 dB at 2.45 GHz and its application frequency is improved by 6 GHz due to low parasitic effect. The gain of the switch LNA module is 12 dB at the pass band.

&lt;p&gt;Recent research in the field of photovoltaics has shown that polymer solar cells have great potential to provide low-cost, lightweight and flexible electronic devices to harvest solar energy. In this paper, we propose a new method for the generation of three-dimensional nanofibers coated on polymer substrate induced by femtosecond laser pulses. In this new method, a thin layer of polymer is irradiated by megahertz femtosecond laser pulses under ambient conditions, and a thin fibrous layer is generated on top of the polymer substrate. This method is single step; no additional materials are added, and the layers of the three-dimensional (3D) polymer nanofibrous structures are grown on top of the substrate after laser irradiation. Light spectroscopy results show significant enhancement of light absorption in the generated 3D nanofibrous layers of polymer. Finally, we suggest how to maximize the light trapping and optical absorption of the generated nanofiber cells by optimizing the laser parameters.&lt;/p&gt;

Chapter Eight - Ferrites for RF Passive Devices

Devices based on AlGaN/GaN heterostructures, for example, Schottky barrier diodes (SBDs) and high electron mobility transistors (HEMTs), have been intensively investigated for applications to high-frequency and high-power areas. Presently, the substrates widely distributed are AlGaN/GaN on SiC for its high performance in radio frequency (RF) applications, for examples high cutoff frequency (fT) or high maximum oscillation frequency (fmax), and AlGaN/GaN on Si for its high power performance, for examples high breakdown voltage or high voltage operation. Chemical vapor deposition (CVD) diamond substrates have a thermal conductivity of 12 W/cm·K, and this is a remarkable point because HEMTs or SBDs on AlGaN/GaN on CVD diamonds are one of the promising alternatives for power and RF applications. In comparison, the thermal conductivity of AlGaN/GaN on a sapphire substrate is 0.33 W/cm·K while that of AlGaN/GaN on a Si substrate is 1.3 W/cm·K and that of AlGaN/GaN on a SiC substrate is 4.9 W/cm·K. In this work, we fabricated SBDs with a 137 mm Schottky channel length on AlGaN/GaN on Si and also on a CVD diamond substrate. We also compared the thermal behaviors of these fabricated large scale SBDs on Si and a CVD diamond substrate.

The compatibility of silicon photonics with existing CMOS fabrication processes enables the possibility of large scale manufacturing of integrated photonics for communication applications above 100Gbit/s. However, the design of silicon photonics devices that are able to fulfil the high-performance requirements of broad optical bandwidth ( 50nm), low loss (2dB), high-speed (25Gbit/s), low driving voltage (≥ –5V), large fabrication tolerance (±20nm) and high reproducibility across the wafer is a unique practical challenge. In this work, we present a library of passive and active integrated silicon photonic devices that meet the stringent design requirements for communication applications. The design, modelling and experimental results are presented for low loss edge couplers with insertion loss < 2dB, low-loss waveguides and bends, high-performance polarization beam splitter with extinction ratio above 25 dB, broadband directional couplers with optical bandwidth above 50nm, and arrayed waveguide gratings (AWGs) with low insertion loss < 1dB. Last but not least, high-speed silicon modulators (25Gbit/s) with phase efficiency VπL ≤ 2V.cm at DC reverse bias of ≥ –5V and low propagation loss of ≤ ∼1dB/mm are demonstrated.