Program optimization - theory and practice

This paper presents a unified framework for program optimization which subsumes (i) Loop invariant code motion, (ii) Common subexpression elimination, and (iii) Strength reduction. Use of this framework is shown to eliminate the control flow analysis costs and to widen the scope of conventional strength reduction.

We introduce a new approach, Dynamic Common Sub-expression Elimination (CSE), that dynamically eliminates common sub- expressions based on new opportunities created during scheduling of control-intensive designs. Classical CSE techniques fail to eliminate several common sub-expressions in control-intensive designs due to the presence of a complex mix of control and data-flow. Aggressive speculative code motions employed to schedule control-intensive designs often re-order, speculate and duplicate operations, hence changing the control flow between the operations with common sub-expressions. This leads to new opportunities for applying CSE dynamically. We have implemented dynamic CSE in a high-level synthesis framework called Spark and present results for experiments performed using various combinations of CSE and dynamic CSE. The benchmarks used consist of four functional blocks derived from two moderately complex industrial-strength applications, namely, MPEG-1 and the GIMP image processing tool. Our dynamic CSE techniques result in improvements of up to 22% in the controller size and up to 31% in performance; easily surpassing the improvements obtained by the traditional CSE approach. We also observe an unexpected (and significant) reduction in the number of registers using our approach.

Constant multiplications can be efficiently implemented in hardware by converting them into a sequence of nested additions and shift operations. They can be optimized further by finding common subexpressions among these operations. In this work, we present algebraic methods for eliminating common subexpressions. Algebraic techniques are established in multi-level logic synthesis for the minimization of the number of literals and hence gates to implement Boolean logic. In this work we use the concepts of two of these methods, namely rectangle covering and fast extract (FX) and adapt them to the problem of optimizing linear arithmetic expressions. The main advantage of using such methods is that we can optimize systems consisting of multiple variables, which is not possible using the conventional optimization techniques. Our optimizations are aimed at reducing the area and power consumption of the hardware, and experimental results show up to 30.3% improvement in the number of operations over conventional techniques. Synthesis and simulation results show up to 30% area reduction and up to 27% power reduction. We also modified our algorithm to perform delay aware optimization, where we perform common subexpression elimination such that the delay is not exceeded beyond a particular value.

The unconventional design of the ILLIAC-IV requires unconventional optimization techniques. Conventional techniques focus on the program. Since conventional hardware executes one instruction at a time, greater efficiency is obtained by reducing the number of instructions executed. Elimination of common subexpressions and literal computations, removal of locally invariant computations, reduction of operator strength, etc. are all methods of restructuring a program to allow greater efficiency. This focus on the program is not sufficient for the ILLIAC-IV. Efficient use of an array of processors depends upon the data being stored so as to permit parallel execution on many data streams. Further, the inability of each processor to access more than 2K of memory requires the use of routing commands for inter-processor communication. Hence, optimization on an array computer requires restructuring of the data as the primary area of effort. Such restructuring includes, for example, an extension to the skewed storage method which permits any slice of any array to be accessed in parallel and, further, to be aligned with an other slice by a uniform route. (A slice of an n-dimentional array A is the vector {A(c l ,..., c i−l , j, c i+l ,..., c n : m i ≤ j ≤ M i , c k constant}.)

ABSTRACTThis paper presents an efficient design method for a digital multiplierless two-channel filterbank using the shifted-Chebyshev polynomials and common sub-expression elimination (CSE) algorithm for reducing hardware requirements such as adders and multipliers. For designing a two-channel filterbank, the design problem is constructed as minimization of integral mean square error between the desired and designed response of a prototype filter in the passband and stopband. For controlling the performance in passband and stopband, two parameters (KP, and KS) are used, whose optimum values are determined by swam optimization techniques such as differential evolution algorithm, artificial bee colony optimization, particle swarm optimizations, cuckoo search algorithm and hybrid method using a fitness function, constructed by perfect reconstruction condition of a filterbank. The number of polynomials used for approximation depends upon the order of a prototype filter. A new hybrid CSE is proposed for further reduction of hardware requirement. A comparative study of various CSE techniques such as horizontal, vertical and proposed hybrid CSE is also made. Numerical examples illustrate the effectiveness of the proposed algorithm in the reduction of adders with comparisons accomplished using existing methods. It has been found that almost 43% adder gain can be achieved when a filter is designed with N = 32 and wordlength (WL) as 12 using proposed methodology.

An analysis is given for optimizing run-time range checks in regions of high execution frequency. These optimizations are accomplished using strength reduction, code motion and common subexpression elimination. Test programs, using the above optimizations, are used to illustrate run-time improvements.

This research introduces the Sparse Sensor Placement Optimization for Prediction algorithm and explores its use in bioinspired flight-by-feel control system design. Flying animals have velocity-sensing structures on their wings and are capable of highly agile flight in unsteady conditions, a proof-of-concept that artificial flight-by-feel control systems may be effective. Constrained by size, weight, and power, a flight-by-feel sensory system should have the fewest optimally placed sensors which capture enough information to predict the flight state. Flow datasets, such as from computational fluid dynamics, are discrete, often highly discontinuous, and ill-suited for conventional sensor placement optimization techniques. The data-driven Sparse Sensor Placement Optimization for Prediction approach reduces high-dimensional flow data to a low-dimensional sparse approximation containing nearly all of the original information, thereby identifying a near-optimal placement for any number of sensors. For two or more airflow velocity magnitude sensors, this algorithm finds a placement solution (design point) which predicts angle of attack of airfoils to within 0.10° and ranks within the top 1% of all possible design points validated by combinatorial search. The scalability and adaptability of this algorithm is demonstrated on several 2D model variations in clean and noisy data, and model sensitivities are evaluated and compared against conventional optimization techniques. Applications for this sensor placement algorithm are explored for aircraft design, flight control, and beyond.

This paper deals with the application of the notion of semantic attributes (as developped by D.E. KNUTH [1]) to generation of optimized code. Taking local elimination of common sub-expressions as a starting point, it is demonstrated by means of an example that meta-compilation by attributes allows semantic formalization of classical optimization algorithms. A redundancy attribute, R+, is defined to play an optimizing role in connection with redundant common sub-expressions during compilation without having to undergo a special treatment.

This paper presents our solution submitted to the Emotion Recognition in the Wild (EmotiW 2016) group-level happiness intensity prediction sub-challenge. The objective of this sub-challenge is to predict the overall happiness level given an image of a group of people in a natural setting. We note that both the global setting and the faces of the individuals in the image influence the group-level happiness intensity of the image. Hence the challenge lies in building a solution that incorporates both these factors and also considers their right combination. Our proposed solution incorporates both these factors as a combination of global and local information. We use a convolutional neural network to extract discriminative face features, and a recurrent neural network to selectively memorize the important features to perform the group-level happiness prediction task. Experimental evaluations show promising performance improvements, resulting in Root Mean Square Error (RMSE) reduction of about 0.5 units on the test set compared to the baseline algorithm that uses only global information.

Digital filter banks are extensively used in an SDR channelizer for channelization. The objective of this research work is to design a low computational complexity FIR filter bank for generating sharp transition width channels for SDR. The design of unified and variable bandwidth channels for SDR using the proposed structure is based on the modified IFIR filter structure and cosine modulation technique (CMT). The performance of the proposed structure is demonstrated with the help of an example. The results show that the multiplier complexity of the proposed structure is less than those of other state-of-the art methods. The optimization techniques are incorporated in this work to further reduce the complexity of the proposed structure. With the help of canonical signed digit (CSD), multi-objective artificial bee colony (MOABC) and shift inclusive differential coefficients (SIDC) – common sub-expression elimination (CSE) optimization, the filter used in this structure is made multiplier-less.

The formulation of a Propositional Satisfiability (SAT) problem instance is vital to efficient solving. This has motivated research on preprocessing, and inprocessing techniques where reformulation of a SAT instance is interleaved with solving. Preprocessing and inprocessing are highly effective in extending the reach of SAT solvers, however they necessarily operate on the lowest level representation of the problem, the raw SAT clauses, where higher-level patterns are difficult and/or costly to identify. Our approach is different: rather than reformulate the SAT representation directly, we apply automated reformulations to a higher level representation (a constraint model) of the original problem. Common Subexpression Elimination (CSE) is a family of techniques to improve automatically the formulation of constraint satisfaction problems, which are often highly beneficial when using a conventional constraint solver. In this work we demonstrate that CSE has similar benefits when the reformulated constraint model is encoded to SAT and solved using a state-of-the-art SAT solver. In some cases we observe speed improvements of over 100 times.KeywordsConstraint ModelNegation Normal FormImplied ConstraintCommon Subexpression EliminationGlobal Cardinality ConstraintThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

A technique is presented for global analysis of program structure in order to perform compile time optimization of object code generated for expressions. The global expression optimization presented includes constant propagation, common subexpression elimination, elimination of redundant register load operations, and live expression analysis. A general purpose program flow analysis algorithm is developed which depends upon the existence of an function. The algorithm is defined formally using a directed graph model of program flow structure, and is shown to be correct. Several optimizing functions are defined which, when used in conjunction with the flow analysis algorithm, provide the various forms of code optimization. The flow analysis algorithm is sufficiently general that additional functions can easily be defined for other forms of global code optimization.

Common subexpression elimination is a well-known compiler optimisation that saves time by avoiding the repetition of the same computation. In lazy functional languages, referential transparency renders the identification of common subexpressions very simple. More common subexpressions can be recognised because they can be of arbitrary type whereas standard common subexpression elimination only shares primitive values. However, because lazy functional languages decouple program structure from data space allocation and control flow, analysing its effects and deciding under which conditions the elimination of a common subexpression is beneficial proves to be quite difficult. We developed and implemented the transformation for the language Haskell by extending the Glasgow Haskell compiler. On real-world programs the transformation showed nearly no effect. The reason is that common subexpressions whose elimination could speed up programs are uncommon in lazy functional languages.KeywordsTransformation RuleCost CentreRepeated ComputationCase ExpressionSafe TypeThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

In two recent contributions, minimization of number of adders in realization of digital finite impulse response (FIR) filter has been discussed. The proposed method extends the concept of these techniques to further reduce the requirement of adders in FIR filter for different applications. This paper is based on merging of concepts involved in vertical and horizontal common sub-expression elimination (CSE) delineated for designing a filter that achieves adequate filter characteristics with minimum number of adders.

This paper presents a novel low complex configuration methodology by deploying a directed minimal spanning tree (DMST) algorithm for designing digital multiplierless finite impulse response filter. This method utilizes the shift inclusive differential coefficient and common sub-expression elimination (CSE) technique to minimize the multiple constant multiplications using steepest decent approach. The attractive feature of this work lays on the detailed comparison of the cost, reconstruction error, pass-band and stop-band error by exploiting various evolutionary techniques such as cuckoo search algorithm, particle swarm optimization, artificial bee intelligence, hybrid swarm optimization and flower pollination algorithm; followed by employing hybrid SID and DMST on these techniques. For this purpose, a mean squared error-based objective function is optimized in the pass-band and stop-band region of the filter. Further, a detailed comparison of hybrid SID and DMST with other existing CSE algorithms is also illustrated. It has been observed that up to 80% reduction in number of adders can be accomplished using the proposed DMST-based approach for multiplierless filter design.