Protograph-based LDPC codes for partial response channels

We present a systematic way to construct multilevel concatenated codes for partial response (PR) channels using: (1) a structured set partition (SSP) of multiple channel output sets and (2) a set of conventional block codes with different error correcting capabilities. A lower bound on the minimum squared Euclidean distance of the constructed codes is given. This bound is based on the interset minimal Euclidean distances of the SSP and the minimum Hamming distances of the used block codes. An example of SSP for the extended class 4 partial response channel (EPR4) is presented. Iterative suboptimal decoding, which combines Viterbi detection on the trellis of the PR channel with algebraic error detection/correction, can be applied to the constructed concatenated codes. Truncated versions of the iterative decoding scheme are simulated and compared with each other.

This paper proposes an extrinsic information transfer (EXIT) chart analysis and an asymptotic bit error rate (BER) prediction method to speed up the design of high rate RCM-LDGM hybrid codes over AWGN and fast Rayleigh channels. These codes are based on a parallel concatenation of a rate compatible modulation (RCM) code with a low-density generator matrix (LDGM) code. The decoder uses the iterative sum-product algorithm to exchange information between the variable nodes (VNs) and the two types of constituent check nodes: RCM-CN and LDGM-CN. The novelty of the proposed EXIT chart procedure lies on the fact that it mixes together the analog RCM check nodes with the digital LDGM check nodes, something not possible in previous multi-edge EXIT charts proposed in the literature.

In this letter, the concept of multiple serially-concatenated codes is invoked in the context of stochastic resonance (SR), where the achievable performance is improved by increasing noise power. More specifically, the receiver's iterative decoding process is characterized with the aid of extrinsic information transfer (EXIT) charts, such that the SR effect induced by a non-linear component is taken into account. Our simulation results demonstrate that although the SR demodulator's log-likelihood ratio (LLR) outputs are not Gaussian distributed, the corresponding EXIT trajectory matches the prediction from the associated inner- and outer-codes' EXIT curves, while reaching the perfect convergence point in terms of mutual information. Therefore, an infinitesimally low bit-error ratio (BER) is attained by appropriately designing the channel code's parameters based on EXIT charts.

EXtrinsic Information Transfer (EXIT) chart is a graphical tool for analysis of low density parity check (LDPC) and other codes with iterative decoding. In this paper, we propose the design of LDPC codes for coded modulation schemes by application of linear programming with conditions derived from EXIT charts. Points on the EXIT curve for bit and check node operations are first computed either using analysis or by simulation. The entire EXIT curve is then obtained by linear interpolation. Finally, the EXIT curves are optimized to obtain the maximum possible rate for the code under a given threshold condition. To demonstrate the design procedure, we consider the cases of M-PAM and 8-PSK over the additive white Gaussian noise (AWGN) channel. The optimization method presented is versatile, and can be extended to other constellations and situations easily.

In previous works, density evolution schemes have been used to design an irregular low-density parity-check (LDPC) code for the multi-input multi-output (MIMO) systems. However the code design based on the density evolution can be used only for simple code structure like LDPC codes and repeat-accumulate (RA) codes. Recently simple and accurate irregular LDPC code design method based on the extrinsic information transfer (EXIT) chart was introduced for an AWGN channel. This code design scheme is much flexible, therefore it can be used for any kind of code structure like turbo codes. In this paper we design an irregular LDPC code for a MIMO system using the EXIT chart based scheme. The EXIT charts are used to obtain the optimal edge degree distribution of the irregular LDPC code combined with the MMSE-SIC MIMO detector. This scheme can be generalized for designing the optimal iterative MIMO detector combined with any kind of channel codes including turbo codes.

In this paper, we analyze an orthogonal frequency division multiplexing (OFDM) system employing combined space- time-frequency (STF) codes and an iterative receiver with extrinsic information transfer (EXIT) charts and bit-error rate plots. As STF codes, we examine orthogonal space-time block codes (OSTBCs), cyclic delay diversity, and discontinuous Doppler diversity. We present a combined STF code for eight transmit antennas with rate one. Another contribution of this work is the EXIT chart analysis demonstrating that EXIT charts are not always a suitable tool to analyze the performance of iterative receivers for STF coded OFDM systems. Further, error floors due to the mapping can be removed even for correlated channels by differential encoding and code doping the bits before the modulator.

Combination of turbo codes with partial response (PR) channels was comprehensively studied in magnetic recording systems. In this paper, we investigate a decoding scheme called 'iterative tri-stage decoding' for the turbo code as the outer code and the precoded PR channel as the inner code. This decoding scheme reduces the computational complexities by reducing the number of iterations without degrading the coding gain.

The joint Viterbi detector/decoder (JVDD) has been proposed as an alternative to the powerful and ubiquitous low-density parity check (LDPC) coding schemes, that are used in the majority of channel coding applications today. At shorter block lengths, the JVDD is able to outperform the state-of-the-art LDPC decoder that can be found in many of today’s systems, from deep-space communications to the digital video broadcasting standard, to the advanced television standard committee 3.0. Researchers have developed the tools to analyze the performance of the LDPC decoder, which is known as the sum-product algorithm or message passing algorithm. These tools include density evolution (DE) and extrinsic information transfer (EXIT) charts. To date, no similar such analysis exists for the JVDD. In the current paper we perform a similar preliminary analysis on the JVDD algorithm akin to what DE and EXIT charts are for the LDPC decoder. The current new analysis of the JVDD allows prediction of its probability of error based on the probability distribution functions of the metrics used within the algorithm. Our analysis plays a similar role to the abovementioned tools developed for the LDPC decoder: it allows us to predict the performance of the JVDD under various conditions (such as varying SNR’s, thresholds, and block lengths), it improves our understanding of the JVDD algorithm and the match against Monte-Carlo simulations verifies our assumptions on the main error-causing mechanisms within the JVDD.

The partial response channel can be viewed as a rate-1 encoder in which the output alphabet differs from the input alphabet. In serially concatenated coding schemes, the partial response channel can serve as the inner encoder. Recent works on the application of turbo decoding techniques to partial response channels have used channel models to investigate system performance. While the models provided some insight into the performance of turbo decoding techniques, performance in a real system, with electronic and signal-dependent media noise, remained unknown. This paper will demonstrate the performance of turbo decoding techniques using real and modeled spinstand data. A simple serial concatenation system will be presented that uses as its outer code a single convolutional code and as its inner code the partial response channel. Significant gains will be shown over QMTR coded systems.

A number of papers have recently been published on the concatenation of an outer code with a partial response (PR) channel, where the outer code is a turbo code, a convolutional code, or a low density parity check code. This paper deals with the second case assuming EPR4 and modified extended EPR4 (MEEPR4) partial response targets. The goal in this work is the joint optimization of interleaver and precoder for a fixed outer convolutional code and PR target. We introduce mathematical and algorithmic tools for accomplishing this goal and present simulation results which support our approach. Among the positive results is the ability to lower the well-known error rate floor of these concatenated schemes for arbitrary partial response channels.

Transmitter and receiver filter design plays a key role in communication systems with partial response channels. For a partial response system, a nonmaximally decimated multirate filter bank can be used as a precoder. Based on the MMSE criterion, a closed-form solution to the joint transmitter-receiver optimization problem for noisy partial response channels is presented in this paper. It is found that the redundancy introduced by the nonmaximally decimated filter bank precoder can compensate for spectral nulls in partial response channels that can impair several known joint optimization methods. Simulation results corroborate the analysis that joint transmitter-receiver optimization can achieve significant performance improvement over inverse filter receiver and receiver optimization schemes.

With an annual increase in density of 100% approaching superparamagnetic limits much stronger error control systems are required in read channels for hard drives. A technique is presented for correcting long errors that are the result of highly colored noise typical for modern magnetic heads and media. We introduce a sofic system-based construction of very high rate codes for correcting errors from a given list, and demonstrate a substantial SNR gain when these codes are used in a scheme that combines the error event detection and the list soft decoding.

We construct codes that can closely approach (and possibly ultimately achieve) the i.i.d. capacity of an intersymbol interference (ISI) channel with inputs confined to binary values. We use the low-density-parity-check (LDPC) degree sequences optimization method proposed by Richardson, Shokrollahi and Urbanke (see IEEE Trans. Inform. Theory, vol.47, p.619-37, February 2001) and appropriately modify it for ISI channels.

The dependence of MSE and marginalized BER on amplitude asymmetry for two partial response channels is reported. To eliminate the impact of variations in other head parameters, we varied the bias point of a given head using an external magnetic field. We find that the MSE degrades continuously as the magnitude of the amplitude asymmetry is increased; the marginalized BER is at most weakly dependant on amplitude asymmetry for magnitudes less than 15%. At larger magnitudes the channel performance is more severely impacted, Finally, we were able to simulate these results using a simplified model of the read channel.

This paper is concerned with the applications of majority-logic decodable nonbinary low-density parity-check (LDPC) codes to partial response (PR) channels. We propose a joint detection/decoding algorithm that works in an iterative manner by exchanging messages between the Viterbi detector and a generalized majority logic decoder (GMLGD). The Viterbi detector is implemented over a sectionalized trellis. The hard-decisions made by the Viterbi detector are then passed to the decoder. The decoder delivers as output estimates of each coded symbols, which will be utilized in next iteration to update the branch metrics of the trellis. Since the proposed algorithm requires only integer operations and finite field operations, it can be implemented with simple combinational logic circuits. Simulation results and complexity analysis show that, when compared with the conventional turbo equalizer implemented with the BCJR algorithm and the Q-ary sum-product algorithm (BCJR-QSPA), the proposed algorithm has a much lower complexity but suffers from a little performance degradation. So the proposed algorithm provides a good candidate for trade-offs between performance and complexity.