Quantum Circuit Synthesis Using Projective Simulation

This work contains the analysis of results received after running synthesized quantum circuits for training perceptron neural networks. The training is performed by creating a Grover's algorithm with a custom oracle function. The concept of synthesizing quantum circuits was showcased in the process of generating training circuits for three perceptron topologies, which were designed to test the accuracy of the synthesis process. The test circuits serve to prove that the proposed synthesis approach could be scaled to utilize more complex quantum computing systems and to solve more practical tasks. IBM's 100-qubit cloud quantum simulator was used as the debugging environment. Quantum circuits for described algorithms are generated by the "Naginata" quantum synthesizer, its source code is published and further documented on GitHub along with the code for the provided example algorithms. The article describes the processes behind the algorithm for synthesizing quantum circuits that perform the training process of single-layer perceptrons by finding their weights by filtering all possible input values through a predefined accuracy criterion. Since quantum computing is still in its early development phase, quantum circuits are created mainly by manual placement of logic elements. Implementing quantum algorithms, especially more use-case specific ones, directly on the quantum circuit level could lead to the circuit easily becoming too complex for human comprehension. Quantum Circuit Synthesizer "Naginata" was created to simplify the development and debugging process of quantum algorithms, by adding better clarity to their development process. In our case, better clarity for the development process is achieved by composing functions for commonly used operations performed in the implemented quantum algorithm. The programmer could now implement the quantum algorithm as a set of functions, instead of manually creating a circuit from single logic elements. After this, the synthesizer would handle the task of creating the data for placing logic elements on the circuit. This enables an opportunity of implementing quantum algorithms with higher-level commands. In the scope of this work, parametrically generated generic blocks for frequently used operations such as: the adder, multiplier and digital comparator were created and utilized to form the training circuits. The test results, proved that with the help of the proposed quantum synthesizer, these compositions could be used efficiently as building blocks for implementing quantum algorithms. And by visually comparing sizes of both code and circuit representations of the synthesized circuits, to the code examples used to synthesize these circuits, it is determined that the proposed approach for implementing quantum circuits greatly simplifies the processes of development and debugging a quantum algorithm.

Chapter 5 - Quantum Algorithms and Methods

There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivities, and coherence times, circuit optimization is essential to make the best use of quantum devices produced over a next decade. We introduce two separate ideas for circuit optimization and combine them in a multi-tiered quantum circuit optimization protocol called AQCEL. The first ingredient is a technique to recognize repeated patterns of quantum gates, opening up the possibility of future hardware optimization. The second ingredient is an approach to reduce circuit complexity by identifying zero- or low-amplitude computational basis states and redundant gates. As a demonstration, AQCEL is deployed on an iterative and effcient quantum algorithm designed to model final state radiation in high energy physics. For this algorithm, our optimization scheme brings a significant reduction in the gate count without losing any accuracy compared to the original circuit. Additionally, we have investigated whether this can be demonstrated on a quantum computer using polynomial resources. Our technique is generic and can be useful for a wide variety of quantum algorithms.

The construction of quantum computers is based on the synthesis of low-cost quantum circuits. The quantum circuit of any Boolean function expressed in a Positive Polarity Reed-Muller (PPRM) expansion can be synthesized using Multiple-Control Toffoli (MCT) gates. This paper proposes two algorithms to construct a quantum circuit for any Boolean function expressed in a PPRM expansion. The Boolean function can be expressed with various algebraic forms, so there are different quantum circuits can be synthesized for the Boolean function based on its algebraic form. The proposed algorithms aim to map the MCT gates into the NCV gates for any quantum circuit by generating a simple algebraic form for the Boolean function. The first algorithm generates a special algebraic form for any Boolean function by rearrangement of terms of the Boolean function according to a predefined degree of term d term , then synthesizes the corresponding quantum circuit. The second algorithm applies the decomposition methods to decompose MCT circuit into its elementary gates followed by applying a set of simplification rules to simplify and optimize the synthesized quantum circuit. The proposed algorithms achieve a reduction in the quantum cost of synthesized quantum circuits when compared with relevant work in the literature. The proposed algorithms synthesize quantum circuits that can applied on IBM quantum computer.

Quantum computers, more specifically quantum circuits, take on the eyes with their computational promises such as reversibility. In this paper, we perform synthesis and optimization of quantum circuits. In the first part, we propose a fast synthesis algorithm that implements any given reversible Boolean function with quantum gates. Instead of an exhaustive search on every given function, our algorithm creates a library of essential functions and performs sorting. As an example, to implement 4 bit circuits we only use 120 essential functions out of all 20922789888000 functions. In the second part, we optimize our circuits by using new templates. The proposed templates mainly consist of Toffoli gates with negative and positive controlling lines. These templates also show us that optimum area solutions proposed in the literature are not actually optimum; they can be improved.

Quantum circuit synthesis is fundamental to the advancement and realization of quantum computing. To support both researchers and learners in exploring the structure and behavior of quantum circuits, this paper presents a dedicated interactive visualization platform specifically designed for quantum circuit synthesis: the Quantum Circuit Synthesis Visualizer (QSynViz). The platform offers intuitive circuit editing, matrix visualization, target-to-circuit distance computation, and dynamic tracking of the synthesis process. By making circuit structures and optimization trajectories visually accessible, QSynViz enables users to directly observe, analyze, and refine circuit designs. Bridging visual intuition with algorithmic insight, QSynViz serves as a powerful tool for circuit optimization, synthesis algorithm evaluation, and quantum computing education.

: Quantum computation offers a promising avenue to high performance computing, for certain applications, but depends on development of new quantum algorithms. Thus far, all major quantum algorithms which are exponentially fast compared with classical counterparts are based on the quantum Fourier transform. This project seeks to develop new quantum algorithms, based on a different mathematical transform known as the Schur transform. The Schur transform (or Schur-Weyl duality) arises naturally in many areas of mathematics, chemistry, and physics, and many applications of it have now been found in quantum coding and information theory. This project has also led to the efficient quantum circuits for the Schur transform, and a new quantum algorithm for superpolynomial speedups based on quantum circuits.

Limited by the decoherence of qubits as well as the errors of quantum gates, near-term superconducting quantum computers can only run low-depth quantum circuits to achieve acceptable fidelity. One possible way to overcome these limitations is to construct quantum circuits with additional high-fidelity expressive multi-qubit gates. Recently, a new three-qubit gate, denoted as Controlled-CPHASE-SWAP (CCZS), has been implemented through simultaneous Controlled-Z (CZ) gates. The CCZS gate takes less time than a single CZ gate and can be implemented at the coherence limit. However, how to use the CCZS gate in quantum circuit synthesis remains unexplored. In this paper, we construct the quantum fan-out/parity gates, the controlled-phase gate and the locally fully connected CZ gates with the CCZS gate, respectively. Furthermore, applications of the CCZS gate in quantum error correction, quantum Fourier transform and quantum approximate optimization algorithm are also proposed. We evaluate the performance of the CCZS gate in quantum circuit synthesis through simulation and explore its potential advantages over CZ gates.

Quantum computing simulation platform can simulate the computation results of the quantum computer based on traditional computers, which is an effective way to promote the development of quantum computing software, algorithms and hardware at the current immature stage of the real quantum computer. Since quantum computers have exponential calculation acceleration compared with traditional computers, the main problems in implementing quantum computing simulation on traditional computers are low computational efficiency and long time-consuming. A quantum circuit which is a sequence of quantum gates acting on a collection of qubits is the general quantum computing model. So by the means of quantum circuit optimization, the calculation speed can be significantly increased while keeping the calculation result unchanged. The existing empirical rules of quantum circuit optimization methods have limitations and there is no common and automatic quantum circuit optimization method. In this paper, a general and automatic quantum circuit optimization method based on the genetic algorithm is proposed, by which the equivalent optimal quantum circuit is obtained through a finite number of searching in a large searching space. This method is not limited by the hardware of the quantum computing simulation and the composition of the quantum circuit. The experimental results show that for the QFT algorithm of 29 qubits, the running time can be shortened by 41.4% and for the variational circuit of 6 qubits, the running time can be shortened by 18.8% compared with the state-of-the-art quantum circuit optimization method. So this method can improve the quantum computing simulation capability and operating efficiency and provide a rapid development way for quantum algorithms and applications.

This study introduces a new optimization model and a branch-and-cut approach for synthesizing optimal quantum circuits for reversible Boolean functions, which are pivotal components in quantum algorithms. Although heuristic algorithms have been extensively explored for quantum circuit synthesis, research on exact counterparts remains relatively limited. However, the need to design quantum circuits with guaranteed optimality is increasing, especially for improving computational fidelity on noisy intermediate-scale quantum devices. This study presents mathematical optimization as a viable option for optimal synthesis, with the potential to accommodate practical considerations arising in fast-evolving quantum technologies. We set a demonstrative problem to implement reversible Boolean functions using high-level gates known as multiple control Toffoli gates while minimizing a technology-based proxy called quantum cost—the number of low-level gates used to realize each high-level gate. To address this problem, we propose a discrete optimization model based on a multicommodity network and discuss potential future variations at an abstract level to incorporate technical considerations. A customized branch and cut is then developed upon different aspects of our model, including polyhedron integrality, surrogate constraints, and variable prioritization. Our experiments demonstrate the robustness of the proposed approach in finding cost-optimal circuits for all benchmark instances within a two-hour time frame. Furthermore, we present interesting intuitions from these experiments and compare our computational results with relevant studies, highlighting newly discovered circuits with the lowest quantum costs reported in this paper. History: Accepted by Giacomo Nannicini, Area Editor for Quantum Computing. This paper has been accepted for the INFORMS Journal on Computing Special Issue on Quantum Computing. Funding: This research was supported by the Ministry of Science and Information and Communication Technology, South Korea [Grants 2017R1E1A1A0307098814 and 2020R1A4A307986411]. Supplemental Material: The software that supports the findings of this study is available within the paper and its Supplemental Information ( https://pubsonline.informs.org/doi/suppl/10.1287/ijoc.2024.0562 ) as well as from the IJOC GitHub software repository ( https://github.com/INFORMSJoC/2024.0562 ). The complete IJOC Software and Data Repository is available at https://informsjoc.github.io/ .

Low rank approximation in simulations of quantum algorithms

Quantum computation can solve certain problems much faster than classical computation. However, quantum computations are more susceptible to errors than conventional digital computations. Thus, a fault-tolerant (FT) quantum circuit design is required for a practical implementation. Quantum circuits consist of a cascade of quantum gates. These gates are themselves realized using primitive quantum operations that are supported by the quantum physical machine description (PMD). As different quantum systems are associated with different Hamiltonians, they have different PMDs. In addition, the quantum cost for implementing a quantum operation may differ from one PMD to another. Thus, a quantum logic circuit needs to be realized with and optimized for the set of primitive quantum operations supported by the given PMD. In this paper, an FT quantum logic synthesis (FTQLS) methodology and tool is described for six different PMDs. A methodology, such as this, which can be targeted at multiple PMDs, has not been attempted before, to the best of our knowledge. The input to FTQLS is an unoptimized quantum circuit realized using a set of commonly used gates and its output is an optimized FT quantum circuit that only comprises of primitive quantum operations supported by the given PMD. FTQLS does technology mapping for different PMDs and then converts non-FT circuits to FT circuits. For technology mapping, it utilizes an optimized quantum gate library targeted at various PMDs that decomposes gates into primitive operations. Efficient conversion to FT circuits is done by integrating two quantum compilers and an FT cache table into FTQLS. For improving the synthesis results, an FT set of gates that is directly supported by each PMD is proposed. Quantum circuit optimization is done by utilizing quantum identity rules. The performance of FTQLS is evaluated using two cost metrics: number of primitive operations (#ops) and execution cycles on the critical path (#cycles). Experiment results show that the decrease in #ops varies between 58.1% and 87.0% and in #cycles between 42.8% and 76.4%, on an average, depending on the PMD.

We propose an approach to optimally synthesize quantum circuits from\nnon-permutative quantum gates such as Controlled-Square-Root-of-Not (i.e.\nControlled-V). Our approach reduces the synthesis problem to multiple-valued\noptimization and uses group theory. We devise a novel technique that transforms\nthe quantum logic synthesis problem from a multi-valued constrained\noptimization problem to a group permutation problem. The transformation enables\nus to utilize group theory to exploit the properties of the synthesis problem.\nAssuming a cost of one for each two-qubit gate, we found all reversible\ncircuits with quantum costs of 4, 5, 6, etc, and give another algorithm to\nrealize these reversible circuits with quantum gates.\n

Simulation of the dynamics of quantum materials is emerging as a promising scientific application for noisy intermediate-scale quantum (NISQ) computers. Due to their high gate-error rates and short decoherence times, however, NISQ computers can only produce high-fidelity results for those quantum circuits smaller than some given circuit size. Dynamic simulations, therefore, pose a challenge as current algorithms produce circuits that grow in size with each subsequent time-step of the simulation. This underscores the crucial role of quantum circuit compilers to produce executable quantum circuits of minimal size, thereby maximizing the range of physical phenomena that can be studied within the NISQ fidelity budget. Here, we present two domain-specific (DS) quantum circuit compilers for the Rigetti and IBM quantum computers, specifically designed to compile circuits simulating dynamics under a special class of time-dependent Hamiltonians. The compilers outperform state-of-the-art general-purpose compilers in terms of circuit size reduction by around 25%–30% as well as wall-clock compilation time by around 40% (dependent on system size and simulation time-step). Drawing on heuristic techniques commonly used in artificial intelligence, both compilers scale well with simulation time-step and system size. Code for both compilers is open-source and packaged into a full-stack quantum simulation software with tutorials included for ease of use for future researchers wishing to perform dynamic simulations of quantum materials on quantum computers. As our DS compilers provide significant improvements in both compilation time and simulation fidelity, they provide a building block for accelerating progress toward physical quantum supremacy.

Quantum computing is regarded as the future of computing that hopefully provides exponentially large processing power compared to the conventional digital computing. However, current quantum computers do not have the capability to correct errors caused by environmental noise, so that it is difficult to run useful algorithms that require deep quantum circuits. Therefore, emulation of quantum circuits in digital computers is essential. However, emulation of large quantum circuits requires enormous amount of computations, and leads to a very large processing time. To reduce the processing time, we propose an FPGA emulator with high-bandwidth-memory to emulate quantum Fourier transform (QFT), which is a major part of many quantum algorithms. The proposed FPGA emulator is scalable in terms of both processing speed and the number of qubits, and extendable to multiple FPGAs. We performed QFT emulations up to 30 qubits using two FPGAs. According to the measured results, we have achieved 23.6 ~ 24.5 times speed-up compared to a fully optimized 24-core CPU emulator.