Recent progress of materials and processes for EUV lithography. Ready for HVM? (Conference Presentation)

Extreme ultraviolet (EUV) lithography is considered to be the most effective strategy for realize 7 nm generation manufacturing and beyond. A key factor for the realization of EUV lithography is the choice of EUV resist material that is capable of resolving below 15-nm half pitch with high sensitivity. Chemical Amplified Resist (CAR) using positive-tone development (PTD) is still one of the strongest candidates for EUV lithography. Recently, some researchers have reported concerns on the limitations in the performance of CAR materials. Consequently, there is a critical need for new chemistry and development of new resist materials. However, new resist materials still have lots of concerns for manufacturing, such like a non-CAR materials including metal resist. Therefore, CAR materials are still most important items for EUV lithography manufacturing. We’ve been developing negative-tone imaging (organic solvent development) with EUV exposure (EUV-NTI) for a long time. EUV-NTI has advantages for line-width roughness (LWR) due to their low swelling and dissolving smoothly. New EUV-NTI performances will be shown and also process condition progress will be updated. Also, the basic study will be reported, which is high absorption unit including materials for improving stochastic effect. We report herein recent progress of CAR materials, both positive-tone and negative-tone for EUV lithography.

Extreme ultraviolet (EUV) lithography is crucial to enabling technology scaling in pitch and critical dimension (CD). Currently, one of the key challenges of introducing EUV lithography to high volume manufacturing (HVM) is throughput, which requires high source power and high sensitivity chemically amplified photoresists. Important limiters of high sensitivity chemically amplified resists (CAR) are the effects of photon shot noise and resist blur on the number of photons received and of photoacids generated per feature, especially at the pitches required for 7 nm and 5 nm advanced technology nodes. These stochastic effects are reflected in via structures as hole-to-hole CD variation or local CD uniformity (LCDU). Here, we demonstrate a synergy of film stack deposition, EUV lithography, and plasma etch techniques to improve LCDU, which allows the use of high sensitivity resists required for the introduction of EUV HVM. Thus, to improve LCDU to a level required by 5 nm node and beyond, film stack deposition, EUV lithography, and plasma etch processes were combined and co-optimized to enhance LCDU reduction from synergies. Test wafers were created by depositing a pattern transfer stack on a substrate representative of a 5 nm node target layer. The pattern transfer stack consisted of an atomically smooth adhesion layer and two hardmasks and was deposited using the Lam VECTOR PECVD product family. These layers were designed to mitigate hole roughness, absorb out-of-band radiation, and provide additional outlets for etch to improve LCDU and control hole CD. These wafers were then exposed through an ASML NXE3350B EUV scanner using a variety of advanced positive tone EUV CAR. They were finally etched to the target substrate using Lam Flex dielectric etch and Kiyo conductor etch systems. Metrology methodologies to assess dimensional metrics as well as chip performance and defectivity were investigated to enable repeatable patterning process development. Illumination conditions in EUV lithography were optimized to improve normalized image log slope (NILS), which is expected to reduce shot noise related effects. It can be seen that the EUV imaging contrast improvement can further reduce post-develop LCDU from 4.1 nm to 3.9 nm and from 2.8 nm to 2.6 nm. In parallel, etch processes were developed to further reduce LCDU, to control CD, and to transfer these improvements into the final target substrate. We also demonstrate that increasing post-develop CD through dose adjustment can enhance the LCDU reduction from etch. Similar trends were also observed in different pitches down to 40 nm. The solutions demonstrated here are critical to the introduction of EUV lithography in high volume manufacturing. It can be seen that through a synergistic deposition, lithography, and etch optimization, LCDU at a 40 nm pitch can be improved to 1.6 nm (3-sigma) in a target oxide layer and to 1.4 nm (3-sigma) at the photoresist layer.

Implementation of extreme ultra violet lithography (EUVL) for printing features of dimensions around 32nm and below has faced multiple challenges that have been overcome mostly through tool and process engineering. Currently, the main concern for implementation of EUVL in high volume manufacturing is related to stochastic defects, such as line bridges or breaks, which may occur randomly and have an impact on device performance.1 Photon shot noise, in addition to the inherent process variability and material non-homogeneities can lead to defects on the final patterned structures. As the pitch and critical dimension (CD) approach 32nm pitch and below, the dependency of stochastics defects increases exponentially. This paper fits within imec’s EUV stochastics and defectivity program, which investigates the key parameters for the generation and mitigation of defects from both a theoretical and practical approach. Initially, a reference process has been established and a methodology has been developed to capture and characterize bridge-type defects after pattern transfer into relevant layers for metrology and applications. Optical inspection and scanning electron microscopy (SEM) review are used to collect information on the number and types of defects present over large patterned areas (in the order of cm2). With a well-defined inspection technique, experiments related to fundamentals as well as materials and processes are continuously run. In the past years, imec has been leading the fundamental work on stochastic defects.2,3 De Bisschop et al. identified the “defect cliff”, or the exponential dependency of defect density as a function of space CD for multiple parameters, such as resist formulation and exposure/imaging conditions. More recently, the focus has changed to the investigation of the “defect floor”, which as the name suggests, is a flat response of defects to CD. The defect floor suggests that defectivity cannot be further improved, making one of the most relevant problems to solve for implementation of EUV in high volume manufacturing (HVM). Our results show a decomposition of the potential contributors to explore the effect of processing conditions related to scanner, track and pattern transfer on final defect density for a chemically amplified resist and attempt a comparison to a metal-oxide resist. Goal is to understand the contributors to the defect floor and identify an effective route to avoid/minimize defect formation.

Extreme ultraviolet (EUV) lithography has emerged as a promising candidate for the manufacturing of semiconductor devices at the sub-14nm half pitch lines and spaces (LS) pattern for 7 nm node and beyond. The success of EUV lithography for the high volume manufacturing of semiconductor devices depends on the availability of suitable resist with high resolution and sensitivity. It is well-known that the key challenge for EUV resist is the simultaneous requirement of ultrahigh resolution (R), low line edge roughness (L) and high sensitivity (S). In this paper, we investigated and developed new chemically amplified resist (CAR) materials to achieve sub-14 nm hp resolution. We found that both resolution and sensitivity were improved simultaneously by controlling acid diffusion length and efficien-cy of acid generation using novel PAG and sensitizer. EUV lithography evaluation results obtained for new CAR on Micro Exposure Tool (MET) and NXE3300 system are described and the fundamentals are discussed.

Extreme ultraviolet (EUV) materials are deemed as critical to enable and extend the EUV lithography technology. Currently both chemically amplified resist (CAR) and metal-oxide resist (MOR) platforms are candidates to print tight features on wafer, however patterning requirements, process tonality (positive or negative), illumination settings and reticle tonality (dark or bright) play a fundamental role on the material performance and in consequence on the material choice. In this work we focus on the patterning of staggered pillars using a single EUV exposure, and this by looking at the lithographic and etching performance of CAR and MOR platforms, using metrics as process window, local critical dimension uniformity (LCDU), pillar edge roughness (PER), pillar placement error (PPE) and (stochastic) nano-failures. As a bright field reticle shows a lower aerial image contrast to print pillars compared to the aerial image of contact holes using a dark field reticle, we also investigate alternative patterning solutions such as the tone reversal process (TRP) to pattern pillars from contact holes.

Extreme ultraviolet (EUV) lithography is almost ready for realize 7nm generation manufacturing and beyond. A key factor for the realization of EUV lithography is the choices of EUV resist materials that are capable of resolving below 15nm half pitch with high sensitivity. However, the performances of EUV resist materials are still not enough for the true HVM requirements. One critical issue is `Chemical stochastic', which will be become `defectivity'. We report herein how to improve `Chemical Stochastic'.

Asahi Glass Company (AGC) has been developing the extreme ultra violet (EUV) lithography mask blank and polished substrate since 2003, including the developments of all essential materials and processes: the low thermal expansion material (LTEM), the material developments of the reflective, capping and absorber films, the process developments of the substrate polishing, cleaning, film deposition and resist film coating processes. In this paper, we present the current development status of the full-stack EUV mask blank and polished substrate which are the most suitable for the EUV lithography process development with EUV pre-production exposure tools. We report the development progress of the reflective multilayer-coated LTEM substrate by showing its critical performances with those of 2010 achievements, which include the substrate flatness, the EUV optical properties of the Mo/Si reflective layers and the defect of LTEM substrate and reflective layer. The performances of the Ta-based absorber and the resist films are explained as well to show the readiness of the EUV mask blank suitable for various kinds of process developments of the EUV lithography.

Extreme ultraviolet (EUV) lithography is considered as the leading patterning technology beyond the ArF-based optical lithography, addressing the need for transistor densification to meet Moore's Law. Theoretically, EUV lithography at 13.5nm wavelength meets the resolution requirements for 1xnm technology nodes. However, there are several major challenges in the development of EUV lithography for mass production of advanced CMOS devices. These include the development of high power EUV light sources, EUV optics, EUV masks, EUV resists, overlay accuracy, and metrology and inspection capabilities. In particular, it is necessary to ensure that effective defect control schemes will be made available to reduce the EUV lithography defectivity to acceptable levels. This paper presents a study on the wafer defectivity and characterization of patterned EUV resists, with the objective of providing a quantitative comparison between the defectivity of different resist materials and different stacks. Patterned wafers were printed using the ASML® EUV full-field Alpha-Demo Tool (ADT 0.25 NA) at imec. The EUV resist patterns were 32nm line/spaces. Several advanced resist types were screened experimentally. The different resist types and stacks were inspected using a DUV laser based brightfield inspection tool, followed by a SEM defect review and CD metrology measurements. The patterns were characterized in terms of defect types and defect density. We identified the major defect types and discuss factors that affect the defectivity level and pattern quality, such as resist type, exposure dose and focus. Defect scattering analysis of DUV polarized light at different polarizations was performed, to indicate on the inspection performance trends for a variety of defect types and sizes of the different resists and stacks. The scattering analysis shows that higher defect scattering is induced using polarized light.

In 2019, finally, extreme ultraviolet (EUV) lithography has been applied to high volume manufacturing (HVM) for preparing advanced semiconductor devices. That was very important year for EUV enthusiasts and semiconductor industry. Because it takes for a long time, more than 30 years, to study EUV lithography for realizing HVM. With recent rapid progress on the source power improvement, EUV lithography development including photoresist materials has been achieved HVM requirements. However, the performance of EUV resist materials are still not enough for the expected HVM requirements, even by using the latest qualifying EUV resist materials. One of the critical issues is the stochastic issues, which will be become ‘defectivity’, like a nano-bridge or a nano-pinching. The analyzing summary of the stochastic factors in EUV lithography, and their improvement status are described in this paper. 2 (two) major stochastic issues, which are photon stochastic and chemical stochastic, were observed in the lithography steps. And the improvement status of each stochastic issues including lithographic results are also described.

As minimum feature size shrinks to a metal pitch of 21 nm, the current extreme ultra violet (EUV) lithographic tool with a numeric aperture (NA) of 0.33 will face resolution limit for some critical layers. High NA (0.55) EUV with anamorphic optics or EUV double patterning (DP) at 0.33 NA are being considered for the next generation of lithographic technology. Both the high NA EUV system and EUV DP will enhance resolution relative to current EUV single patterning (SP). Nevertheless, in order to be able to compare EUV DP and High NA EUV processes, important lithographic factors including image contrast, mask three dimension (M3D) effects, process variation band, stochastic effects and local critical dimension uniformity need to be investigated to understand their contributions to process variations. This study was carried out using rigorous lithographic model simulations in Sentaurus Lithography, where strong M3D effects in EUVL are computed physically. We have simulated patterns with both isomorphic and anamorphic optical proximity corrections (OPC) using the rigorous model. The study focuses on 3nm node Via layer designs. These vias need to connect to metal features which have pitches of 21 nm. Simulation results using 0.33 NA SP, 0.33 NA DP, and 0.55 NA anamorphic SP are presented. The benefit of using an alternative mask absorber and a thinner resist as well as the impact of stochastic effects have also been explored. Although a 0.55 NA EUV is expected to produce a superior image to 0.33 NA EUV and to have less impact from overlay errors and stochastic effects, an analysis of process margins of 0.33 NA EUV SD and DP versus 0.55 NA anamorphic systems helps to better understand the benefits, challenges and optimal insertion point for introducing High-NA EUV.

Extreme ultraviolet (EUV) lithography with 13.5 nm wavelength is the main option for sub-10nm patterning in the semiconductor industry. We report improvements in resist performance towards EUV high volume manufacturing. A local CD uniformity (LCDU) model is introduced and validated with experimental contact hole (CH) data. Resist performance is analyzed in terms of ultimate printing resolution (R), line width roughness (LWR), sensitivity (S), exposure latitude (EL) and depth of focus (DOF). Resist performance of dense lines at 13 nm half-pitch and beyond is shown by chemical amplified resist (CAR) and non-CAR (Inpria YA Series) on NXE scanner. Resolution down to 10nm half pitch (hp) is shown by Inpria YA Series resist exposed on interference lithography at the Paul Sherrer Institute. Contact holes contrast and consequent LCDU improvement is achieved on a NXE:3400 scanner by decreasing the pupil fill ratio. State-of-the-art imaging meets 5nm node requirements for CHs. A dynamic gas lock (DGL) membrane is introduced between projection optics box (POB) and wafer stage. The DGL membrane will suppress the negative impact of resist outgassing on the projection optics by 100%, enabling a wider range of resist materials to be used. The validated LCDU model indicates that the imaging requirements of the 3nm node can be met with single exposure using a high-NA EUV scanner. The current status, trends, and potential roadblocks for EUV resists are discussed. Our results mark the progress and the improvement points in EUV resist materials to support EUV ecosystem.

EUV (extreme ultraviolet) lithography has been introduced in high volume manufacturing in 2019 and continuous improvements have allowed to push the lithographic performance to the limits of 0.33 NA single exposure. However, stochastic failures, pattern roughness and local critical dimension uniformity (LCDU) are still major challenges that need to be addressed to maintain node shrinkage and improve yield. Together with pitch downscaling, photoresist thickness is decreasing to prevent pattern collapse. A lower depth of focus is also expected with high NA EUV which might even thin further down the resist layer. Being able to transfer the patterns with good fidelity is therefore getting very challenging because the resist “etch budget” is becoming too small to prevent pattern break during plasma etch transfer. A co-optimization of lithography processes, underlayers coating and etch processes is essential to further support the EUV patterning extension. In this report, recently developed hardware and process solutions to stretch the limits of EUV patterning will be presented. The latest performance for both chemically amplified resists (CAR) and metal oxide resists (MOR) will be introduced, with a focus on defect mitigation, dose reduction strategies and CD stability.

The following topics are dealt with: low-power electronics; Internet of Things; integrated circuit design; video coding; integrated circuit manufacture; CMOS integrated circuits; field programmable gate arrays; magnetic sensors; calibration; power consumption.

Extreme UltraViolet (EUV) lithography is a new technology for production of integrated circuits. In EUV lithographic machines, optical elements are heated by absorption of exposure energy. Heating induces thermoelastic deformations of optical elements and consequently, it creates wavefront aberrations. These Thermally Induced Wavefront Aberrations (TIWA) can significantly degrade the resolution of EUV lithographic machines. One of the ways to correct TIWA and consequently, to improve the resolution of EUV lithographic machines, is to use the Adaptive Optics (AO) technique and predictive control algorithms. However, the predictive control of TIWA is a challenging problem, mainly because the dynamical behavior of TIWA is described by thermoelastic Partial Differential Equations (PDEs). By discretizing the thermoelastic equations using the finite difference or finite element methods, large-scale state-space models can be obtained. A striking feature of these state-space models is that they have sparse (multi) banded matrices. Consequently, these state-space models can be interpreted as large-scale networks of local subsystems. All this implies that the problem of correcting TIWA can be placed in a much more general context of identifying, estimating and controlling large-scale interconnected (distributed) systems. However, currently used estimation and control algorithms are not computationally feasible for large-scale systems. For this reason, this thesis focuses on the development of computationally efficient identification, estimation and control algorithms for large-scale interconnected systems. In this thesis, we prove that the inverses of (finite-time) Gramians of large-scale interconnected systems, obtained by discretizing PDEs, belong to a class of off-diagonally decaying matrices. Consequently, these inverses can be approximated by sparse (multi) banded matrices with O(N) complexity, where N is the number of local subsystems. To compute the approximate inverses, the Chebyshev approximation method and the Newton iteration are used. On the basis of these theoretical results, we develop novel estimation and identification algorithms for large-scale interconnected systems. The computational and memory complexity of these methods scale with O(N). This is the main advantage over the traditional estimation and identification methods, which complexity is O(N^3). Furthermore, in this thesis we develop and experimentally verify AO control algorithms for predictive correction of TIWA. The experimental results give a good first indication for a possible implementation of the developed predictive control algorithms in EUV lithographic machines. Finally, we develop and experimentally test an iterative learning control algorithm for high performance correction of wavefront aberrations.

The rapid advancement of semiconductor manufacturing has driven the need for increasingly precise metrology and defect detection techniques. Extreme Ultraviolet (EUV) lithography, a key technology enabling the production of smaller and more efficient integrated circuits, introduces complex challenges in process control and defect inspection. Traditional methods struggle to keep pace with the heightened resolution and precision required for EUV-based semiconductor production. This paper explores the integration of machine learning (ML) techniques into EUV metrology and defect detection, offering a transformative approach to address these challenges. By leveraging advanced algorithms such as deep learning, neural networks, and data-driven models, we propose a new paradigm that enhances the detection of process-related defects, improves the accuracy of dimensional measurements, and provides real-time feedback for optimized manufacturing processes. The application of ML in this context not only enables more efficient defect classification and reduction but also offers the potential for predictive analytics that can proactively address emerging issues in EUV lithography. This shift towards machine learning-driven metrology represents a significant leap in semiconductor manufacturing, promising to enhance yield, reliability, and performance in next-generation integrated circuits.