Relaxed Si0.7Ge0.3 buffer layers grown on patterned silicon substrates for SiGe n-channel HMOSFETs

The results of studying the growth of self-assembled Ge(Si) islands on relaxed Si1−xGex/Si(001) buffer layers (x≈25%), with a low surface roughness are reported. It is shown that the growth of self-assembled islands on the buffer SiGe layers is qualitatively similar to the growth of islands on the Si (001) surface. It is found that a variation in the surface morphology (the transition from dome-to hut-shaped islands) in the case of island growth on the relaxed SiGe buffer layers occurs at a higher temperature than for the Ge(Si)/Si(001) islands. This effect can be caused by both a lesser mismatch between the crystal lattices of an island and the buffer layer and a somewhat higher surface density of islands, when they are grown on an SiGe buffer layer.

Low energy plasma enhanced chemical vapour deposition (LEPECVD) is a deposition technique developed for the epitaxy of Si and SiGe at ultra-high deposition rates. Due to a high current plasma discharge composed of low energy particles, a high plasma enhancement can be obtained without any accompanying plasma induced damage of the wafer surface. The most important application of LEPECVD so far is for compositionally graded relaxed SiGe buffer layers. Such relaxed buffer layers are demonstrated with end composition up to pure Ge and with a growth time below 1 hour. A p-type hetero-MOSFET formed in a SiGe channel compressively strained to a Si0.5Ge0.5 relaxed buffer layer, is demonstrated as one example where the high growth rates of LEPECVD allows the synthesis of devices which cannot be produced with an acceptable throughput with conventional deposition methods. The room temperature effective hole mobility of 760 cm2/Vs obtained on such devices demonstrates a high structural and electrical quality of the LEPECVD material.

Resonant tunneling of variously strained Si/Ge xSi 1−x/Si heterostructures

Compressively strained Ge channels on relaxed SiGe buffer layers

Engineering strained silicon on insulator wafers with the Smart Cut TM technology

Strain relaxed graded SiGe buffer layers have been grown by low energy plasma enhanced chemical vapour deposition (LEPECVD). Due to the low ion energies involved in LEPECVD, exceptionally high plasma intensities can be applied without any ion damage of the epitaxial layers. Transmission electron microscopy and X-ray reciprocal space mapping show that relaxed buffer layers grown at rates exceeding 5 nm/s are of a comparable quality to buffer layers grown by standard techniques at much lower rates. Low temperature electric transport measurements on remotely doped tensilely strained Si quantum wells synthesized by LEPECVD show that also good electrical quality is achieved.

A correlation between bulk leakage current density and threading dislocation density in silicon–germanium mesa-isolated diodes fabricated on relaxed graded buffer layers is presented. Si0.75Ge0.25 p-i-n diodes were grown on SiGe graded buffers with different grading rates. Graded buffers with different grading rates yielded “virtual substrates” with varying densities of threading dislocations. Bulk leakage current densities were differentiated from surface leakage currents by using p-i-n diodes with different areas. We demonstrate that the increase in bulk leakage current density in SiGe p-i-n diodes can be modeled by generation processes assisted by deep levels related to threading dislocations.

Preferential etching is a simple and fast technique to evaluate the structural perfection of a single-crystalline material. In the area of defects, the etching rate of preferential etchants are different, so either hillocks or pits (etch-pits) appear. But most of the etching solutions reveal the defects only in thick layers or bulk materials, and often they are very specific for each material. Hence an appropriate etchant based on the Schimmel solution was developed by us for thin layer investigation. This modified Schimmel solution contains 55 Vol% CrO 3 (0.4 M) and 45 Vol% HF (49%). The etch rate of this solution depends on the Ge content and on the degree of relaxation R. For the investigated thin SiGe x -heterolayers ( x = 0.3–0.5) this solution provides an excellent controllable etch rate (0.12–0.48 µ m/min), and shows a good capability of etch pit revealing, so the elucidation of countable etch-pits occurs. We implemented also a method for defect revealing based on the electrochemical capacitance voltage system. The determination of the etch pit density is performed by optical microscopy images (inverted dark-field and differential interference contrast) and by atomic force microscopy.

Relaxed Si1−xGex layers grown by rapid thermal chemical vapor deposition (RTCVD) have been characterized by photoluminescence (PL) spectroscopy. The structures consist of a Si1−xGex capping layer with a 0.32 and 0.52 Ge concentration, grown on a compositionally graded Si1−xGex buffer layer. The effect of the composition grading rate on the layer quality has been intensively studied. Well-resolved near band edge luminescence (excitonic lines with no-phonon and phonon replica similar as in bulk SiGe alloys) coming from the relaxed alloy capping layer and dislocation-related bands (Dl, D2, D3, D4 lines) in the graded buffer layer have been measured. The electronic quality of this relaxed capping layer, controlled by the design of the compositionally graded buffer layer, has been determined by the excitonic photoluminescence. A detailed analysis of the energy of the D4 dislocation band demonstrates that the main misfit dislocations remain confined in the first steps of the graded buffer layer. Si1−xGex layers grown on these pseudo-substrates either under compressive or tensile strain and the well-defined PL results obtained are discussed on the bases of strain symmetrization and of high quality of the layers. This points out the possibility of using such high quality relaxed Si1−xGex layers as substrates for the integration of new devices associated with Si technology.

Band-edge photoluminescence of SiGe/strained-Si/SiGe type-II quantum wells on Si(100)

Low-energy plasma-enhanced chemical vapor deposition for strained Si and Ge heterostructures and devices

We demonstrate epitaxially grown high-quality pure germanium (Ge) on bulk silicon (Si) substrates by ultra-high-vacuum chemical vapor deposition (UHVCVD) without involving growth of thick relaxed SiGe buffer layers. The Ge layer is grown on thin compressively strained SiGe layers with rapidly varying Ge mole fraction on Si substrates resulting in several SiGe interfaces between the Si substrate and the pure Ge layer at the surface. The presence of such interfaces between the Si substrate and the Ge layer results in blocking threading dislocation defects, leading to a defect-free pure Ge epitaxial layer on the top. Results from various material characterization techniques on these grown films are shown. In addition, capacitance-voltage (CV) measurements of metal-oxide-semiconductor (MOS) capacitors fabricated on this structure are also presented, showing that the grown structure is ideal for high-mobility metal-oxide-semiconductor field-effect transistor applications.

A method to obtain high-quality strain–relaxed SiGe buffer layers on Si(001) substrates is presented. In this method, the strain relaxation of the SiGe layer is performed using a two-step procedure. Firstly, a low-temperature-grown SiGe layer, whose surface is covered by a thin Si cap layer, is thermally annealed. At this stage, the strain is incompletely relaxed and an atomically flat surface can be realized. Then, a second SiGe layer is grown on the first layer to achieve further strain relaxation. Transmission electron microscopy has clearly revealed that dislocations are dispersively introduced into the first SiGe/Si substrate interface and thus no pile up of dislocations occurs. The formation of a periodic undulation on the growth surface of the second SiGe layer is the key to inducing a drastic reduction in the threading dislocation density.

The results of studying the photoluminescence of the structures with Ge(Si) self-assembled islands embedded into tensile-strained Si layer are reported. The structures were grown on smooth relaxed Si{sub 1-x}Ge{sub x}/Si(001) (x = 0.2-0.3) buffer layers. The photoluminescence peak found in the photoluminescence spectra of the studied structures is related to the indirect (in real space) optical transition between the holes localized in the Ge(Si) islands and electrons localized in the tensile-strained Si layers under and above an island. It is shown that one can efficiently control the position of the photoluminescence peak for a specified type of structure by varying the thickness of the strained Si layers. It is found that, at 77 K, the intensity of the photoluminescence signal from the heterostructures with Ge(Si) self-assembled islands contained between the tensile-strained Si layers exceeds by an order of magnitude the intensity of the photoluminescence signal from the GeSi structures with islands formed on the Si(001) substrates.

The generation of misfit dislocations (MDs) and stacking faults (SFs) was studied by TEM and preferential chemical etching in multilayer Si(001)/SiGe/SiGeC(10 nm)/SiGe/Si heterostructures grown by CVD at 650 °C. Prior to growth of Si layer, the other part of heterostructure was annealed at 950 °C in the growth chamber to get relaxed buffer layers and strained Si layer free of extended defects. We used SiGe alloys with Ge content of 24 at.% and C content of 0.5 at.%. Carbon in the strained SiGe matrix was found to promote high rates of strain relaxation through the nucleation of perfect dislocation loops close to the interface with Si substrate. For Si layer thickness >10 nm, threading dislocations split in these layers under tensile strain to form SFs. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)