Reliability-aware scalability models for high performance computing

This paper addresses the problem of processor faults in distributed memory parallel systems. It shows that transient faults injected at the processor pins of one node of a commercial parallel computer, without any particular fault-tolerant techniques, can cause erroneous application results for up to 43% of the injected faults (depending on the application). In addition to these very subtle faults, up to 19% of the injected faults (almost independent on the application) caused the system to hang up. These results show that fault-tolerant techniques are absolutely required in parallel systems, not only to ensure the completion of long-run applications but, and more important, to achieve confidence in the application results. The benefits of including some fairly simple behaviour based error detection mechanisms in the system were evaluated together with Algorithm Based Fault Tolerance (ABFT) techniques. The inclusion of such Mechanisms in parallel systems seems to be very important for detecting most of those subtle errors without greatly affecting the performance and the cost of these systems.

Fault tolerant design is a technique emerging in Integrated Circuits (ICs) to deal with the increasing error susceptibility (Soft Errors, Single Event Upsets, (SEUs)) caused by e.g. alpha particles. A side effect of these methods is that they also compensate for manufacturing defects, thereby increasing the yield and lowering the production cost in certain conditions. In this paper, it is shown that increasing the IC area (by applying fault tolerant design techniques for SEUs) leads to a synergistic advantage under certain conditions: lower production costs because of a better yield. To guide designers in deciding when the fault tolerant techniques are beneficial, break-even points between fault tolerant and regular designs are presented as function of IC area, fault tolerant overhead and defect density.

This paper presents the results of practical experiments, implemented on a multiprocessor platform, with several techniques for fault tolerance. We analyze and contrast the time and space overheads incurred by each technique. Three iterative algorithms were used in the experiments: solution of Laplace equations, the calculation of the invariant distribution of Markov chains, and the solution of systems of linear equations. Fault-tolerant versions of these algorithms were implemented with two general techniques for fault tolerance (triplication with voting, and checkpointing and rollback) and three application-specific techniques for fault tolerance (self stabilization, algorithm-based fault tolerance, and natural redundancy). The experimental results show that the approach based on natural redundancy, for applications possessing that property, presents the most attractive cost/benefit ratio when only single faults are likely to occur. The execution of the three algorithms implemented with this technique required less than a 15% time redundancy for significantly sized problems in fault-free situations, only one extra iteration to recover from a fault, and no extra processors. These capabilities are ideal for critical applications that must deliver reliable and timely service. Surprisingly, time overheads for some other methods were much higher than expected.

With commodity microprocessors on the horizon capable of processing hundreds of MIPS, current transmission rates cannot accommodate "Amdahl's Law"-where 1 Mbps of I/O is required for every MIPS of processing power-and will become a bottleneck to system performance in data-intensive applications. To remedy this shortcoming, ANSI Committee X3T11 initiated development of Fibre Channel, a switched protocol capable of transmitting at rates exceeding 1 Gbps, while still supporting existing protocols over both optical fiber and copper cables. Fibre Channel combines the best attributes of legacy channels and networks into a single standard that is a generic transport mechanism for data, voice and video. It is the key to scientific and business applications implemented in open and distributed architectures, because it removes the barriers to performance presented by the old methods of data communications. Fibre Channel introduces the high-performance, easy-to use, low-cost communications required by a new breed of processors and applications. Available today are new high-speed, scalable links to storage; high-performance networks enabling clusters, backbones, imaging, and visualization; and low-cost arbitrated loops providing efficient peripheral I/O.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Speedup models are powerful analytical tools for evaluating and predicting the performance of parallel applications. Unfortunately, the well-known speedup models like Amdahl’s law and Gustafson’s law do not take reliability into consideration and therefore cannot accurately account for application performance in the presence of failures. In this study, we enhance Amdahl’s law and Gustafson’s law by considering the impact of failures and the effect of coordinated checkpointing/restart. Unlike existing analytical studies relying on Exponential failure distribution alone, in this work we consider both Exponential and Weibull failure distributions in the construction of our reliability-aware speedup models. The derived reliability-aware models are validated through trace-based simulations under a variety of parameter settings. Our trace-based simulations demonstrate these models can effectively quantify failure impact on application speedup. Moreover, we present two case studies to illustrate the use of these reliability-aware speedup models.

Data compression is usually perceived as a mean to help improve performance of live migration of Virtual Machines (VM). However, such perception may be wrong since there are many factors involved in the combination of live migration and data compression. This paper presents a novel performance model to describe the speedup of VM live migration when used in combination with data compression mechanisms, namely the Amdahl's Law of data compression for live migration of VMs. The speedup is calculated by dividing the total live migration time when the migration is performed in combination with data compression by that without data compression. This model introduces live migration bandwidth as a new factor in the speedup calculation. The live migration bandwidth is the data transmission rate of a live migration mechanism. According to our model, the speedup of live migration using data compression would approach zero as the live migration bandwidth increases toward infinity. A set of theorems derived from the model are presented. A number of experiments have been conducted to confirm these theorems. In the experiments, QEMU-KVM's pre-copy live migration is used to migrate VMs running several memory-intensive OpenMP NAS Parallel benchmarks with and without data compression. Live migrations are performed over 100 Mbps and 1 Gbps networks. Experimental results confirm the validity of the proposed Amdahl's Law of data compression model.

Performance evaluation of fault tolerance techniques in grid computing system

Large scientific applications deployed on current petascale systems expend a significant amount of their execution time dumping checkpoint files to remote storage. New fault tolerant techniques will be critical to efficiently exploit post-petascale systems. In this work, we propose a low-overhead high-frequency multi-level checkpoint technique in which we integrate a highly-reliable topology-aware Reed-Solomon encoding in a three-level checkpoint scheme. We efficiently hide the encoding time using one Fault-Tolerance dedicated thread per node. We implement our technique in the Fault Tolerance Interface FTI. We evaluate the correctness of our performance model and conduct a study of the reliability of our library. To demonstrate the performance of FTI, we present a case study of the Mw9.0 Tohoku Japan earthquake simulation with SPECFEM3D on TSUBAME2.0. We demonstrate a checkpoint overhead as low as 8% on sustained 0.1 petaflops runs (1152 GPUs) while checkpointing at high frequency.

Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance (FT) is becoming increasingly important in computing systems. Several schemes have been proposed to enable a user to configure the FT at the application level, thereby enabling the user to trade stronger FT for performance or vice versa. In this paper, we propose supporting instruction-level rather than application-level configurability of FT, since different parts of some applications (e.g., multimedia) can have different reliability requirements. Weak or no FT will be applied to less critical parts, resulting in time and/or resource gains. These gains can be used to apply stronger FT techniques to the more critical parts; hence increasing the overall reliability. The paper shows how some existing FT techniques can be adapted to support instruction-level FT configurability, how a programmer can specify the desired FT level of the instructions, and how the compiler can manage it automatically. A comparison between the existing FT scheme EDDI (which duplicates all instructions) and the proposed approach is performed both at the kernel and at full application levels. The simulation results show that both the performance and the energy consumption are significantly improved (up to 50% at the kernel and up to 16% at full application level), while the fault coverage depends on the application. For the full application (JPEG encoder), our approach is only applied to one kernel in order to avoid increasing the programming effort significantly.

The emergence of Cloud Computing has brought new dimension to the world of information technology. Even though Cloud Computing provide various benefits like agility, on-demand provisioning of resources, reduced cost, multi-tenancy etc., there are risks and flaws associated with it. One key research challenge in Cloud Computing is to ensure continuous reliability and guaranteed availability of resources provided by it. So there is a need for a robust Fault Tolerant (FT) system in Cloud Computing. To better understand FT in Cloud Computing, it is essential to understand the different types of faults. In this paper, we highlight the basic concepts of fault tolerance by understanding the different FT policies like Reactive FT policy and Proactive FT policy and the associated FT techniques used on different types of faults. A study on various fault tolerant methods, algorithms, frameworks etc., has been carried out which are developed and implemented by research experts in this field. This is an area where lot of research is happening and these studies will guide us to build a robust FT technique in Cloud.

Fault tolerance is the most imperious issue in the cloud to provide reliable services. Inherent vulnerability to failure hampers the performance and reliability of cloud services. Hence, to achieve reliability, fault tolerance becomes a mandatory feature which is hard to implement due to the dynamic infrastructure and complex interdependencies. Numerous fault tolerance techniques have been developed in the literature to address the challenges of cloud reliability. A recent research survey presented in this paper attempts to integrate the different fault tolerance architecture. This study presents a critical research review on various existing fault tolerance techniques to improve services reliability, availability, and applications execution in the cloud. A comparative analysis, based on different critical metrics like failure prediction, detection strategy, failure history, VM placement, and limitations, of the reviewed framework systems is also included in the paper. This review intends to facilitate the development of the new fault tolerance technique for the cloud environment.

Today Internet of Things is transforming our lives. IoT varies from other networks because of their unique characteristics. One of the most important problems in these networks is fault tolerance. In Wireless Sensor Networks or IoTs are made with multiple low-energy sensing nodes. The distribution of these sensing nodes is random in the network. Sensor nodes are capable of perceiving and transferring information to the BS (Bottom Station). Data transmission at sensor nodes necessitates a significant amount of energy. As a result, several nodes die due to energy depletion during transmission. To minimize data loss, fault tolerance techniques are employed. In this paper, a variety of fault tolerance routing protocols are examined and their fault tolerance techniques, as well as issues of each technique, are discussed in this paper. Multiple factors generate disruption in IoT systems that all factors are discussed with a short definition. The comparison of various fault tolerance routing protocols is depicted in the paper. The benefits and limitations of routing protocols are also explained which will provide help to analyze the protocols. Finally, the paper summaries and conclude with recommendations for future research.

In this paper, we propose and evaluate a framework for fault tolerant workflow execution in Grid environments. Different from previous work in the literature, our system dynamically chooses an appropriate fault tolerance technique while using a user-defined rule-based system. We also provide a generic interface that can be used to add fault tolerance techniques to the framework. The results obtained with real workflows in an experimental Grid environment show that the overhead introduced by our framework in a failure-free execution is, in the worst evaluated case, approximately 10 %. Moreover, we show that, using our framework, workflows are able to execute successfully in the presence of failures and that the framework can dynamically choose an appropriate fault tolerance technique. The main contributions of our work are twofold: the developed framework and the model-based dependability analysis we performed on it. The purpose in carrying out a model-based dependability analysis consists on evaluating the interaction between our framework and the distributed Grid environment beyond the physical limitations of an empirical evaluation. By doing this, we provide means to plan the assurance of QoS in the Grid resource allocation, while applying the fault-tolerance mechanisms we implement in our framework regardless of the underlying middleware.

The scalability of future high performance computing (HPC) systems are challenged by high failure rates. So fault tolerance technique will play a more important role in future HPC field. Currently, the checkpoint-restart technique is the main fault tolerance technique. However, the checkpoint-restart approach results in a very high overhead, which influences the efficiency of HPC systems seriously. In this paper, we leverage the emerging NVRAM technology and propose to combine transaction and NVRAM technique to design a new fault tolerance technique. We present NV-TS, a fault tolerance transaction system based on NVRAM. NV-TS guarantee that the update of application state is atomic and durable. If the system crashes suddenly during the application execution, the atomicity of transaction will ensure the consistency of application state. After the system restarts, the application could continue to run. Our experiment shows that NV-TS could improve the performance of fault tolerance with a small memory overhead.

The study of the performance of parallel applications may have different reasons. One of them is the planning of the execution architecture to guaranty a quality of service. In this case, it is also necessary to study the computer hardware, the operating system, the network and the users behavior. This paper proposes different models for those based on simulation. First results of this work show the impact of the network and the necessary precision of communication model in fine-grained parallel applications.