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Research on an Improved Three-Level SVPWM Modulation Algorithm Based on ID-NPC Topology

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Abstract

The conventional three-level SVPWM (Space Vector Pulse Width Modulation) algorithm is a basic modulation algorithm, which can be performed easily due to clear modulation ideas. Considering different criteria for sectors, however, the basic vector action time is calculated repeatedly, the selection of vector action sequence is cumbersome, and the algorithm execution time is extended as a result of processing by the digital processing chip. In order to better adapt to the PMSM (Permanent Magnet Synchronous Motor) control requirements of the ID-NPC (Improved Diodes Neutral Point Clamped) topology for converter control objects, the sector judgment part, time effect part and vector synthesis part are optimized according to the principles of saving hardware resources and shortening the execution cycle. The vector synthesis optimization algorithm of 2 × amplitude substitution and the vector synthesis algorithm of 1/2 × amplitude substitution are both proposed. Finally, the ID-NPC topology is used to verify the proposed modulation algorithm.

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