Research on Bridge Defect Detection Based on the PPS-YOLO Algorithm

Since 22nm technology node, FinFET technology is an attractive candidate for high-performance and power-efficient applications. This is achieved due to better channel control in FinFET devices obtained by wrapping a metal gate around a thin fin. In this paper, we investigate the detectability of bridge defects in FinFET based logic cells that make use of Middle-Of-Line (MOL) interconnections and multi-fin and multi-finger design strategies. The use of MOL to build the logic cells impacts the possible bridge defect locations and the likelihood of occurrence of the defect. Some defect locations unlikely to appear in planar CMOS now become more likely to occur due to the use of MOL. It is shown that these defects are difficult to be detected. The detectability of bridge defects has been analyzed for gates with different drive strengths and fan-in, and also extended to the different type of gates. A metric called Bridge Defect Criticality (BDC) is used to identify the most harmful bridge defects. This metric depends on the degree of detectability and likelihood of occurrence of a bridge defect. More design and/or test effort may be dedicated to those defects with higher a value of the BDC metric to improve product quality.

Lightweight detection network for bridge defects based on model pruning and knowledge distillation

It is well known that classical fault models (stuck-at, stuck-open, stuck-on) cover only partially the spectrum of failures in today's integrated circuits (IC). Some realistic failures occurring in logic circuits have to be considered at the physical level and include its electrical behavior. Among these failures, gate-oxide short, floating gate and bridging fault types may produce intermediate voltages with difficult interpretations at logic level. This work investigates the influence of a bridging fault (BF) between two interconnection lines on the logic margin and logic swing of an IC and the sensitivity of digital ICs realized on four different technologies (0.25 /spl mu/m, 0.35 /spl mu/m, 0.5 pm. 1.5 /spl mu/m) to bridging faults. Several circuits, including D flip-flops and ISCAS benchmark circuits, were analyzed to find out the impact of technology scaling on BF defects detection. In this work we show that the sensitivity of an IC to BF is increased with technology scaling. The testing methodology was based on the use of voltage, temperature and frequency as parameters, which influence on the behavior of an IC with BF.

Advances in the semiconductor industry have led the wafer inspection technology to the limit of nanometer-scale defect detection, which is far beyond the diffraction limit. In this regime, the signal-to-noise ratio (SNR) is the figure-of-merit to determine whether the optical system can detect a single nanometer-scale defect. In this paper, we investigated the SNR properties of various line defects using the dark-field inspection with tailored polarized illumination by simulation and experiment. Conventional crossed Nicols configuration with linear polarized illumination and crossed analyzer can minimize background scattering noise and maximize line defect signal only for a specific kind of line defect such as gap or bridge due to strong polarization dependence on a line and space (L/S) pattern. The nulling elliptically polarized illumination is optimized to suppress background scattering noise moderately and maintain defect signal intensity at the same time. We confirmed SNR improvement for both 10 nm open and bridge defects on 40 nm line and space silicon pattern with 40 nm depth. There was a good agreement between our simulation results and experimental results. We experimentally confirmed SNR ~ 4 for both line gap and bridge defect detection on 40 nm L/S patterned wafer with the fixed nulling illumination.

This paper presents a BIST approach for the very deep submicron (VDSM) defects in an ASIC. As bridging or open defects are dominant in VDSM, efficient and accurate tests to detect them are now strongly required. We evaluated the BIST patterns for various criteria. These evaluations and additional real chip experiments have indicated that BIST has better detectability of defects than the conventional stored test.

Standard wafers with programmed defects (PDs) were fabricated to evaluate charge control techniques, resolution, and defect detection capabilities of pattern inspection tools for 7-nm and smaller nodes. To evaluate charge control techniques, the PDs were formed in line and space (LS) patterns. PDs were also formed below contact holes as programmed etching residues. These PDs were detected by a voltage contrast inspection technique. Image distortion by charging was also evaluated with the use of a wafer in a multibeam secondary electron microscope (SEM) and projection type inspection systems. Patterns with PDs were also formed on different subsurface structures. The effects of subsurface structures on the defect detection capability were evaluated based on this wafer. Another type of wafer having small defects approximately 5 nm in size on 16- to 12-nm half pitch (hp) LS patterns on a 12-inch Si-wafer, was fabricated by electron beam lithography. This wafer allowed evaluation of the defect detection capability of PDs having different shapes and sizes, such as protrusion, intrusion, bridge and open defects, on dense patterns for 7-nm and smaller nodes. Moreover, extremely small protrusion defects, with a size of 1 nm, and small bridge defects (as narrow as 1 nm) were also fabricated into LS patterns with ultra-low line-edge-roughness on a Si (110) substrate. This patterned substrate was mounted into a 12-inch Si wafer, and we evaluated the performance of tools for 12-inch wafer fabrication. We proposed a method to verify the true LER/LWR by CD-SEM measurements.

Manual visual inspection is customarily used to identify and evaluate service status of bridges. However, current procedures followed by human inspectors demand long inspection time to access bridges. Also, highly relying on subjective or empirical knowledge of inspectors may induce false evaluation. To overcome these challenges, a vision-based method is presented for bridge defects detection using transfer learning and convolutional neural networks (CNNs), which could automatically analyze and identify a large volume of collected images. Firstly, typical defect images are preprocessed by means of image processing techniques (IPTs). Secondly, the transfer learning model is trained on 1180 images with arbitrary sizes and pixel resolutions. Thirdly, the trained model is tested on 134 images taken from different bridges which are not used in training and validation sets, and finally recorded the accuracy of 97.8% for testing set. Comparative studies are conducted to examine the performance of the proposed approach using classical machine learning algorithms (MLAs) and features extracted with existing hand-craft methods. The results demonstrate that the proposed approach shows quite better performance in accuracy and efficiency.

Cracking is a typical kind of defect present in cement concrete bridges. Image-based bridge crack detection is a new technology for the lossless digital detection of bridge defects. An image-based method is proposed for recognizing and extracting the characteristic parameters of cracks on the bridge surface. Three main processes are aimed at resolving the interference of construction joints, sunlight, defacements, and vibration. First, the characteristics of cracks found in the acquired and denoised bridge images are analyzed. Second, suspicious cracks are extracted using pixel gray-value comparison. Finally, false cracks are removed through the computed measurement of the connected domain, whereas true cracks are maintained. The qualities of the images are tested, and the results show that the proposed method exhibits robustness and efficiency in detecting bridge cracks.

In order to improve the degree of intelligence of bridge body maintenance, reduce the consumption of manpower and material resources, and improve inspection efficiency, the technology of machine vision inspection is proposed, and a method of detecting bridge body surface defects and embedded design image transmission and positioning is studied. This paper introduced the existing detection methods and technologies of bridge cracks, and analyzed the detection methods of bridge cracks based on image processing and convolutional neural networks. On the basis of this research, the project collected information and processed and analyzed the cracks on the actual bridge deck, and obtained the image preprocessing results of grayscale, removed background noise, thresholded segmentation, and retained edge information and high-frequency signals. And further, the project used drones to capture image data and used deep learning algorithms to achieve automatic detection of aerial crack images. This scheme can effectively reduce the impact of road background and noise on the detection of bridge surface defects.