Roadmapping the next generation of silicon photonics

This brief tutorial introduces the motivation behind photonics and then silicon photonics (SiP). The basics of SiP devices and circuits are described, and then different circuits for high-speed transceivers are presented. We also summarize some trends in SiP technology and applications.

Over the last decade advances and innovations from Silicon Photonics technology were observed in the telecommunications and computing industries. This technology which employs Silicon as an optical medium, relies on current CMOS micro-electronics fabrication processes to enable medium scale integration of many nano-photonic devices to produce photonic integrated circuitry. However, other fields of research such as optical sensor processing can benefit from silicon photonics technology, specially in sensors where the physical measurement is wavelength encoded. In this research work, we present a design and application of a thermally tuned silicon photonic device as an optical sensor interrogator. The main device is a micro-ring resonator filter of 10 $\mu m$ of diameter. A photonic design toolkit was developed based on open source software from the research community. With those tools it was possible to estimate the resonance and spectral characteristics of the filter. From the obtained design parameters, a 7.8 x 3.8 mm optical chip was fabricated using standard micro-photonics techniques. In order to tune a ring resonance, Nichrome micro-heaters were fabricated on top of the device. Some fabricated devices were systematically characterized and their tuning response were determined. From measurements, a ring resonator with a free-spectral-range of 18.4 nm and with a bandwidth of 0.14 nm was obtained. Using just 5 mA it was possible to tune the device resonance up to 3 nm. In order to apply our device as a sensor interrogator in this research, a model of wavelength estimation using time interval between peaks measurement technique was developed and simulations were carried out to assess its performance. To test the technique, an experiment using a Fiber Bragg grating optical sensor was set, and estimations of the wavelength shift of this sensor due to axial strains yield an error within 22 pm compared to measurements from spectrum analyzer. Results from this study implies that signals from FBG sensors can be processed with good accuracy using a micro-ring device with the advantage of ts compact size, scalability and versatility. Additionally, the system also has additional applications such as processing optical wavelength shifts from integrated photonic sensors and to be able to track resonances from laser sources.

We are delighted to introduce a Special Issue on Optical Interconnects for the IET Optoelectronics magazine. This issue presents the current status as well as some of the outstanding progress that has been witnessed in the rapidly evolving area of optical interconnects. Today, data centres (DC) and high-performance computers are struggling with limited interconnect capacity and increased power consumption while trying to meet overwhelming bandwidth demands. As photonics technologies have been rapidly maturing, optical interconnects have come into the spotlight as the means to cope with the emerging bandwidth, energy, and capacity needs. As such, a wealth of photonic interconnect solutions across the DC hierarchy has unfolded, covering from electro-optic boards to transceiver development, on-chip and on-board switches and interconnects as well as novel noninvasive monitoring methods for light controlling for compensating thermal crosstalk, fabrication tolerances and unstable environmental conditions. At the same time, the increased penetration of optical interconnects in short-reach communications, such as board and chip levels, has triggered new challenges in photonics technologies calling for new innovations with respect to integration techniques and packaging methods. This Special Issue of IET includes integrated circuits, assembly techniques, systems-level architectures, and controlling methods related to short reach ‘chip-to-chip’, ‘in-the-box’, and ‘box-to-box’ communications. Specific areas covered by this special issue include: Silicon photonic transceiver technologies and flat DC topologies; High-speed electro-optic hosting boards and fast, energy-efficient electronics; DC switches and co-packaged optic (CPO) technologies; and Noninvasive controlling techniques for complex photonic integrated circuits. The four papers in this special section promote high-performance optical interconnect architectures and key technologies to tackle the rising bandwidth demands of DCs. They cover (a) co-packaged DC optics, (b) silicon technology transceiver modules and high-speed hosting boards for multisocket server board (MSB) interconnects and (c) automated controlling architecture for complex photonic systems; Items (b) and (c) draw from impressive achievements accomplished through the recently completed European H2020 Project ICT-STREAMS. This report written by C. Mickenberg tries to shed light on motivating factors behind co-packaged optics (CPO), the trade-offs involved and their potential impact on data centre network architectures. The article reviews the evolution of DC switch application-specific integrated circuit (ASICs) and DC optics, provides a future road map and finally discusses the potential impact of CPO on the network architecture. This topic is covered by two articles. The first, written by M. Morallis-Pegios, proposes using silicon photonics to advance interconnect throughput, socket connectivity and energy efficiency in MSB layouts by enabling a flat-topology wavelength division multiplexing (WDM) point-to-point optical MSB interconnect scheme. WDM silicon photonic transceivers coassembled with their electronic circuits achieving a 50-Gb/s line rate and 400-Gb/s aggregate data transmission are demonstrated. The article also proposes silicon photonic Arrayed Waveguide Grating Router (AWGRs) that can offer collision-less time-of-flight connectivity for up to 16 nodes. The second article covering that area is written by T. Lamprecht and reports on the development of electro-optic hosting boards for on-board transceiver subassemblies which is required to eventually form the Tb/s multi-socket onboard communication. The article also discusses the electrical interface as well as photonic board requirements, including the manufacturing technique and the assembly concept that was followed to deliver terabyte per second multichip optical communication. This article, written by F. Zanetto, introduces a novel dithering technique for real-time control of multiple cascaded photonic integrated devices, proposing a calibration-free strategy to support the development and real-life diffusion of increasingly complex photonic systems. The article elaborates on the implementation of a calibration-free automated control loop exploiting integral controllers to close a real-time feedback and stabilise the optimum working point of the employed photonic devices. The effectiveness of the proposed architectural approach is experimentally validated with the error-free routing and transmission of a 30-Gbit/s optical signal traversing a cascade of micro-ring resonator filters. All of the articles selected for this Special Issue present a wide variety of key topics and significant results addressing optical interconnects in high-performance data communication systems, including new progress on architectures, systems and packaging techniques as well as novel optimised controlling methods. As guest editors, we would like to thank all of the authors for their high-quality submissions that significantly contribute to the optical interconnect field. We would also like to thank the reviewers for their valuable and constructive technical comments that greatly enhance the Special Issue, because their feedback and comments ensure the high quality of the IET Optoelectronics Journal. We hope that this IET Special Issue will provide a useful reference of the state-of-the-art in optical interconnects to readers, and we anticipate such technological perspectives will stimulate new advancements and technological outcomes that will in turn enrich the growing field of optical interconnects. This work was supported by the E.C. through the H2020-ICT-STREAMS research project (688172).

Recent breakthroughs in silicon photonics technology are enabling the integration of optical devices into silicon-based semiconductor processes. Significant developments in silicon photonic manufacturing and integration are enabling investigations into applications beyond that of traditional telecom: sensing, filtering, signal processing, quantum technology—and even optical computing. In effect, we are now seeing a convergence of communications and computation, where the traditional roles and boundaries of optics and microelectronics are becoming blurred. As the applications for opto-electronic integrated circuits (OEICs) are developed, and manufacturing capabilities expand, design support is necessary to fully exploit the potential of this technology. Photonic design automation represents an opportunity to take OEIC design to a larger scale, facilitating design-space exploration, and laying the foundation for current and future optical applications—thus fully realizing the potential of this technology.

Silicon photonics is a vibrant technology area in which photonic integrated circuits and components are made of silicon. The main driving force behind its development is the prospect of low‐cost manufacture. This is possible due to its compatibility with CMOS processing techniques, which lead to high volumes and high yield. In recent years, there has been a vast and growing amount of research into the technology from both academia and industry, and this has coincided with a period of rapid performance enhancements of the different building block elements that make up a photonic integrated circuit as well as integration and fabrication techniques. In this article an overview of silicon photonics is provided, with the progress in each of the building block areas described, from passive wave guiding components to light sources, optical modulators, and photodetectors. We also give a short overview of the different integration techniques used in the field and the rapidly growing area of mid‐infrared silicon photonic technology.

We present a wavelength-tunable laser diode with a 99-nm-wide wavelength tuning range. It has a compact wavelength-tunable filter with high wavelength selectivity fabricated using silicon photonics technology. The silicon photonic wavelength-tunable filter with wide wavelength tuning range was realized using two ring resonators and an asymmetric Mach-Zehnder interferometer. The wavelength-tunable laser diode fabricated by butt-joining a silicon photonic filter and semiconductor optical amplifier shows stable single-mode operation over a wide wavelength range.

We discuss recent progress and challenges in realizing Bragg-grating devices on the submicron silicon-on-insulator platform for next-generation optical communications applications, such as on-chip optical interconnects and signal processing. In particular, we focus on grating-assisted, wavelength-selective couplers, known as contra-directional couplers (contra-DCs). In contrast to conventional two-port Bragg gratings operating in the reection mode, contra-DCs are four-port devices with very weak backreections and, therefore, can be easily integrated with other photonic components on a chip. In order to provide a reliable on-chip wavelength-division multiplexing (WDM) solution for high-speed optical interconnects, we have developed high-performance add-drop filters and, furthermore, wavelength multiplexers/demultiplexers with combined advantages of at-top responses, low insertion loss (< 1 dB), and low crosstalk (< -23 dB). These WDM devices are ultra-compact and highly tolerant to temperature uctuations (up to ±50 °C), showing great potential for large-scale integration and low-power consumption. We further discuss a novel four-port Bragg photonic resonator for high-speed, low-power optical switching. Using a coupler-chirped design with uniform Bragg gratings, we have recently achieved an on-chip, continuously tunable photonic delay line with low insertion loss. These system-orientated devices indicate great potential for large-scale integration of Bragg-grating-defined functions using CMOS-compatible silicon photonics technology.

We present a switching concept based on total internal reflection (TIR) and frustrated-TIR (F-TIR) using a MEMS movable waveguide fully compatible with silicon photonics technology. The switching element allows implementing large-scale photonic switches.

Particle detectors for future experiments at the HL-LHC will require new optical data transmitters that can provide high data rates and be resistant against high levels of radiation. Furthermore, new design paths for future optical readout systems for HL-LHC could be opened if there was a possibility to integrate the optical components with their driving electronics and possibly also the silicon particle sensors themselves. All these functionalities could potentially be combined in the silicon photonics technology which currently receives a lot of attention for conventional optical link systems. Silicon photonic test chips were designed in order to assess the suitability of this technology for deployment in high-energy physics experiments. The chips contain custom-designed Mach-Zehnder modulators, pre-designed ``building-block'' modulators, photodiodes and various other passive test structures. The simulation and design flow of the custom designed Mach-Zehnder modulators and some first measurement results of the chips are presented.

Novel solar-blind ultraviolet photodetector based on inserting sputtered ITO ultrathin film for integrated silicon photonics platform

Building a large-scale Mach-Zehnder-based silicon photonic switch circuit (LS-MZS) requires an appropriate choice of architecture. In this work, we propose, for the first time to our knowledge, a single metric that can be used to compare different topologies. We propose an accurate analytical model of the signal-to-crosstalk ratio (SCR) that highlights the performance limitations of the main building blocks: Mach-Zehnder interferometers (MZI) and waveguide crossings. It is based on the cumulative crosstalk and total insertion loss of the LS-MZS. Four different architectures: Beneš, dilated Beneš, switch and select, double-layer network were studied for the reason that they are mainly referenced in the literature. We compared them using our developed SCR indicator. With reference to the state-of-the-art technology, the analysis of the four architectures using SCR showed that, on a large scale, a high number of waveguide crossings significantly affects the performance of the switch matrix. Moreover, better performance was reached using the double-layer-network architecture. Then, we presented a 2 × 2 MZI using two electro-optic phase shifters and a waveguide crossing realized in LETI’s silicon photonics technology. Measured performances were quite good: the switch circuit had a crosstalk of −31.3 dB and an insertion loss estimated to be less than 1.31 dB.

Silicon photonics technology has drawn significant interest due to its potential for compact and high-performance photonic integrated circuits. The Ge- or III–V material-based avalanche photodiodes integrated on silicon photonics provide ideal high sensitivity optical receivers for telecommunication wavelengths. Herein, the last advances of monolithic and heterogeneous avalanche photodiodes on silicon are reviewed, including different device structures and semiconductor systems.

Silicon photonics technology is being considered for future net-works-on-chip (NoCs) as it can enable high bandwidth density and lower latency with traversal of data at the speed of light. But the operation of photonic NoCs (PNoCs) is very sensitive to on-chip temperature variations. These variations can create significant relia-bility issues for PNoCs. This paper presents a run-time cross-layer framework to overcome temperature variation-induced reliability issues in PNoCs. The framework consists of a device-level reactive mechanism and a system-level proactive technique to avoid on-chip thermal threshold violations and mitigate thermal reliability issues. Our analysis indicates that this framework can reliably satisfy on-chip thermal thresholds and maintain high network bandwidth while reducing power dissipation over state-of-the-art solutions.

We experimentally demonstrate a broadly-tunable transceiver for radar and surveillance systems, using silicon photonic technology. By exploiting an innovative and simple lasers' noise referencing architecture, the device shows reconfigurable operation in the range 0.5-35GHz, an unprecedented image rejection ratio >80dB, and robust antenna-remoting capability.

Silicon photonics (SiPh) technology has facilitated the deployment of integrated photonics across different application domains, from ultra-fast communication in Datacom applications to energy-efficient optical computation in emerging hardware accelerators for machine learning. More recently, the integration of SiPh and phase change materials has created a unique opportunity to realize adaptable, reconfigurable, and programmable photonic platforms. In particular, the nonvolatile programmability in phase change materials has made them a promising candidate for implementing photonic memory cells and architectures. Accordingly, photonic memory systems and even in-memory photonic computing paradigms are on the rise, especially given their potential for improving data access in electronic and photonic processors. However, there are still many challenges in the design and fabrication of phase-change photonic integrated circuits, which need to be addressed. This article presents a comprehensive survey on the recent advances and challenges for the integration of phase change materials with contemporary photonic devices while focusing on the photonic memory application. In particular, we explore phase-change photonic memory from the material level to the architecture level by presenting an overview of different material-level characteristics of phase change materials with their optical, electrical, and thermal properties as well as their integration into SiPh devices and photonic memory architectures and their application for in-memory photonic computing. We also present a comparison with electronic memory and discuss open research challenges that must be addressed to further advance phase-change photonic memory towards successful integration into emerging computing systems.