- https://doi.org/10.1201/9781003069393-c4
Server Data Bus Structures
- Nov 25, 2020
- A Padgett Peterson
This chapter discusses the relationship between the processor speeds and the bus speeds. It describes nonstandard structures such as the crowbars used in parallel processing operations. The current Digital Alpha reduced instruction set computing (RISC) processors use the Peripheral Component Interconnect (PCI) bus structure with some enhancements. For today, a Pentium-based system with 32-bit PCI bus structure is adequate for low- to medium-loaded networks; for heavy loads, a RISC-based system such as the Digital Alpha with a 64-bit PCI bus would be preferred. The disk drive structure needs to have the highest performance capability in a server. However, data passing from the network to the disk, or the disk to the network, must proceed via the processor along the bus. Currently, SCSI is the drive mechanism of choice in high-performance RISC workstations, with 64-bit data widths and extended PCI bus structures allowing redundant arrays of inexpensive drives-configured systems to exceed 120M byte/sec. real transfer rates.
- # Peripheral Component Interconnect Bus
- # Peripheral Component Interconnect
- # Parallel Processing Operations
- # Reduced Instruction Set Computing
- # Bus Speeds
- # Bus Structure
- # Processor Speeds
- # 32-bit Bus
- # High-performance Workstations
- # Interconnect Bus
