Simple multiplierless CIC compensators providing minimum passband deviation

The simplest decimation filter is the cascaded-integrator-comb (CIC) filter. However, its magnitude response has a high passband droop, which is not tolerable in many applications. One technique for the reduction of the droop is the compensation by a filter called CIC compensator. This brief presents a method for the design of high-order finite-impulse-response CIC compensators which is based on maximally flat error criterion. The compensator's coefficients are obtained by solving a linear system of equations, which is formed using a straightforward procedure. The compensators presented are suitable for application in narrow-band software radio receivers.

Cascaded integrator-comb (CIC) digital filters are computationally efficient implementations of low pass filters. A characteristic that makes them popular in hardware devices is that they require no multiplication. For an ideal low pass filter, the passband part of the signal spectrum is multiplied by one and the stopband part of the signal by zero. The CIC filter has a poor magnitude response, that is, a high passband droop and a low attenuation in the folding bands. Thus the implementation of CIC filters should aim to provide better attenuation in the stopbands and reduced droop in the passbands. CIC filters are typically either followed or preceded by higher performance linear-phase low pass tapped delay- line FIR filters whose tasks are to compensate for the CIC filter's non-flat passband. This paper introduces a design and implementation of cascaded integrator comb with maximally flat passband using second order linear phase filter for narrowband compensation and fourth order linear phase filter for wideband compensation without using a separate compensator. Closed-form equations for the computation of the filter coefficients are provided. Here response sharpening with a Chebyshev polynomial is carried out to get an equiripple stopband. Computational complexity is reduced with the use of low-speed additions, and multiplications by small integer coefficients are converted to shift operations with powers of two. The many small stopbands of CIC are replaced with one large one. The optimized design uses a single Saramaki Ritoniemi structure to provide passband flatness and stopband sharpening simultaneously, making it suitable for FPGA implementation. Thus it can be effective in 1D receiver antenna array designs to create pencil beams.

The design of a multirate cascade of discrete time filters using a FWLS (frequency-weighted least squares) approach is considered. The design strategy enables one to compensate at each stage for errors introduced by preceding stages in the cascade. As a result, very simple filters can be designed for the stages operating at higher sampling rates. A cascade FIR example is presented demonstrating how highly efficient decimators requiring large decimation rates can be designed. The example design yields a cascaded integrator comb (CIC) filter for the first stage. The design strategy applies to the design of interpolators and more arbitrary sample rate converters as well. Design of IIR cascade sections is also addressed.

During the past years, software platforms have proved a superior scalability with respect to hardware solutions. However, wireless communication rates can not be faced resorting only to software. Software defined radio paradigm will try to push reconfigurable blocks as near as possible to the antenna. The first block suitable in this implementation is the digital down converter, needed to adapt higher antenna's data rate to intermediate frequency ones. In this paper a fully reconfigurable IP of a cascaded integrator comb (CIC) filter, an economical class of multiplier-less filters, is proposed. FPGA implementation has lead to very satisfactory results: 135 MHz on a XCV100E.

Taking a buck converter in continuous conduction mode as an example, the improved digital average voltage (IDAV) control technique with capacitor current compensation is presented, and the operation principle and control law are analyzed in detail. The stability and transient performance impacted by the compensation coefficient are investigated by sampled-data modeling, and the optimal compensation coefficient for the fastest load transient performance is found. The analysis results show that the compensation coefficient can be regarded as a virtual equivalent series resistor (ESR) of the capacitor, which affects the stability and transient performance of the system without increasing output voltage ripple. Experimental results are given to verify the correctness of the theoretical analysis.

Based on conventional 2nd-order and 4th-order closed-loop sigma-delta accelerometer (ΣΔ accelerometer) system models, an investigation into parameters that influence accelerometer's performance is presented, including lead compensation coefficient, mechanical resonant frequency and input signal. Moreover, effect of compensation coefficient under high Q is researched. The simulation results imply that an accelerometer system has an optimal compensation coefficient and its performance is inversely proportional to resonant frequency. And the system is conditionally stable under different input acceleration. By optimizing these parameters, a 4th-order sigma-delta accelerometer with 93dB SNDR can be achieved.

The problem of the specification of the order and structure of a linear dynamic compensator in order to obtain arbitrary pole placement in a closed-loop linear system comprised of the compensator in cascade with a linear plant is discussed. A significant application of the theory is to the design of optimal systems in those cases where not all the state variables of the plant can be measured. These results permit a completely algorithmized approach to the design of compensators for linear systems.

This paper proposes a novel multiplierless comb compensation filter, which has the absolute passband deviation less than 0.1 dB in the wide passband. The compensator consists of a cascade of two simple filter sections, both operating at a low rate. The magnitude characteristics of the two-component filters are synthesized as sinewave functions, in which the main design parameters correspond to the amplitudes of sinewave functions. A systematic procedure is followed to select synthesis parameters, which depend only on the number of cascaded comb filters. In particular, they are independent of the decimation factor. Comparisons with comb compensators from the literature illustrate the benefits of the proposed design.

Meta-heuristic optimization algorithms for design of gain constrained state variable filter

This paper presents a novel and simple comb-based decimation nonrecursive structure for the power of three decimation factors. The proposed structure has an improved alias rejection in comparison with the corresponding comb nonrecursive structure. This is achieved by inserting a simple multiplierless filter at the last stage. This filter introduces additional zeros in the certain comb folding bands, thus increasing the width and attenuation in the folding bands. The FPGA implementation confirms low power of the proposed structure.

This paper presents a novel multiplierless two-stage comb-based decimation filter with an improved aliasing rejection, in comparison with the original comb filter. This is achieved by inserting additional zeros into comb folding bands provided by additional comb filters of different lengths in the second stage, and the cascaded modified combs in the first stage. The parameters of design are the same as in two-stage comb, i.e. the decimation factors of the first and second stages and the order of comb. The efficient structures are also discussed. Finally, the comparisons with the methods from literature are presented. The proposed method is convenient for the decimation factors which can be presented as a product of two integers.

Digital filter design finds applications across many disciplines. Acoustic applications include, but are not limited to, impedance boundary conditions in time-domain wave-based room-acoustics modeling, head-related transfer functions, and loudspeaker equalization. The process of filter design can be approached in a variety of ways. To design a non-standard filter, optimization methods may be used to solve for the coefficients that minimize the difference from a specified transfer function of a prescribed order. Interpreted as a model-based inference problem, a Bayesian framework, realized through the nested sampling algorithm, provides simultaneous optimal coefficient estimates and a filter order selection criterion. The selection criterion implicitly favors simpler models over more complex models, in this case lower-order filters over higher-order filters. Many acoustical applications are well suited to this type design, where low filter order is important, and the desired system response is unattainable...

A new explicit and nondissipative finite-difference time-domain (FDTD) method in two and three dimensions is proposed for the relaxation of the Courant condition. The third-degree spatial difference terms with second- and fourth-order accuracies are added with coefficients to the time-development equations of FDTD(2,4). Optimal coefficients are obtained by a brute-force search of the dispersion relations, which reduces phase velocity errors but satisfies the numerical stabilities as well. The new method is stable with large Courant numbers, whereas the conventional FDTD methods are unstable. The new method also has smaller numerical errors in the phase velocity than conventional FDTD methods with small Courant numbers.

High efficiency video coding (HEVC) is the newest video coding standard to greatly increase the coding efficiency of its ancestor H.264/AVC with the aids of its new features such as the quadtree-based coding unit (CU) partitioning, a simple deblocking filter, and other advanced coding techniques. However, HEVC delivers a highly increased computation complexity, which is mainly due to the exhaustive rate distortion optimization search of quadtree-based CU partitioning. Firstly, a feature reduction approach is proposed on a fuzzy support vector machine (SVM) based CU size decision method. The proposed feature reduction approach with rate control (RC) can reduce computational complexity by eliminating some correlated features of a fuzzy SVM-based CU size decision method under a similar coding efficiency. According to the empirical results, our approach can achieve up to 3% of complexity reduction under the same rate distortion (RD) performance over a fuzzy SVM-based approach. Secondly, instead of machine learning (ML) based fast algorithm approach, a CU partitioning pattern optimization method based on genetic algorithm (GA) is proposed to save the computational complexity of a hierarchical quadtree-based CU partitioning. The required coding unit partitioning pattern for an exhaustive partitioning and the rate distortion cost are efficiently considered as the chromosome and the fitness function of the genetic algorithm, respectively. To reduce the computational time, CU partitioning patterns of the key frame is searched and shared to other consecutive frames by taking into account the highly temporal correlation. Our evaluation results show that the proposed method can achieve 62.5% and 16.7% computational complexity reduction on average at 8 Mbps with a negligible average quality degradation compared with HM16.5 and state-of-the-art support vector machine-based fast algorithm, respectively, under low delay P configuration with rate control while 64.1% and 15.1% under low delay configuration with rate control.

An automatic photometer which provides repetitive, rapid filter cycling and star-to-sky chopping in each filter with mechanical simplicity and convenience is described. All the mechanical motion is accomplished with a single stepper motor, filter wheel and chopper disk being mounted directly on its shaft and turning as one moving part, providing high precision and reliability of color photometry. The electronics for data handling and control of the photometer included a hard wired logic stepper control system and a multichannel analyzer data handling system. A schematic diagram of the improved pulse amplifier and discriminator for photon counting is given. For four-color cluster photometry, the automatic mode gives standard deviations for the color index, in all but the very worst conditions, comparable to those for the manual mode under the best conditions.