Slicing Petri Nets with an Application to Workflow Verification

Workflow nets (WF-nets) are Petri nets which represent workflows. Soundness is a criterion of logical correctness defined for WF-nets. It is known that soundness verification is intractable. In this paper, we propose a method to verify soundness using a Linear Temporal Logic (LTL) model checking tool, SPIN. We give an LTL necessary and sufficient condition to verify soundness for WF-nets without livelock. Acyclic WF-nets have no livelock, but cyclic WF-nets may have livelock. We also give a necessary and sufficient condition to verify livelock. Meanwhile, we show that any LTL model checking tool cannot verify soundness for WF-nets with livelock. We give necessary conditions to verify soundness for them. Those conditions enable us to use SPIN even if a given WF-net has livelock. We also develop a tool to verify soundness based on our method. We show effectiveness of our method by comparing our tool with existing soundness verification tools on verification time for 200 cyclic ACWF-nets.

We are concerned with the synthesis of strategies for sequential decision-making in non-deterministic dynamical environments where the objective is to satisfy a prescribed temporally extended goal. We frame this task as a Fully Observable Non-Deterministic planning problem with the goal expressed in Linear Temporal Logic (LTL), or LTL interpreted over finite traces (LTLf). While the problem is well-studied theoretically, existing algorithmic solutions typically compute so-called strong-cyclic solutions, which are predicated on an assumption of fairness. In this paper we introduce novel algorithms to compute so-called strong solutions, that guarantee goal satisfaction even in the absence of fairness. Our strategy generation algorithms are complemented with novel mechanisms to obtain proofs of unsolvability. We implemented and evaluated the performance of our approaches in a selection of domains with LTL and LTLf goals.

This paper introduces extended stochastic Petri nets to model wetlab experiments. The extentions include read and inhibitor arcs, stochastic transitions with freestyle rate functions as well as several deterministically timed transition types: immediate firing, deterministic firing delay, and scheduled firing. The extensions result into non-Markovian behaviour, which precludes analytical analysis approaches. But there are adapted stochastic simulation analysis (SSA) methods, ready to deal with the extended behaviour. Having the simulation traces, we apply simulative model checking of PLTL, a linear-time temporal logic (LTL) in a probabilistic setting.We present some typical model components, demonstrating the suitability of the introduced Petri net class for the envisaged application scenario. We conclude by looking briefly at a classical example of prokaryotic gene regulation, the lac operon case.KeywordsSystem Biology Markup LanguageReachability GraphStochastic Simulation AlgorithmStochastic TransitionSimulation TraceThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

We study the complexity of model-checking Petri Nets w.r.t. the prepositional linear-time μ-calculus. Esparza has shown in [5] that it is decidable, but the space complexity of his algorithm is exponential in the size of the system and double exponential in the size of the formula. In this paper we show that the complexity in the size of the formula can be reduced to polynomial space. We also prove that this is the best one can do. We also show that for the subclass of BPPs the problem has already the same complexity as for arbitrary nets. Furthermore we obtain the same results for the linear time temporal logic LTL, which is strictly less expressive than the linear-time μ-calculus.

The development of the complex data structures systems requires models that are capable of describing the systems' requirements, design, verification, implementation and testing. This paper shows the development of such systems using Object Enhanced Time Petri Nets (OETPNs) framework. OETPN can model concurrency, reaction to internal and external events, synchronization and temporal behavior with fix and dynamic delays. OETPN keeps the bipartite graph structure of the classical Petri Nets, but the unique kind of tokens in PNs are changed to be any kind of objects to represent the data, or tasks (sub OETPN) that can either be active (i.e. threads of execution) or passive. OETPNs are capable to communicate with each other through input and output channels and to distribute concurrent tasks that are moved through a computer network with a dynamical structure (i.e. Task migration) without the need to stop the execution of the other OETPN. Guards and mappings are used to control the flow of execution in order to model the creation, insertion, modification and extraction of information of complex data structures. The mappings are also used to implement the information transformation and the placement of the resulted information at the output places of the transitions. The types of the places are specified to allow setting of objects or tasks. A new OETPN dynamic structure that is best suited for the server side is introduced. A Java platform that implement such applications is described and a complete system to manage the operations of the data structures is discussed with an example.

Modalities for model checking: branching time logic strikes back

Rapid development in hardware industry has brought the prevalence of multi-core systems with shared-memory, which enabled the speedup of various tasks by using parallel algorithms. The Linear Temporal Logic (LTL) model checking problem is one of the difficult problems to be parallelized or scaled up to multi-core. In this work, we propose an on-the-fly parallel model checking algorithm based on the Tarjan’s strongly connected components (SCC) detection algorithm. The approach can be applied to general LTL model checking or with different fairness assumptions. Further, it is orthogonal to state space reduction techniques like partial order reduction. We enhance our PAT model checker with the technique and show its usability via the automated verification of several real-life systems. Experimental results show that our approach is scalable, especially when a system search space contains many SCCs.

To solve the problem of deadlock prevention for flexible manufacturing systems (FMS), an effective approach based on the State Class Graph (SCG) is proposed in a framework of time Petri nets (TPN). The first step determines the SCG of TPN. In the second step, since the SCG and discrete state graph (DSG) of a TPN have the same markings and obey the same linear temporal logic (LTL) properties, deadlock-freedom can be obtained by performing the required marking/transition separations. The theory of regions is used to design control places added to the original TPN model to realize the desired behavior. A parameterized example is used to show the performance of the proposed approach.

The development process of complex systems needs to take in account differents domains and aspects. SysML (Systems Modeling Language) is a new modeling language that allows a system description with various integrated diagrams (as structure, behavior and requirements diagrams), but SysML lacks formality for the requirement verification. The aim of this paper is to propose an approach to verify complex systems using SysML as a language which describes the system structure and requirements. Petri nets and temporal logic LTL are used respectively to formalize the system behavior and requirements. The benefit of such formalization is to allow an automatic formal verification. In order to demonstrate this methodology, it will be used a factory automation system, modeled by SysML and Petri nets, and verified by the TINA toolbox.

We propose a modular verification technique for bounded Petri nets which efficiency relies on both behavioral and structural features. By focusing on linear evenemential temporal logic formula, we demonstrate how to choose a subnet on which it is enough to perform the model checking.

On undecidability of propositional temporal logics on trace systems

In this paper, we consider the on-line estimation of optimal current subsequences in Partially Observable Untimed Petri Nets. Applying the counter approach classically used in max-plus algebra for Timed Petri nets, the idea is to exploit the assumption of a non immediate consumption of the tokens for each place which introduces an order of precedence between events. The approach can estimate a global price depending on the costs and gains provided by the tasks. The estimation of optimal sequences is based on the determination of a time horizon necessary to describe the sequences. The estimation is relevant to a step defined by two successive occurrences of observable transition firings. We show that the approach can consider any optimization problem if the dates of the observations are known or, if a guaranteed horizon can be computed which is always possible when the unobservable subnet satisfies a weak assumption close to the structural boundedness (relaxed structurally boundedness). As the technique avoids the generation of sets, the approach does not depend on their cardinalities and is numerically efficient.

We present a compositional semantics of synchronous systems that captures both safety and progress properties of such systems. The fair synchronous transitions systems (Fsts) model we introduce in this paper extends the basic αSts model [KP96] by introducing operations for parallel composition, for the restriction of variables, and by addressing fairness. We introduce a weak fairness (justice) condition which ensures that any communication deadlock in a system can only occur through the need for external synchronization. We present an extended version of linear time temporal logic (Eltl) for expressing and proving safety and liveness properties of synchronous specifications, and provide a sound and compositional proof system for it.

The concept of must testing is naturally parametrised with a chosen completeness criterion or fairness assumption. When taking weak fairness as used in I/O automata, I show that it characterises exactly the fair preorder on I/O automata as defined by Lynch & Tuttle.KeywordsI/O automataMust testingFairness

Fairness is a rich phenomenon: we have weak and strong fairness, and many different variants of those concepts: transition fairness, object/process fairness, actor fairness, position fairness, and so on, associated with specific models or languages, but lacking a common theoretical framework. This work uses rewriting semantics as a common theoretical framework for fairness. A common thread tying together the different fairness variants is the notion of localization: fairness must often be localized to specific entities in a system. For systems specified as rewrite theories localization can be formalized by making explicit the subset of variables in a rule corresponding to the items that must be localized. In this way, localized fairness becomes a parametric notion, that can be easily specialized to model a very wide range of fairness phenomena. After formalizing these concepts and proving basic results, the paper studies in detail both a relative and an absolute LTL semantics for rewrite theories with localized fairness requirements, and shows that it is always possible to pass from the relative to the absolute semantics by means of a theory transformation. This allows using a standard LTL model checker to check properties under fairness assumptions.